1if ARCH_STM32MP 2 3config SPL 4 select SPL_BOARD_INIT 5 select SPL_CLK 6 select SPL_DM 7 select SPL_DM_SEQ_ALIAS 8 select SPL_DRIVERS_MISC_SUPPORT 9 select SPL_FRAMEWORK 10 select SPL_GPIO_SUPPORT 11 select SPL_LIBCOMMON_SUPPORT 12 select SPL_LIBGENERIC_SUPPORT 13 select SPL_OF_CONTROL 14 select SPL_OF_TRANSLATE 15 select SPL_PINCTRL 16 select SPL_REGMAP 17 select SPL_DM_RESET 18 select SPL_SERIAL_SUPPORT 19 select SPL_SYSCON 20 select SPL_DRIVERS_MISC_SUPPORT 21 imply SPL_LIBDISK_SUPPORT 22 23config SYS_SOC 24 default "stm32mp" 25 26config TARGET_STM32MP1 27 bool "Support stm32mp1xx" 28 select ARCH_SUPPORT_PSCI 29 select CPU_V7A 30 select CPU_V7_HAS_NONSEC 31 select CPU_V7_HAS_VIRT 32 select PINCTRL_STM32 33 select STM32_RCC 34 select STM32_RESET 35 select SYS_ARCH_TIMER 36 select SYSRESET_SYSCON 37 help 38 target STMicroelectronics SOC STM32MP1 family 39 STMicroelectronics MPU with core ARMv7 40 41config SYS_TEXT_BASE 42 prompt "U-Boot base address" 43 default 0xC0100000 44 help 45 configure the U-Boot base address 46 when DDR driver is used: 47 DDR + 1MB (0xC0100000) 48 49config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 50 hex "Partition on MMC2 to use to load U-Boot from" 51 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 52 default 1 53 help 54 Partition on the second MMC to load U-Boot from when the MMC is being 55 used in raw mode 56 57source "board/st/stm32mp1/Kconfig" 58 59# currently activated for debug / should be deactivated for real product 60if DEBUG_UART 61 62config DEBUG_UART_BOARD_INIT 63 default y 64 65# debug on UART4 by default 66config DEBUG_UART_BASE 67 default 0x40010000 68 69# clock source is HSI on reset 70config DEBUG_UART_CLOCK 71 default 64000000 72endif 73 74endif 75