Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07 |
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bc06134e |
| 09-Jul-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
stm32mp1: activate MISC support in SPL
needed for RCC MISC driver and sysreset with syscon in SPL
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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d090cbab |
| 09-Jul-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD RCC driver which is able to bind both clock and reset drivers.
We can reuse and adapt RCC MFD driver already
misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD RCC driver which is able to bind both clock and reset drivers.
We can reuse and adapt RCC MFD driver already available for MCU SoCs (F4/F7/H7).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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bfc6bae8 |
| 14-Jun-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.
Signed-off-by
reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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320d2663 |
| 17-May-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
stm32mp1: Allow to activate CONFIG_DEBUG_UART
Add the needed information to enable the debug uart to have printf before the serial driver probe (so before probe for clock, pincontrol and reset drive
stm32mp1: Allow to activate CONFIG_DEBUG_UART
Add the needed information to enable the debug uart to have printf before the serial driver probe (so before probe for clock, pincontrol and reset drivers)
To enable the debug on uart 4 (default console): + CONFIG_DEBUG_UART=y + CONFIG_DEBUG_UART_STM32=y
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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acf15001 |
| 26-Apr-2018 |
Lokesh Vutla <lokeshvutla@ti.com> |
arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m
arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols.
As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder.
Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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41c79775 |
| 16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
arm: stm32mp1: add PSCI support
Add PSCI v1.0 support for Linux and manage PSCI state for each CPU (affinity 0 level) with all mandatory functions: - PSCI_VERSION - CPU_SUSPEND - CPU_OFF - CPU_ON -
arm: stm32mp1: add PSCI support
Add PSCI v1.0 support for Linux and manage PSCI state for each CPU (affinity 0 level) with all mandatory functions: - PSCI_VERSION - CPU_SUSPEND - CPU_OFF - CPU_ON - AFFINITY_INFO - SYSTEM_OFF - SYSTEM_RESET - PSCI_FEATURES and 1 optional to avoid Linux warning - MIGRATE_INFO_TYPE
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
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7842b6a9 |
| 11-Apr-2018 |
Andre Przywara <andre.przywara@arm.com> |
arm: move SYS_ARCH_TIMER to KConfig
SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot. At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards. Add a
arm: move SYS_ARCH_TIMER to KConfig
SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot. At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> [tuomas: rebase + fix conflicts and resync with moveconfig & use select] Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
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86634a93 |
| 20-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
stm32mp: handle SYSRESET
Add support of sysreset with generic driver "syscon-reboot" provided by RCC, for U-boot and for SPL.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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11dfd1a3 |
| 20-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
stm32mp1: select boot device and partition
Bootrom loads SPL from SDCARD or eMMC according BootPin selection.
Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitio
stm32mp1: select boot device and partition
Bootrom loads SPL from SDCARD or eMMC according BootPin selection.
Then SPL loads U-Boot on the same mmc device with the following predefined GPT partitioning:
on SDCARD: gpt partitioning 1: SPL 2: SPL#2 3: U-Boot 4: bootable partition
on eMMC: The 2 boot partitions are used for SPL (2 copy) boot1: SPL boot2: SPL#2 The user partition use gpt partitioning 1: U-Boot 2: bootable partition
This patch select the correct SPL partition (3 for SDCARD on mmc0 and 1 for eMMC on mmc1) according the BootRom information saved in TAMP register and based on configuration flasg: - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION => for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new) => for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot
And the correct boot_targets is selected according the environment variables boot_device and boot_instance, with preboot command, to search the bootable partition with kernel on this device (generic distro support).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Revision tags: v2018.03 |
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f8598d98 |
| 12-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
board: st: add generic board for STM32MP1 family
Add first support for STM32MP157C-ED1 board with "Basic" boot chain 1/ Boot Rom: load SPL with STM32 image header in SYSRAM 2/ SPL: power up and init
board: st: add generic board for STM32MP1 family
Add first support for STM32MP157C-ED1 board with "Basic" boot chain 1/ Boot Rom: load SPL with STM32 image header in SYSRAM 2/ SPL: power up and initialize the DDR and load U-Boot image from SDCARD in DDR 3/ U-Boot: search and load extlinux.conf in SDCARD (DISTRO activated)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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2514c2d0 |
| 12-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
arm: stm32: add new architecture for STM32MP family
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A - support for stm32mp157 SOC - SPL is used as first boot stage loader - using driver mo
arm: stm32: add new architecture for STM32MP family
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A - support for stm32mp157 SOC - SPL is used as first boot stage loader - using driver model for all the drivers, even in SPL - all security feature are deactivated (ETZC and TZC) - reused STM32 MCU drivers when it is possible
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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