12514c2d0SPatrick Delaunayif ARCH_STM32MP 22514c2d0SPatrick Delaunay 32514c2d0SPatrick Delaunayconfig SPL 42514c2d0SPatrick Delaunay select SPL_BOARD_INIT 52514c2d0SPatrick Delaunay select SPL_CLK 62514c2d0SPatrick Delaunay select SPL_DM 72514c2d0SPatrick Delaunay select SPL_DM_SEQ_ALIAS 82514c2d0SPatrick Delaunay select SPL_FRAMEWORK 92514c2d0SPatrick Delaunay select SPL_GPIO_SUPPORT 102514c2d0SPatrick Delaunay select SPL_LIBCOMMON_SUPPORT 112514c2d0SPatrick Delaunay select SPL_LIBGENERIC_SUPPORT 122514c2d0SPatrick Delaunay select SPL_OF_CONTROL 132514c2d0SPatrick Delaunay select SPL_OF_TRANSLATE 142514c2d0SPatrick Delaunay select SPL_PINCTRL 152514c2d0SPatrick Delaunay select SPL_REGMAP 16bfc6bae8SLey Foon Tan select SPL_DM_RESET 172514c2d0SPatrick Delaunay select SPL_SERIAL_SUPPORT 182514c2d0SPatrick Delaunay select SPL_SYSCON 1986634a93SPatrick Delaunay select SPL_DRIVERS_MISC_SUPPORT 202514c2d0SPatrick Delaunay imply SPL_LIBDISK_SUPPORT 212514c2d0SPatrick Delaunay 222514c2d0SPatrick Delaunayconfig SYS_SOC 232514c2d0SPatrick Delaunay default "stm32mp" 242514c2d0SPatrick Delaunay 252514c2d0SPatrick Delaunayconfig TARGET_STM32MP1 262514c2d0SPatrick Delaunay bool "Support stm32mp1xx" 2741c79775SPatrick Delaunay select ARCH_SUPPORT_PSCI 28acf15001SLokesh Vutla select CPU_V7A 2941c79775SPatrick Delaunay select CPU_V7_HAS_NONSEC 3041c79775SPatrick Delaunay select CPU_V7_HAS_VIRT 312514c2d0SPatrick Delaunay select PINCTRL_STM32 32*d090cbabSPatrick Delaunay select STM32_RCC 332514c2d0SPatrick Delaunay select STM32_RESET 347842b6a9SAndre Przywara select SYS_ARCH_TIMER 3586634a93SPatrick Delaunay select SYSRESET_SYSCON 362514c2d0SPatrick Delaunay help 372514c2d0SPatrick Delaunay target STMicroelectronics SOC STM32MP1 family 382514c2d0SPatrick Delaunay STMicroelectronics MPU with core ARMv7 392514c2d0SPatrick Delaunay 402514c2d0SPatrick Delaunayconfig SYS_TEXT_BASE 412514c2d0SPatrick Delaunay prompt "U-Boot base address" 422514c2d0SPatrick Delaunay default 0xC0100000 432514c2d0SPatrick Delaunay help 442514c2d0SPatrick Delaunay configure the U-Boot base address 452514c2d0SPatrick Delaunay when DDR driver is used: 462514c2d0SPatrick Delaunay DDR + 1MB (0xC0100000) 472514c2d0SPatrick Delaunay 4811dfd1a3SPatrick Delaunayconfig SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 4911dfd1a3SPatrick Delaunay hex "Partition on MMC2 to use to load U-Boot from" 5011dfd1a3SPatrick Delaunay depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 5111dfd1a3SPatrick Delaunay default 1 5211dfd1a3SPatrick Delaunay help 5311dfd1a3SPatrick Delaunay Partition on the second MMC to load U-Boot from when the MMC is being 5411dfd1a3SPatrick Delaunay used in raw mode 5511dfd1a3SPatrick Delaunay 56f8598d98SPatrick Delaunaysource "board/st/stm32mp1/Kconfig" 57f8598d98SPatrick Delaunay 58320d2663SPatrick Delaunay# currently activated for debug / should be deactivated for real product 59320d2663SPatrick Delaunayif DEBUG_UART 60320d2663SPatrick Delaunay 61320d2663SPatrick Delaunayconfig DEBUG_UART_BOARD_INIT 62320d2663SPatrick Delaunay default y 63320d2663SPatrick Delaunay 64320d2663SPatrick Delaunay# debug on UART4 by default 65320d2663SPatrick Delaunayconfig DEBUG_UART_BASE 66320d2663SPatrick Delaunay default 0x40010000 67320d2663SPatrick Delaunay 68320d2663SPatrick Delaunay# clock source is HSI on reset 69320d2663SPatrick Delaunayconfig DEBUG_UART_CLOCK 70320d2663SPatrick Delaunay default 64000000 71320d2663SPatrick Delaunayendif 72320d2663SPatrick Delaunay 732514c2d0SPatrick Delaunayendif 74