xref: /openbmc/u-boot/arch/arm/mach-socfpga/Makefile (revision 853f7f50)
1# SPDX-License-Identifier: GPL-2.0+
2#
3# (C) Copyright 2000-2003
4# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5#
6# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
7
8obj-y	+= board.o
9obj-y	+= clock_manager.o
10obj-y	+= misc.o
11obj-y	+= reset_manager.o
12
13ifdef CONFIG_TARGET_SOCFPGA_GEN5
14obj-y	+= clock_manager_gen5.o
15obj-y	+= misc_gen5.o
16obj-y	+= reset_manager_gen5.o
17obj-y	+= scan_manager.o
18obj-y	+= system_manager_gen5.o
19obj-y	+= timer.o
20obj-y	+= wrap_pll_config.o
21obj-y	+= fpga_manager.o
22endif
23
24ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
25obj-y	+= clock_manager_arria10.o
26obj-y	+= misc_arria10.o
27obj-y	+= pinmux_arria10.o
28obj-y	+= reset_manager_arria10.o
29endif
30
31ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
32obj-y	+= clock_manager_s10.o
33obj-y	+= mailbox_s10.o
34obj-y	+= misc_s10.o
35obj-y	+= mmu-arm64_s10.o
36obj-y	+= reset_manager_s10.o
37obj-y	+= system_manager_s10.o
38obj-y	+= timer_s10.o
39obj-y	+= wrap_pinmux_config_s10.o
40obj-y	+= wrap_pll_config_s10.o
41endif
42
43ifdef CONFIG_SPL_BUILD
44ifdef CONFIG_TARGET_SOCFPGA_GEN5
45obj-y	+= spl_gen5.o
46obj-y	+= freeze_controller.o
47obj-y	+= wrap_iocsr_config.o
48obj-y	+= wrap_pinmux_config.o
49obj-y	+= wrap_sdram_config.o
50endif
51ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
52obj-y	+= spl_a10.o
53endif
54ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
55obj-y	+= spl_s10.o
56endif
57endif
58
59ifdef CONFIG_TARGET_SOCFPGA_GEN5
60# QTS-generated config file wrappers
61CFLAGS_wrap_iocsr_config.o	+= -I$(srctree)/board/$(BOARDDIR)
62CFLAGS_wrap_pinmux_config.o	+= -I$(srctree)/board/$(BOARDDIR)
63CFLAGS_wrap_pll_config.o	+= -I$(srctree)/board/$(BOARDDIR)
64CFLAGS_wrap_sdram_config.o	+= -I$(srctree)/board/$(BOARDDIR)
65endif
66