Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
|
#
a376702f |
| 24-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
|
#
331c3722 |
| 18-Aug-2018 |
Marek Vasut <marex@denx.de> |
ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework and the DW APB timer driver. This allows the A10 to extract timer information, like
ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework and the DW APB timer driver. This allows the A10 to extract timer information, like timer rate, from clock framework and thus DT instead of having it hardcoded in U-Boot configuration files.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
914bb7ea |
| 13-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c
Signed-off-by: Tom Rini <trini@konsulko.com>
|
Revision tags: v2018.07 |
|
#
73aede59 |
| 23-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add timer support for Stratix10 SoC
Add timer support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@int
arm: socfpga: stratix10: Add timer support for Stratix10 SoC
Add timer support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Marek Vasut <marex@denx.de>
show more ...
|
#
4765ddb0 |
| 23-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
Add SPL driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@i
arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
Add SPL driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
c859f2a7 |
| 23-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Restructure the SPL file
Restructure the SPL so each devices such as CV, A10 and S10 will have their own dedicated SPL file. SPL file determine the HW initialization flow which is devi
arm: socfpga: Restructure the SPL file
Restructure the SPL so each devices such as CV, A10 and S10 will have their own dedicated SPL file. SPL file determine the HW initialization flow which is device specific
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
914a84e6 |
| 23-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
Add MMU memory mapping table for Stratix SoC.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.fo
arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
Add MMU memory mapping table for Stratix SoC.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Acked-by: Marek Vasut <marex@denx.de>
show more ...
|
#
a280e9db |
| 23-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
Add mailbox support for Stratix SoC
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Chin Liang See <chin.liang.see
arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
Add mailbox support for Stratix SoC
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Reviewed-by: Marek Vasut <marex@denx.de>
show more ...
|
#
d559130e |
| 23-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add misc support for Stratix10 SoC
Add misc support such as EMAC and cpu info printout for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-b
arm: socfpga: stratix10: Add misc support for Stratix10 SoC
Add misc support such as EMAC and cpu info printout for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
904e5469 |
| 20-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
|
#
73175d04 |
| 18-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
Add pinmux driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foo
arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
Add pinmux driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
3607a808 |
| 18-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Add Reset Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Add Reset Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
508791a0 |
| 18-May-2018 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Add Clock Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Add Clock Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
show more ...
|
Revision tags: v2018.03, v2018.01, v2017.11 |
|
#
19d1f1a2 |
| 29-Jul-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
6867e19a |
| 26-Jul-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
arm: socfpga: Restructure FPGA driver in the preparation to support A10
Move FPGA driver which is Gen5 specific code into Gen5 driver file and keeping common FPGA driver intact. All the changes are
arm: socfpga: Restructure FPGA driver in the preparation to support A10
Move FPGA driver which is Gen5 specific code into Gen5 driver file and keeping common FPGA driver intact. All the changes are still keeping in driver/fpga/ and no functional change. Subsequent patch would move FPGA manager driver from arch/arm into driver/fpga/.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
show more ...
|
#
753a4dde |
| 18-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
|
#
d89e979c |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Enable build for Arria 10
Update Kconfig and Makefile to enable Arria 10. Clean up Makefile and sorting *.o alphanumerically.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
arm: socfpga: Enable build for Arria 10
Update Kconfig and Makefile to enable Arria 10. Clean up Makefile and sorting *.o alphanumerically.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
35b9800f |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Add misc support for Arria 10
Add misc support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
|
#
caf36e1e |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Add pinmux for Arria 10
Add pinmux support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
|
#
177ba1f9 |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Add clock driver for Arria 10
Add clock driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
|
#
827e6a7e |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Add reset driver support for Arria 10
Add reset driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.c
arm: socfpga: Add reset driver support for Arria 10
Add reset driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
d1c559af |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Restructure misc driver
Restructure misc driver in the preparation to support A10. Move the Gen5 specific code to gen5 file.
Change all uint32_t_to u32.
Signed-off-by: Ley Foon Tan <
arm: socfpga: Restructure misc driver
Restructure misc driver in the preparation to support A10. Move the Gen5 specific code to gen5 file.
Change all uint32_t_to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
4ddd541d |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Restructure system manager
Restructure system manager in the preparation to support A10. No functional change.
Change uint32_t to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel
arm: socfpga: Restructure system manager
Restructure system manager in the preparation to support A10. No functional change.
Change uint32_t to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|
#
2b09ea48 |
| 25-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
arm: socfpga: Restructure reset manager driver
Restructure reset manager driver in the preparation to support A10. Move the Gen5 specific code to gen5 files.
Signed-off-by: Ley Foon Tan <ley.foon.t
arm: socfpga: Restructure reset manager driver
Restructure reset manager driver in the preparation to support A10. Move the Gen5 specific code to gen5 files.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
show more ...
|