1if ARCH_ROCKCHIP 2 3config ROCKCHIP_RK3036 4 bool "Support Rockchip RK3036" 5 select CPU_V7 6 select SUPPORT_SPL 7 select SPL 8 help 9 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 10 including NEON and GPU, Mali-400 graphics, several DDR3 options 11 and video codec support. Peripherals include Gigabit Ethernet, 12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 13 14config ROCKCHIP_RK3188 15 bool "Support Rockchip RK3188" 16 select CPU_V7 17 select SPL_BOARD_INIT if SPL 18 select SUPPORT_SPL 19 select SPL 20 select SPL_CLK 21 select SPL_PINCTRL 22 select SPL_REGMAP 23 select SPL_SYSCON 24 select SPL_RAM 25 select SPL_DRIVERS_MISC_SUPPORT 26 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 27 select BOARD_LATE_INIT 28 select ROCKCHIP_BROM_HELPER 29 help 30 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 31 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 32 video interfaces, several memory options and video codec support. 33 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 34 UART, SPI, I2C and PWMs. 35 36config ROCKCHIP_RK322X 37 bool "Support Rockchip RK3228/RK3229" 38 select CPU_V7 39 select SUPPORT_SPL 40 select SPL 41 select ROCKCHIP_BROM_HELPER 42 select DEBUG_UART_BOARD_INIT 43 help 44 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 45 including NEON and GPU, Mali-400 graphics, several DDR3 options 46 and video codec support. Peripherals include Gigabit Ethernet, 47 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 48 49config ROCKCHIP_RK3288 50 bool "Support Rockchip RK3288" 51 select CPU_V7 52 select SPL_BOARD_INIT if SPL 53 select SUPPORT_SPL 54 select SPL 55 help 56 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 57 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 58 video interfaces supporting HDMI and eDP, several DDR3 options 59 and video codec support. Peripherals include Gigabit Ethernet, 60 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 61 62config ROCKCHIP_RK3328 63 bool "Support Rockchip RK3328" 64 select ARM64 65 help 66 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 67 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 68 video interfaces supporting HDMI and eDP, several DDR3 options 69 and video codec support. Peripherals include Gigabit Ethernet, 70 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 71 72config ROCKCHIP_RK3368 73 bool "Support Rockchip RK3368" 74 select ARM64 75 select SUPPORT_SPL 76 select SUPPORT_TPL 77 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 78 select TPL_NEEDS_SEPARATE_STACK if TPL 79 imply SPL_SEPARATE_BSS 80 imply SPL_SERIAL_SUPPORT 81 imply TPL_SERIAL_SUPPORT 82 select DEBUG_UART_BOARD_INIT 83 select SYS_NS16550 84 help 85 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 86 into a big and little cluster with 4 cores each) Cortex-A53 including 87 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 88 (for the little cluster), PowerVR G6110 based graphics, one video 89 output processor supporting LVDS/HDMI/eDP, several DDR3 options and 90 video codec support. 91 92 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 93 I2S, UARTs, SPI, I2C and PWMs. 94 95if ROCKCHIP_RK3368 96 97config TPL_LDSCRIPT 98 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" 99 100config TPL_TEXT_BASE 101 default 0xff8c1000 102 103config TPL_MAX_SIZE 104 default 28672 105 106config TPL_STACK 107 default 0xff8cffff 108 109endif 110 111config ROCKCHIP_RK3399 112 bool "Support Rockchip RK3399" 113 select ARM64 114 select SUPPORT_SPL 115 select SPL 116 select SPL_SEPARATE_BSS 117 select SPL_SERIAL_SUPPORT 118 select SPL_DRIVERS_MISC_SUPPORT 119 select DEBUG_UART_BOARD_INIT 120 select BOARD_LATE_INIT 121 select ROCKCHIP_BROM_HELPER 122 help 123 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 124 and quad-core Cortex-A53. 125 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 126 video interfaces supporting HDMI and eDP, several DDR3 options 127 and video codec support. Peripherals include Gigabit Ethernet, 128 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 129 130config ROCKCHIP_RV1108 131 bool "Support Rockchip RV1108" 132 select CPU_V7 133 help 134 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 135 and a DSP. 136 137config SPL_ROCKCHIP_BACK_TO_BROM 138 bool "SPL returns to bootrom" 139 default y if ROCKCHIP_RK3036 140 select ROCKCHIP_BROM_HELPER 141 depends on SPL 142 help 143 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 144 SPL will return to the boot rom, which will then load the U-Boot 145 binary to keep going on. 146 147config TPL_ROCKCHIP_BACK_TO_BROM 148 bool "TPL returns to bootrom" 149 default y if ROCKCHIP_RK3368 150 select ROCKCHIP_BROM_HELPER 151 depends on TPL 152 help 153 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 154 SPL will return to the boot rom, which will then load the U-Boot 155 binary to keep going on. 156 157config ROCKCHIP_BOOT_MODE_REG 158 hex "Rockchip boot mode flag register address" 159 default 0x200081c8 if ROCKCHIP_RK3036 160 default 0x20004040 if ROCKCHIP_RK3188 161 default 0x110005c8 if ROCKCHIP_RK322X 162 default 0xff730094 if ROCKCHIP_RK3288 163 default 0xff738200 if ROCKCHIP_RK3368 164 default 0xff320300 if ROCKCHIP_RK3399 165 default 0x10300580 if ROCKCHIP_RV1108 166 default 0 167 help 168 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 169 according to the value from this register. 170 171config ROCKCHIP_SPL_RESERVE_IRAM 172 hex "Size of IRAM reserved in SPL" 173 default 0x4000 174 help 175 SPL may need reserve memory for firmware loaded by SPL, whose load 176 address is in IRAM and may overlay with SPL text area if not 177 reserved. 178 179config ROCKCHIP_BROM_HELPER 180 bool 181 182config SPL_ROCKCHIP_EARLYRETURN_TO_BROM 183 bool "SPL requires early-return (for RK3188-style BROM) to BROM" 184 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 185 help 186 Some Rockchip BROM variants (e.g. on the RK3188) load the 187 first stage in segments and enter multiple times. E.g. on 188 the RK3188, the first 1KB of the first stage are loaded 189 first and entered; after returning to the BROM, the 190 remainder of the first stage is loaded, but the BROM 191 re-enters at the same address/to the same code as previously. 192 193 This enables support code in the BOOT0 hook for the SPL stage 194 to allow multiple entries. 195 196config TPL_ROCKCHIP_EARLYRETURN_TO_BROM 197 bool "TPL requires early-return (for RK3188-style BROM) to BROM" 198 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 199 help 200 Some Rockchip BROM variants (e.g. on the RK3188) load the 201 first stage in segments and enter multiple times. E.g. on 202 the RK3188, the first 1KB of the first stage are loaded 203 first and entered; after returning to the BROM, the 204 remainder of the first stage is loaded, but the BROM 205 re-enters at the same address/to the same code as previously. 206 207 This enables support code in the BOOT0 hook for the TPL stage 208 to allow multiple entries. 209 210config SPL_MMC_SUPPORT 211 default y if !SPL_ROCKCHIP_BACK_TO_BROM 212 213source "arch/arm/mach-rockchip/rk3036/Kconfig" 214source "arch/arm/mach-rockchip/rk3188/Kconfig" 215source "arch/arm/mach-rockchip/rk322x/Kconfig" 216source "arch/arm/mach-rockchip/rk3288/Kconfig" 217source "arch/arm/mach-rockchip/rk3328/Kconfig" 218source "arch/arm/mach-rockchip/rk3368/Kconfig" 219source "arch/arm/mach-rockchip/rk3399/Kconfig" 220source "arch/arm/mach-rockchip/rv1108/Kconfig" 221endif 222