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e5fd39c8 |
| 02-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchip u-boot-rockchip changes for 2019.04-rc1: * support for Chromebook Bob * full pinctrl driver using DTS propert
Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchip u-boot-rockchip changes for 2019.04-rc1: * support for Chromebook Bob * full pinctrl driver using DTS properties * documentation improvements * I2S support for some Rockchip SoCs
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bfb11abe |
| 02-Jan-2019 |
David Wu <david.wu@rock-chips.com> |
ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188 It seems that pinctrl is not requested for rk3188 SPL, remove it so that can save more space for SPL image size. Signed
ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188 It seems that pinctrl is not requested for rk3188 SPL, remove it so that can save more space for SPL image size. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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748ad078 |
| 30-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-imx-20190129' of git://git.denx.de/u-boot-imx For 2019.04
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5548c7a1 |
| 29-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-amlogic-20190129' of git://git.denx.de/u-boot-amlogic Adds pinconf support for the Amlogic pinctrl driver (fixed)
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2f41ade7 |
| 22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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b32ba6f1 |
| 22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
rockchip: Add TPL_MAX_SIZE for RK3288 Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288. Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Philipp Tomsich <philipp.t
rockchip: Add TPL_MAX_SIZE for RK3288 Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288. Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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9450ab2b |
| 05-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi - Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom
Merge branch 'master' of git://git.denx.de/u-boot-spi - Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom Rini <trini@konsulko.com>
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0a3d59e0 |
| 03-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model fr
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
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c1d6e0bb |
| 01-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'for-master-20181130' of git://git.denx.de/u-boot-rockchip Improvements: - RK3188 USB-UART functionality - errors triggering a hard-stop in SPL on the RK3399 are reported
Merge tag 'for-master-20181130' of git://git.denx.de/u-boot-rockchip Improvements: - RK3188 USB-UART functionality - errors triggering a hard-stop in SPL on the RK3399 are reported - Rockchip RV1108 (SoC) support - MicroCrystal RV3029 (RTC) DM driver Fixes: - RK3188 early UART setup - limit SD-card frequency to 40MHz on the RK3399-Q7 - MIPI fixes - RK3399 CPUB clock initialisation
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17e5f3a4 |
| 28-Nov-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3188: use board_debug_uart_init() for UART io init Sync with other rockchip SoCs, use board_debug_uart_init() to init default UART iomux. Signed-off-by: Kever Yang <
rockchip: rk3188: use board_debug_uart_init() for UART io init Sync with other rockchip SoCs, use board_debug_uart_init() to init default UART iomux. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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5b5ca4c0 |
| 08-Oct-2018 |
Heiko Stuebner <heiko@sntech.de> |
rockchip: rk3188: add support for usb-uart functionality Rockchip socs can route the debug uart pins through the d+ and d- pins of one specific usbphy per soc. Add a config option and im
rockchip: rk3188: add support for usb-uart functionality Rockchip socs can route the debug uart pins through the d+ and d- pins of one specific usbphy per soc. Add a config option and implement the setting on the rk3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Fixed up to mark grf as maybe unused:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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e8f80a5a |
| 09-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
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acf15001 |
| 26-Apr-2018 |
Lokesh Vutla <lokeshvutla@ti.com> |
arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders
arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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b25f8e21 |
| 30-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-imx
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abeb9d78 |
| 30-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
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ec37f05e |
| 26-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-usb
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641bce26 |
| 26-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sh
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d2a1f120 |
| 26-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
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c3c0331d |
| 18-Apr-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: enable SYS_NS16550 for all SoCs by default All rockchip SoCs can use ns16550 driver, enable it for all and set SYS_NS16550_MEM32 for all SoCs. Version-changes: 2 -
rockchip: enable SYS_NS16550 for all SoCs by default All rockchip SoCs can use ns16550 driver, enable it for all and set SYS_NS16550_MEM32 for all SoCs. Version-changes: 2 - use imply instead of select Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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4bafceff |
| 25-Feb-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mmc
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85447f78 |
| 25-Feb-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
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33554fce |
| 23-Feb-2018 |
Jagan Teki <jagannadh.teki@gmail.com> |
rockchip: rk3288: Fix wrong TPL_TEXT_BASE TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper al
rockchip: rk3288: Fix wrong TPL_TEXT_BASE TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper alignment which is causing the next instruction data 0xefffffff is moved. Hexdump with overlaped bytes: ----------------------------- 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff So, Fix the TEXT_BASE for proper aligned address 0xff704000 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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849f672b |
| 23-Feb-2018 |
Jagan Teki <jagannadh.teki@gmail.com> |
rockchip: rk3288: Add TPL_LDSCRIPT Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.l
rockchip: rk3288: Add TPL_LDSCRIPT Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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ab21ecef |
| 31-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze Xilinx changes for v2018.03 - Several Kconfig fixes (also moving configs to defconfigs) - Some DTS updates
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze Xilinx changes for v2018.03 - Several Kconfig fixes (also moving configs to defconfigs) - Some DTS updates - ZynqMP psu rework based on Zynq concept - Add low level initialization for zc770 and zcu102 - Add support for Zynq zc770 x16 nand configuration - Add mini nand/emmc ZynqMP targets - Some arasan nand changes
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bd39d864 |
| 28-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot Patch queue for efi - 2018-01-28 This is the second part of patches for 2018.03-rc1, fixing a few minor issues and a
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot Patch queue for efi - 2018-01-28 This is the second part of patches for 2018.03-rc1, fixing a few minor issues and adding a readme file for iSCSI booting.
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