xref: /openbmc/u-boot/arch/arm/mach-rockchip/Kconfig (revision b377d222)
12444dae5SSimon Glassif ARCH_ROCKCHIP
22444dae5SSimon Glass
3041cdb5fSHeiko Stübnerconfig ROCKCHIP_RK3036
4041cdb5fSHeiko Stübner	bool "Support Rockchip RK3036"
5041cdb5fSHeiko Stübner	select CPU_V7
6a381bcf5SKever Yang	select SUPPORT_SPL
7a381bcf5SKever Yang	select SPL
8041cdb5fSHeiko Stübner	help
9041cdb5fSHeiko Stübner	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
10041cdb5fSHeiko Stübner	  including NEON and GPU, Mali-400 graphics, several DDR3 options
11041cdb5fSHeiko Stübner	  and video codec support. Peripherals include Gigabit Ethernet,
12041cdb5fSHeiko Stübner	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
13041cdb5fSHeiko Stübner
140a2be69fSHeiko Stübnerconfig ROCKCHIP_RK3188
150a2be69fSHeiko Stübner	bool "Support Rockchip RK3188"
160a2be69fSHeiko Stübner	select CPU_V7
170680f1b1SLey Foon Tan	select SPL_BOARD_INIT if SPL
180a2be69fSHeiko Stübner	select SUPPORT_SPL
190a2be69fSHeiko Stübner	select SUPPORT_TPL
200a2be69fSHeiko Stübner	select SPL
210a2be69fSHeiko Stübner	select TPL
22008a610bSHeiko Stübner	select BOARD_LATE_INIT
230a2be69fSHeiko Stübner	select ROCKCHIP_BROM_HELPER
240a2be69fSHeiko Stübner	help
250a2be69fSHeiko Stübner	  The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
260a2be69fSHeiko Stübner	  including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
270a2be69fSHeiko Stübner	  video interfaces, several memory options and video codec support.
280a2be69fSHeiko Stübner	  Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
290a2be69fSHeiko Stübner	  UART, SPI, I2C and PWMs.
300a2be69fSHeiko Stübner
31168eef7aSKever Yangconfig ROCKCHIP_RK322X
32168eef7aSKever Yang	bool "Support Rockchip RK3228/RK3229"
33168eef7aSKever Yang	select CPU_V7
34168eef7aSKever Yang	select SUPPORT_SPL
35168eef7aSKever Yang	select SPL
36168eef7aSKever Yang	select ROCKCHIP_BROM_HELPER
37168eef7aSKever Yang	select DEBUG_UART_BOARD_INIT
38168eef7aSKever Yang	help
39168eef7aSKever Yang	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
40168eef7aSKever Yang	  including NEON and GPU, Mali-400 graphics, several DDR3 options
41168eef7aSKever Yang	  and video codec support. Peripherals include Gigabit Ethernet,
42168eef7aSKever Yang	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
43168eef7aSKever Yang
442444dae5SSimon Glassconfig ROCKCHIP_RK3288
452444dae5SSimon Glass	bool "Support Rockchip RK3288"
46e0f5dbcbSAndreas Färber	select CPU_V7
470680f1b1SLey Foon Tan	select SPL_BOARD_INIT if SPL
48a381bcf5SKever Yang	select SUPPORT_SPL
49a381bcf5SKever Yang	select SPL
502444dae5SSimon Glass	help
512444dae5SSimon Glass	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
522444dae5SSimon Glass	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
532444dae5SSimon Glass	  video interfaces supporting HDMI and eDP, several DDR3 options
542444dae5SSimon Glass	  and video codec support. Peripherals include Gigabit Ethernet,
55ef904bf2SAndreas Färber	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
562444dae5SSimon Glass
5785a3cfb8SKever Yangconfig ROCKCHIP_RK3328
5885a3cfb8SKever Yang	bool "Support Rockchip RK3328"
5985a3cfb8SKever Yang	select ARM64
6085a3cfb8SKever Yang	help
6185a3cfb8SKever Yang	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
6285a3cfb8SKever Yang	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
6385a3cfb8SKever Yang	  video interfaces supporting HDMI and eDP, several DDR3 options
6485a3cfb8SKever Yang	  and video codec support. Peripherals include Gigabit Ethernet,
6585a3cfb8SKever Yang	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
6685a3cfb8SKever Yang
6737a0c600SAndreas Färberconfig ROCKCHIP_RK3368
6837a0c600SAndreas Färber	bool "Support Rockchip RK3368"
6937a0c600SAndreas Färber	select ARM64
705071457eSPhilipp Tomsich	select SUPPORT_SPL
715071457eSPhilipp Tomsich	select SUPPORT_TPL
724cf4378eSPhilipp Tomsich	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
734cf4378eSPhilipp Tomsich	select TPL_NEEDS_SEPARATE_STACK if TPL
745071457eSPhilipp Tomsich	imply SPL_SEPARATE_BSS
755071457eSPhilipp Tomsich	imply SPL_SERIAL_SUPPORT
765071457eSPhilipp Tomsich	imply TPL_SERIAL_SUPPORT
775071457eSPhilipp Tomsich	select DEBUG_UART_BOARD_INIT
7837a0c600SAndreas Färber	select SYS_NS16550
7937a0c600SAndreas Färber	help
809a8f009fSPhilipp Tomsich	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
819a8f009fSPhilipp Tomsich	  into a big and little cluster with 4 cores each) Cortex-A53 including
829a8f009fSPhilipp Tomsich	  AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
839a8f009fSPhilipp Tomsich	  (for the little cluster), PowerVR G6110 based graphics, one video
849a8f009fSPhilipp Tomsich	  output processor supporting LVDS/HDMI/eDP, several DDR3 options and
859a8f009fSPhilipp Tomsich	  video codec support.
869a8f009fSPhilipp Tomsich
879a8f009fSPhilipp Tomsich	  On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
889a8f009fSPhilipp Tomsich	  I2S, UARTs, SPI, I2C and PWMs.
8937a0c600SAndreas Färber
90d9d1242bSPhilipp Tomsichif ROCKCHIP_RK3368
91d9d1242bSPhilipp Tomsich
92d9d1242bSPhilipp Tomsichconfig TPL_LDSCRIPT
93d9d1242bSPhilipp Tomsich	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
94d9d1242bSPhilipp Tomsich
955aa49af3SPhilipp Tomsichconfig TPL_TEXT_BASE
965aa49af3SPhilipp Tomsich        default 0xff8c1000
975aa49af3SPhilipp Tomsich
985aa49af3SPhilipp Tomsichconfig TPL_MAX_SIZE
995aa49af3SPhilipp Tomsich        default 28672
1005aa49af3SPhilipp Tomsich
1015aa49af3SPhilipp Tomsichconfig TPL_STACK
1025aa49af3SPhilipp Tomsich        default 0xff8cffff
1035aa49af3SPhilipp Tomsich
104d9d1242bSPhilipp Tomsichendif
105d9d1242bSPhilipp Tomsich
106a381bcf5SKever Yangconfig ROCKCHIP_RK3399
107a381bcf5SKever Yang	bool "Support Rockchip RK3399"
108a381bcf5SKever Yang	select ARM64
10966e87cc8SKever Yang	select SUPPORT_SPL
11066e87cc8SKever Yang	select SPL
11166e87cc8SKever Yang	select SPL_SEPARATE_BSS
112c0508e42SPhilipp Tomsich	select SPL_SERIAL_SUPPORT
113c0508e42SPhilipp Tomsich	select SPL_DRIVERS_MISC_SUPPORT
1147ee16de5SPhilipp Tomsich	select DEBUG_UART_BOARD_INIT
115a381bcf5SKever Yang	help
116a381bcf5SKever Yang	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
117a381bcf5SKever Yang	  and quad-core Cortex-A53.
118a381bcf5SKever Yang	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
119a381bcf5SKever Yang	  video interfaces supporting HDMI and eDP, several DDR3 options
120a381bcf5SKever Yang	  and video codec support. Peripherals include Gigabit Ethernet,
121a381bcf5SKever Yang	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
122a381bcf5SKever Yang
1232c1e11ddSAndy Yanconfig ROCKCHIP_RV1108
1242c1e11ddSAndy Yan	bool "Support Rockchip RV1108"
1252c1e11ddSAndy Yan	select CPU_V7
1262c1e11ddSAndy Yan	help
1272c1e11ddSAndy Yan	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
1282c1e11ddSAndy Yan	  and a DSP.
1292c1e11ddSAndy Yan
130ee14d29dSPhilipp Tomsichconfig SPL_ROCKCHIP_BACK_TO_BROM
131b47ea792SXu Ziyuan	bool "SPL returns to bootrom"
132b47ea792SXu Ziyuan	default y if ROCKCHIP_RK3036
1331d845947SHeiko Stübner	select ROCKCHIP_BROM_HELPER
134ee14d29dSPhilipp Tomsich	depends on SPL
135ee14d29dSPhilipp Tomsich	help
136ee14d29dSPhilipp Tomsich	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
137ee14d29dSPhilipp Tomsich          SPL will return to the boot rom, which will then load the U-Boot
138ee14d29dSPhilipp Tomsich          binary to keep going on.
139ee14d29dSPhilipp Tomsich
140ee14d29dSPhilipp Tomsichconfig TPL_ROCKCHIP_BACK_TO_BROM
141ee14d29dSPhilipp Tomsich	bool "TPL returns to bootrom"
142ee14d29dSPhilipp Tomsich	default y if ROCKCHIP_RK3368
143ee14d29dSPhilipp Tomsich	select ROCKCHIP_BROM_HELPER
144ee14d29dSPhilipp Tomsich	depends on TPL
145b47ea792SXu Ziyuan	help
146b47ea792SXu Ziyuan	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
147b47ea792SXu Ziyuan          SPL will return to the boot rom, which will then load the U-Boot
148b47ea792SXu Ziyuan          binary to keep going on.
149b47ea792SXu Ziyuan
150fa1392a2SKever Yangconfig ROCKCHIP_SPL_RESERVE_IRAM
151fa1392a2SKever Yang	hex "Size of IRAM reserved in SPL"
152fa1392a2SKever Yang	default 0x4000
153fa1392a2SKever Yang	help
154fa1392a2SKever Yang	  SPL may need reserve memory for firmware loaded by SPL, whose load
155fa1392a2SKever Yang	  address is in IRAM and may overlay with SPL text area if not
156fa1392a2SKever Yang	  reserved.
157fa1392a2SKever Yang
1581d845947SHeiko Stübnerconfig ROCKCHIP_BROM_HELPER
1591d845947SHeiko Stübner	bool
1601d845947SHeiko Stübner
161*b377d222SPhilipp Tomsichconfig SPL_ROCKCHIP_EARLYRETURN_TO_BROM
162*b377d222SPhilipp Tomsich        bool "SPL requires early-return (for RK3188-style BROM) to BROM"
163*b377d222SPhilipp Tomsich	depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
164*b377d222SPhilipp Tomsich	help
165*b377d222SPhilipp Tomsich	  Some Rockchip BROM variants (e.g. on the RK3188) load the
166*b377d222SPhilipp Tomsich	  first stage in segments and enter multiple times. E.g. on
167*b377d222SPhilipp Tomsich	  the RK3188, the first 1KB of the first stage are loaded
168*b377d222SPhilipp Tomsich	  first and entered; after returning to the BROM, the
169*b377d222SPhilipp Tomsich	  remainder of the first stage is loaded, but the BROM
170*b377d222SPhilipp Tomsich	  re-enters at the same address/to the same code as previously.
171*b377d222SPhilipp Tomsich
172*b377d222SPhilipp Tomsich	  This enables support code in the BOOT0 hook for the SPL stage
173*b377d222SPhilipp Tomsich	  to allow multiple entries.
174*b377d222SPhilipp Tomsich
175*b377d222SPhilipp Tomsichconfig TPL_ROCKCHIP_EARLYRETURN_TO_BROM
176*b377d222SPhilipp Tomsich        bool "TPL requires early-return (for RK3188-style BROM) to BROM"
177*b377d222SPhilipp Tomsich	depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
178*b377d222SPhilipp Tomsich	help
179*b377d222SPhilipp Tomsich	  Some Rockchip BROM variants (e.g. on the RK3188) load the
180*b377d222SPhilipp Tomsich	  first stage in segments and enter multiple times. E.g. on
181*b377d222SPhilipp Tomsich	  the RK3188, the first 1KB of the first stage are loaded
182*b377d222SPhilipp Tomsich	  first and entered; after returning to the BROM, the
183*b377d222SPhilipp Tomsich	  remainder of the first stage is loaded, but the BROM
184*b377d222SPhilipp Tomsich	  re-enters at the same address/to the same code as previously.
185*b377d222SPhilipp Tomsich
186*b377d222SPhilipp Tomsich	  This enables support code in the BOOT0 hook for the TPL stage
187*b377d222SPhilipp Tomsich	  to allow multiple entries.
188*b377d222SPhilipp Tomsich
189230e0e09SSandy Pattersonconfig SPL_MMC_SUPPORT
190ee14d29dSPhilipp Tomsich	default y if !SPL_ROCKCHIP_BACK_TO_BROM
191230e0e09SSandy Patterson
192be1d5e03Shuang linsource "arch/arm/mach-rockchip/rk3036/Kconfig"
1930a2be69fSHeiko Stübnersource "arch/arm/mach-rockchip/rk3188/Kconfig"
194b24a8ec1SKever Yangsource "arch/arm/mach-rockchip/rk322x/Kconfig"
195041cdb5fSHeiko Stübnersource "arch/arm/mach-rockchip/rk3288/Kconfig"
19685a3cfb8SKever Yangsource "arch/arm/mach-rockchip/rk3328/Kconfig"
19737a0c600SAndreas Färbersource "arch/arm/mach-rockchip/rk3368/Kconfig"
198a381bcf5SKever Yangsource "arch/arm/mach-rockchip/rk3399/Kconfig"
1992c1e11ddSAndy Yansource "arch/arm/mach-rockchip/rv1108/Kconfig"
2002444dae5SSimon Glassendif
201