12444dae5SSimon Glassif ARCH_ROCKCHIP 22444dae5SSimon Glass 3041cdb5fSHeiko Stübnerconfig ROCKCHIP_RK3036 4041cdb5fSHeiko Stübner bool "Support Rockchip RK3036" 5acf15001SLokesh Vutla select CPU_V7A 6a381bcf5SKever Yang select SUPPORT_SPL 7a381bcf5SKever Yang select SPL 8451dcf5cSEddie Cai imply USB_FUNCTION_ROCKUSB 9451dcf5cSEddie Cai imply CMD_ROCKUSB 10041cdb5fSHeiko Stübner help 11041cdb5fSHeiko Stübner The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 12041cdb5fSHeiko Stübner including NEON and GPU, Mali-400 graphics, several DDR3 options 13041cdb5fSHeiko Stübner and video codec support. Peripherals include Gigabit Ethernet, 14041cdb5fSHeiko Stübner USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 15041cdb5fSHeiko Stübner 16daeed1dbSKever Yangconfig ROCKCHIP_RK3128 17daeed1dbSKever Yang bool "Support Rockchip RK3128" 18acf15001SLokesh Vutla select CPU_V7A 19daeed1dbSKever Yang help 20daeed1dbSKever Yang The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 21daeed1dbSKever Yang including NEON and GPU, Mali-400 graphics, several DDR3 options 22daeed1dbSKever Yang and video codec support. Peripherals include Gigabit Ethernet, 23daeed1dbSKever Yang USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 24daeed1dbSKever Yang 250a2be69fSHeiko Stübnerconfig ROCKCHIP_RK3188 260a2be69fSHeiko Stübner bool "Support Rockchip RK3188" 27acf15001SLokesh Vutla select CPU_V7A 280680f1b1SLey Foon Tan select SPL_BOARD_INIT if SPL 290a2be69fSHeiko Stübner select SUPPORT_SPL 300a2be69fSHeiko Stübner select SPL 314bbb05bcSPhilipp Tomsich select SPL_CLK 324bbb05bcSPhilipp Tomsich select SPL_REGMAP 334bbb05bcSPhilipp Tomsich select SPL_SYSCON 344bbb05bcSPhilipp Tomsich select SPL_RAM 354bbb05bcSPhilipp Tomsich select SPL_DRIVERS_MISC_SUPPORT 364d9253fbSPhilipp Tomsich select SPL_ROCKCHIP_EARLYRETURN_TO_BROM 3717e5f3a4SKever Yang select DEBUG_UART_BOARD_INIT 38008a610bSHeiko Stübner select BOARD_LATE_INIT 390a2be69fSHeiko Stübner select ROCKCHIP_BROM_HELPER 400a2be69fSHeiko Stübner help 410a2be69fSHeiko Stübner The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 420a2be69fSHeiko Stübner including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two 430a2be69fSHeiko Stübner video interfaces, several memory options and video codec support. 440a2be69fSHeiko Stübner Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, 450a2be69fSHeiko Stübner UART, SPI, I2C and PWMs. 460a2be69fSHeiko Stübner 47168eef7aSKever Yangconfig ROCKCHIP_RK322X 48168eef7aSKever Yang bool "Support Rockchip RK3228/RK3229" 49acf15001SLokesh Vutla select CPU_V7A 50168eef7aSKever Yang select SUPPORT_SPL 51168eef7aSKever Yang select SPL 52168eef7aSKever Yang select ROCKCHIP_BROM_HELPER 53168eef7aSKever Yang select DEBUG_UART_BOARD_INIT 54168eef7aSKever Yang help 55168eef7aSKever Yang The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 56168eef7aSKever Yang including NEON and GPU, Mali-400 graphics, several DDR3 options 57168eef7aSKever Yang and video codec support. Peripherals include Gigabit Ethernet, 58168eef7aSKever Yang USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. 59168eef7aSKever Yang 602444dae5SSimon Glassconfig ROCKCHIP_RK3288 612444dae5SSimon Glass bool "Support Rockchip RK3288" 62acf15001SLokesh Vutla select CPU_V7A 630680f1b1SLey Foon Tan select SPL_BOARD_INIT if SPL 64a381bcf5SKever Yang select SUPPORT_SPL 65a381bcf5SKever Yang select SPL 66c3d098e7SEddie Cai imply USB_FUNCTION_ROCKUSB 67c3d098e7SEddie Cai imply CMD_ROCKUSB 682444dae5SSimon Glass help 692444dae5SSimon Glass The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 702444dae5SSimon Glass including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 712444dae5SSimon Glass video interfaces supporting HDMI and eDP, several DDR3 options 722444dae5SSimon Glass and video codec support. Peripherals include Gigabit Ethernet, 73ef904bf2SAndreas Färber USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 742444dae5SSimon Glass 75849f672bSJagan Tekiif ROCKCHIP_RK3288 76849f672bSJagan Teki 7733554fceSJagan Tekiconfig TPL_TEXT_BASE 7833554fceSJagan Teki default 0xff704000 7933554fceSJagan Teki 80*b32ba6f1STom Riniconfig TPL_MAX_SIZE 81*b32ba6f1STom Rini default 32768 82*b32ba6f1STom Rini 83849f672bSJagan Tekiendif 84849f672bSJagan Teki 8585a3cfb8SKever Yangconfig ROCKCHIP_RK3328 8685a3cfb8SKever Yang bool "Support Rockchip RK3328" 8785a3cfb8SKever Yang select ARM64 8885a3cfb8SKever Yang help 8985a3cfb8SKever Yang The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. 9085a3cfb8SKever Yang including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 9185a3cfb8SKever Yang video interfaces supporting HDMI and eDP, several DDR3 options 9285a3cfb8SKever Yang and video codec support. Peripherals include Gigabit Ethernet, 9385a3cfb8SKever Yang USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 9485a3cfb8SKever Yang 9537a0c600SAndreas Färberconfig ROCKCHIP_RK3368 9637a0c600SAndreas Färber bool "Support Rockchip RK3368" 9737a0c600SAndreas Färber select ARM64 985071457eSPhilipp Tomsich select SUPPORT_SPL 995071457eSPhilipp Tomsich select SUPPORT_TPL 1004cf4378eSPhilipp Tomsich select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL 1014cf4378eSPhilipp Tomsich select TPL_NEEDS_SEPARATE_STACK if TPL 1025071457eSPhilipp Tomsich imply SPL_SEPARATE_BSS 1035071457eSPhilipp Tomsich imply SPL_SERIAL_SUPPORT 1045071457eSPhilipp Tomsich imply TPL_SERIAL_SUPPORT 1055071457eSPhilipp Tomsich select DEBUG_UART_BOARD_INIT 10637a0c600SAndreas Färber help 1079a8f009fSPhilipp Tomsich The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised 1089a8f009fSPhilipp Tomsich into a big and little cluster with 4 cores each) Cortex-A53 including 1099a8f009fSPhilipp Tomsich AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache 1109a8f009fSPhilipp Tomsich (for the little cluster), PowerVR G6110 based graphics, one video 1119a8f009fSPhilipp Tomsich output processor supporting LVDS/HDMI/eDP, several DDR3 options and 1129a8f009fSPhilipp Tomsich video codec support. 1139a8f009fSPhilipp Tomsich 1149a8f009fSPhilipp Tomsich On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, 1159a8f009fSPhilipp Tomsich I2S, UARTs, SPI, I2C and PWMs. 11637a0c600SAndreas Färber 117d9d1242bSPhilipp Tomsichif ROCKCHIP_RK3368 118d9d1242bSPhilipp Tomsich 1195aa49af3SPhilipp Tomsichconfig TPL_TEXT_BASE 1205aa49af3SPhilipp Tomsich default 0xff8c1000 1215aa49af3SPhilipp Tomsich 1225aa49af3SPhilipp Tomsichconfig TPL_MAX_SIZE 1235aa49af3SPhilipp Tomsich default 28672 1245aa49af3SPhilipp Tomsich 1255aa49af3SPhilipp Tomsichconfig TPL_STACK 1265aa49af3SPhilipp Tomsich default 0xff8cffff 1275aa49af3SPhilipp Tomsich 128d9d1242bSPhilipp Tomsichendif 129d9d1242bSPhilipp Tomsich 130a381bcf5SKever Yangconfig ROCKCHIP_RK3399 131a381bcf5SKever Yang bool "Support Rockchip RK3399" 132a381bcf5SKever Yang select ARM64 13366e87cc8SKever Yang select SUPPORT_SPL 13466e87cc8SKever Yang select SPL 13566e87cc8SKever Yang select SPL_SEPARATE_BSS 136c0508e42SPhilipp Tomsich select SPL_SERIAL_SUPPORT 137c0508e42SPhilipp Tomsich select SPL_DRIVERS_MISC_SUPPORT 1387ee16de5SPhilipp Tomsich select DEBUG_UART_BOARD_INIT 139e3067793SAndy Yan select BOARD_LATE_INIT 140b4d23f76SAndy Yan select ROCKCHIP_BROM_HELPER 141a381bcf5SKever Yang help 142a381bcf5SKever Yang The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 143a381bcf5SKever Yang and quad-core Cortex-A53. 144a381bcf5SKever Yang including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two 145a381bcf5SKever Yang video interfaces supporting HDMI and eDP, several DDR3 options 146a381bcf5SKever Yang and video codec support. Peripherals include Gigabit Ethernet, 147a381bcf5SKever Yang USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. 148a381bcf5SKever Yang 1492c1e11ddSAndy Yanconfig ROCKCHIP_RV1108 1502c1e11ddSAndy Yan bool "Support Rockchip RV1108" 151acf15001SLokesh Vutla select CPU_V7A 1522c1e11ddSAndy Yan help 1532c1e11ddSAndy Yan The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 1542c1e11ddSAndy Yan and a DSP. 1552c1e11ddSAndy Yan 1565b5ca4c0SHeiko Stuebnerconfig ROCKCHIP_USB_UART 1575b5ca4c0SHeiko Stuebner bool "Route uart output to usb pins" 1585b5ca4c0SHeiko Stuebner help 1595b5ca4c0SHeiko Stuebner Rockchip SoCs have the ability to route the signals of the debug 1605b5ca4c0SHeiko Stuebner uart through the d+ and d- pins of a specific usb phy to enable 1615b5ca4c0SHeiko Stuebner some form of closed-case debugging. With this option supported 1625b5ca4c0SHeiko Stuebner SoCs will enable this routing as a debug measure. 1635b5ca4c0SHeiko Stuebner 164ee14d29dSPhilipp Tomsichconfig SPL_ROCKCHIP_BACK_TO_BROM 165b47ea792SXu Ziyuan bool "SPL returns to bootrom" 166b47ea792SXu Ziyuan default y if ROCKCHIP_RK3036 1671d845947SHeiko Stübner select ROCKCHIP_BROM_HELPER 168ee14d29dSPhilipp Tomsich depends on SPL 169ee14d29dSPhilipp Tomsich help 170ee14d29dSPhilipp Tomsich Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 171ee14d29dSPhilipp Tomsich SPL will return to the boot rom, which will then load the U-Boot 172ee14d29dSPhilipp Tomsich binary to keep going on. 173ee14d29dSPhilipp Tomsich 174ee14d29dSPhilipp Tomsichconfig TPL_ROCKCHIP_BACK_TO_BROM 175ee14d29dSPhilipp Tomsich bool "TPL returns to bootrom" 176ee14d29dSPhilipp Tomsich default y if ROCKCHIP_RK3368 177ee14d29dSPhilipp Tomsich select ROCKCHIP_BROM_HELPER 178ee14d29dSPhilipp Tomsich depends on TPL 179b47ea792SXu Ziyuan help 180b47ea792SXu Ziyuan Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, 181b47ea792SXu Ziyuan SPL will return to the boot rom, which will then load the U-Boot 182b47ea792SXu Ziyuan binary to keep going on. 183b47ea792SXu Ziyuan 184e3067793SAndy Yanconfig ROCKCHIP_BOOT_MODE_REG 185e3067793SAndy Yan hex "Rockchip boot mode flag register address" 186e3067793SAndy Yan default 0x200081c8 if ROCKCHIP_RK3036 187e3067793SAndy Yan default 0x20004040 if ROCKCHIP_RK3188 188e3067793SAndy Yan default 0x110005c8 if ROCKCHIP_RK322X 189e3067793SAndy Yan default 0xff730094 if ROCKCHIP_RK3288 190e3067793SAndy Yan default 0xff738200 if ROCKCHIP_RK3368 191e3067793SAndy Yan default 0xff320300 if ROCKCHIP_RK3399 192e3067793SAndy Yan default 0x10300580 if ROCKCHIP_RV1108 193e3067793SAndy Yan default 0 194e3067793SAndy Yan help 195e3067793SAndy Yan The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) 196e3067793SAndy Yan according to the value from this register. 197e3067793SAndy Yan 198fa1392a2SKever Yangconfig ROCKCHIP_SPL_RESERVE_IRAM 199fa1392a2SKever Yang hex "Size of IRAM reserved in SPL" 2008a8106f0SKever Yang default 0 201fa1392a2SKever Yang help 202fa1392a2SKever Yang SPL may need reserve memory for firmware loaded by SPL, whose load 203fa1392a2SKever Yang address is in IRAM and may overlay with SPL text area if not 204fa1392a2SKever Yang reserved. 205fa1392a2SKever Yang 2061d845947SHeiko Stübnerconfig ROCKCHIP_BROM_HELPER 2071d845947SHeiko Stübner bool 2081d845947SHeiko Stübner 209b377d222SPhilipp Tomsichconfig SPL_ROCKCHIP_EARLYRETURN_TO_BROM 210b377d222SPhilipp Tomsich bool "SPL requires early-return (for RK3188-style BROM) to BROM" 211b377d222SPhilipp Tomsich depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK 212b377d222SPhilipp Tomsich help 213b377d222SPhilipp Tomsich Some Rockchip BROM variants (e.g. on the RK3188) load the 214b377d222SPhilipp Tomsich first stage in segments and enter multiple times. E.g. on 215b377d222SPhilipp Tomsich the RK3188, the first 1KB of the first stage are loaded 216b377d222SPhilipp Tomsich first and entered; after returning to the BROM, the 217b377d222SPhilipp Tomsich remainder of the first stage is loaded, but the BROM 218b377d222SPhilipp Tomsich re-enters at the same address/to the same code as previously. 219b377d222SPhilipp Tomsich 220b377d222SPhilipp Tomsich This enables support code in the BOOT0 hook for the SPL stage 221b377d222SPhilipp Tomsich to allow multiple entries. 222b377d222SPhilipp Tomsich 223b377d222SPhilipp Tomsichconfig TPL_ROCKCHIP_EARLYRETURN_TO_BROM 224b377d222SPhilipp Tomsich bool "TPL requires early-return (for RK3188-style BROM) to BROM" 225b377d222SPhilipp Tomsich depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK 226b377d222SPhilipp Tomsich help 227b377d222SPhilipp Tomsich Some Rockchip BROM variants (e.g. on the RK3188) load the 228b377d222SPhilipp Tomsich first stage in segments and enter multiple times. E.g. on 229b377d222SPhilipp Tomsich the RK3188, the first 1KB of the first stage are loaded 230b377d222SPhilipp Tomsich first and entered; after returning to the BROM, the 231b377d222SPhilipp Tomsich remainder of the first stage is loaded, but the BROM 232b377d222SPhilipp Tomsich re-enters at the same address/to the same code as previously. 233b377d222SPhilipp Tomsich 234b377d222SPhilipp Tomsich This enables support code in the BOOT0 hook for the TPL stage 235b377d222SPhilipp Tomsich to allow multiple entries. 236b377d222SPhilipp Tomsich 237230e0e09SSandy Pattersonconfig SPL_MMC_SUPPORT 238ee14d29dSPhilipp Tomsich default y if !SPL_ROCKCHIP_BACK_TO_BROM 239230e0e09SSandy Patterson 240be1d5e03Shuang linsource "arch/arm/mach-rockchip/rk3036/Kconfig" 241daeed1dbSKever Yangsource "arch/arm/mach-rockchip/rk3128/Kconfig" 2420a2be69fSHeiko Stübnersource "arch/arm/mach-rockchip/rk3188/Kconfig" 243b24a8ec1SKever Yangsource "arch/arm/mach-rockchip/rk322x/Kconfig" 244041cdb5fSHeiko Stübnersource "arch/arm/mach-rockchip/rk3288/Kconfig" 24585a3cfb8SKever Yangsource "arch/arm/mach-rockchip/rk3328/Kconfig" 24637a0c600SAndreas Färbersource "arch/arm/mach-rockchip/rk3368/Kconfig" 247a381bcf5SKever Yangsource "arch/arm/mach-rockchip/rk3399/Kconfig" 2482c1e11ddSAndy Yansource "arch/arm/mach-rockchip/rv1108/Kconfig" 2492444dae5SSimon Glassendif 250