1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) ASPEED Technology Inc.
4 * Ryan Chen <ryan_chen@aspeedtech.com>
5 */
6
7 #include <common.h>
8 #include <errno.h>
9 #include <asm/io.h>
10 #include <asm/arch/platform.h>
11 #include <asm/arch/aspeed_scu_info.h>
12
13 /* SoC mapping Table */
14 #define SOC_ID(str, rev) { .name = str, .rev_id = rev, }
15
16 struct soc_id {
17 const char *name;
18 u32 rev_id;
19 };
20
21 static struct soc_id soc_map_table[] = {
22 SOC_ID("AST1100/AST2050-A0", 0x00000200),
23 SOC_ID("AST1100/AST2050-A1", 0x00000201),
24 SOC_ID("AST1100/AST2050-A2,3/AST2150-A0,1", 0x00000202),
25 SOC_ID("AST1510/AST2100-A0", 0x00000300),
26 SOC_ID("AST1510/AST2100-A1", 0x00000301),
27 SOC_ID("AST1510/AST2100-A2,3", 0x00000302),
28 SOC_ID("AST2200-A0,1", 0x00000102),
29 SOC_ID("AST2300-A0", 0x01000003),
30 SOC_ID("AST2300-A1", 0x01010303),
31 SOC_ID("AST1300-A1", 0x01010003),
32 SOC_ID("AST1050-A1", 0x01010203),
33 SOC_ID("AST2400-A0", 0x02000303),
34 SOC_ID("AST2400-A1", 0x02010303),
35 SOC_ID("AST1010-A0", 0x03000003),
36 SOC_ID("AST1010-A1", 0x03010003),
37 SOC_ID("AST3200-A0", 0x04002003),
38 SOC_ID("AST3200-A1", 0x04012003),
39 SOC_ID("AST3200-A2", 0x04032003),
40 SOC_ID("AST1520-A0", 0x03000203),
41 SOC_ID("AST1520-A1", 0x03010203),
42 SOC_ID("AST2510-A0", 0x04000103),
43 SOC_ID("AST2510-A1", 0x04010103),
44 SOC_ID("AST2510-A2", 0x04030103),
45 SOC_ID("AST2520-A0", 0x04000203),
46 SOC_ID("AST2520-A1", 0x04010203),
47 SOC_ID("AST2520-A2", 0x04030203),
48 SOC_ID("AST2500-A0", 0x04000303),
49 SOC_ID("AST2500-A1", 0x04010303),
50 SOC_ID("AST2500-A2", 0x04030303),
51 SOC_ID("AST2530-A0", 0x04000403),
52 SOC_ID("AST2530-A1", 0x04010403),
53 SOC_ID("AST2530-A2", 0x04030403),
54 SOC_ID("AST2600-A0", 0x05000303),
55 };
56
aspeed_print_soc_id(void)57 void aspeed_print_soc_id(void)
58 {
59 int i;
60 u32 rev_id = readl(ASPEED_REVISION_ID);
61 for (i = 0; i < ARRAY_SIZE(soc_map_table); i++) {
62 if (rev_id == soc_map_table[i].rev_id)
63 break;
64 }
65 if (i == ARRAY_SIZE(soc_map_table))
66 printf("UnKnow-SOC : %x \n",rev_id);
67 else
68 printf("SOC : %4s \n",soc_map_table[i].name);
69 }
70
aspeed_get_mac_phy_interface(u8 num)71 int aspeed_get_mac_phy_interface(u8 num)
72 {
73 u32 strap1 = readl(ASPEED_HW_STRAP1);
74 switch(num) {
75 case 0:
76 if(strap1 & BIT(6)) {
77 return 1;
78 } else {
79 return 0;
80 }
81 break;
82 case 1:
83 if(strap1 & BIT(7)) {
84 return 1;
85 } else {
86 return 0;
87 }
88 break;
89 }
90 return -1;
91 }
92
aspeed_print_security_info(void)93 void aspeed_print_security_info(void)
94 {
95 return;
96 }
97
98 /* ASPEED_SYS_RESET_CTRL : System reset contrl/status register*/
99 #define SYS_WDT3_RESET BIT(4)
100 #define SYS_WDT2_RESET BIT(3)
101 #define SYS_WDT1_RESET BIT(2)
102 #define SYS_EXT_RESET BIT(1)
103 #define SYS_PWR_RESET_FLAG BIT(0)
104
aspeed_print_sysrst_info(void)105 void aspeed_print_sysrst_info(void)
106 {
107 u32 rest = readl(ASPEED_SYS_RESET_CTRL);
108
109 if (rest & SYS_WDT1_RESET) {
110 printf("RST : WDT1 \n");
111 writel(readl(ASPEED_SYS_RESET_CTRL) & ~SYS_WDT1_RESET, ASPEED_SYS_RESET_CTRL);
112 }
113 if (rest & SYS_WDT2_RESET) {
114 printf("RST : WDT2 - 2nd Boot \n");
115 writel(readl(ASPEED_SYS_RESET_CTRL) & ~SYS_WDT2_RESET, ASPEED_SYS_RESET_CTRL);
116 if(readl(0x1e785030) & BIT(1))
117 puts("second boot\n");
118 else
119 puts("default boot\n");
120 }
121 if (rest & SYS_WDT3_RESET) {
122 printf("RST : WDT3 - Boot\n");
123 writel(readl(ASPEED_SYS_RESET_CTRL) & ~SYS_WDT3_RESET, ASPEED_SYS_RESET_CTRL);
124 }
125 if(rest & SYS_EXT_RESET) {
126 printf("RST : External \n");
127 writel(readl(ASPEED_SYS_RESET_CTRL) & ~SYS_EXT_RESET, ASPEED_SYS_RESET_CTRL);
128 }
129 if (rest & SYS_PWR_RESET_FLAG) {
130 printf("RST : Power On \n");
131 writel(readl(ASPEED_SYS_RESET_CTRL) & ~SYS_PWR_RESET_FLAG, ASPEED_SYS_RESET_CTRL);
132 }
133 }
134
135 #define SOC_FW_INIT_DRAM BIT(7)
136
aspeed_print_dram_initializer(void)137 void aspeed_print_dram_initializer(void)
138 {
139 if(readl(ASPEED_VGA_HANDSHAKE0) & SOC_FW_INIT_DRAM)
140 printf("[init by SOC]\n");
141 else
142 printf("[init by VBIOS]\n");
143 }
144
aspeed_print_2nd_wdt_mode(void)145 void aspeed_print_2nd_wdt_mode(void)
146 {
147 if(readl(ASPEED_HW_STRAP1) & BIT(17))
148 printf("2nd Boot : Enable\n");
149 }
150
aspeed_print_spi_strap_mode(void)151 void aspeed_print_spi_strap_mode(void)
152 {
153 return;
154 }
155
aspeed_print_espi_mode(void)156 void aspeed_print_espi_mode(void)
157 {
158 return;
159 }
160
aspeed_print_mac_info(void)161 void aspeed_print_mac_info(void)
162 {
163 int i;
164 printf("Eth : ");
165 for (i = 0; i < ASPEED_MAC_COUNT; i++) {
166 printf("MAC%d: %s, ", i,
167 aspeed_get_mac_phy_interface(i) ? "RGMII" : "RMII/NCSI");
168 if (i != (ASPEED_MAC_COUNT -1))
169 printf(", ");
170 }
171 printf("\n");
172 }
173