1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018 NXP
4  */
5 
6 #ifndef _FSL_ICID_H_
7 #define _FSL_ICID_H_
8 
9 #include <asm/types.h>
10 #include <fsl_qbman.h>
11 #include <fsl_sec.h>
12 
13 struct icid_id_table {
14 	const char *compat;
15 	u32 id;
16 	u32 reg;
17 	phys_addr_t compat_addr;
18 	phys_addr_t reg_addr;
19 };
20 
21 struct fman_icid_id_table {
22 	u32 port_id;
23 	u32 icid;
24 };
25 
26 u32 get_ppid_icid(int ppid_tbl_idx, int ppid);
27 int fdt_get_smmu_phandle(void *blob);
28 int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids);
29 void set_icids(void);
30 void fdt_fixup_icid(void *blob);
31 
32 #define SET_ICID_ENTRY(name, idA, regA, addr, compataddr) \
33 	{ .compat = name, \
34 	  .id = idA, \
35 	  .reg = regA, \
36 	  .compat_addr = compataddr, \
37 	  .reg_addr = addr, \
38 	}
39 
40 #define SET_SCFG_ICID(compat, streamid, name, compataddr) \
41 	SET_ICID_ENTRY(compat, streamid, (((streamid) << 24) | (1 << 23)), \
42 		offsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \
43 		compataddr)
44 
45 #define SET_USB_ICID(usb_num, compat, streamid) \
46 	SET_SCFG_ICID(compat, streamid, usb##usb_num##_icid,\
47 		CONFIG_SYS_XHCI_USB##usb_num##_ADDR)
48 
49 #define SET_SATA_ICID(compat, streamid) \
50 	SET_SCFG_ICID(compat, streamid, sata_icid,\
51 		AHCI_BASE_ADDR)
52 
53 #define SET_SDHC_ICID(streamid) \
54 	SET_SCFG_ICID("fsl,esdhc", streamid, sdhc_icid,\
55 		CONFIG_SYS_FSL_ESDHC_ADDR)
56 
57 #define SET_QDMA_ICID(compat, streamid) \
58 	SET_ICID_ENTRY(compat, streamid, (1 << 31) | (streamid), \
59 		QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \
60 		QDMA_BASE_ADDR), \
61 	SET_ICID_ENTRY(NULL, streamid, (1 << 31) | (streamid), \
62 		QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \
63 		QDMA_BASE_ADDR)
64 
65 #define SET_EDMA_ICID(streamid) \
66 	SET_SCFG_ICID("fsl,vf610-edma", streamid, edma_icid,\
67 		EDMA_BASE_ADDR)
68 
69 #define SET_ETR_ICID(streamid) \
70 	SET_SCFG_ICID(NULL, streamid, etr_icid, 0)
71 
72 #define SET_DEBUG_ICID(streamid) \
73 	SET_SCFG_ICID(NULL, streamid, debug_icid, 0)
74 
75 #define SET_QE_ICID(streamid) \
76 	SET_SCFG_ICID("fsl,qe", streamid, qe_icid,\
77 		QE_BASE_ADDR)
78 
79 #define SET_QMAN_ICID(streamid) \
80 	SET_ICID_ENTRY("fsl,qman", streamid, streamid, \
81 		offsetof(struct ccsr_qman, liodnr) + \
82 		CONFIG_SYS_FSL_QMAN_ADDR, \
83 		CONFIG_SYS_FSL_QMAN_ADDR)
84 
85 #define SET_BMAN_ICID(streamid) \
86 	SET_ICID_ENTRY("fsl,bman", streamid, streamid, \
87 		offsetof(struct ccsr_bman, liodnr) + \
88 		CONFIG_SYS_FSL_BMAN_ADDR, \
89 		CONFIG_SYS_FSL_BMAN_ADDR)
90 
91 #define SET_FMAN_ICID_ENTRY(_port_id, streamid) \
92 	{ .port_id = (_port_id), .icid = (streamid) }
93 
94 #define SET_SEC_QI_ICID(streamid) \
95 	SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
96 		(((streamid) << 16) | (streamid)), \
97 		offsetof(ccsr_sec_t, qilcr_ls) + \
98 		CONFIG_SYS_FSL_SEC_ADDR, \
99 		CONFIG_SYS_FSL_SEC_ADDR)
100 
101 #define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
102 	SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \
103 		(((streamid) << 16) | (streamid)), \
104 		offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
105 		CONFIG_SYS_FSL_SEC_ADDR, \
106 		FSL_SEC_JR##jr_num##_BASE_ADDR)
107 
108 #define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \
109 	SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
110 		offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \
111 		CONFIG_SYS_FSL_SEC_ADDR, 0)
112 
113 #define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \
114 	SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
115 		offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \
116 		CONFIG_SYS_FSL_SEC_ADDR, 0)
117 
118 extern struct icid_id_table icid_tbl[];
119 extern struct fman_icid_id_table fman_icid_tbl[];
120 extern int icid_tbl_sz;
121 extern int fman_icid_tbl_sz;
122 
123 #endif
124