1/*
2 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
3 *
4 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/dts-v1/;
12
13#include "am33xx.dtsi"
14#include <dt-bindings/interrupt-controller/irq.h>
15
16/ {
17	cpus {
18		cpu@0 {
19			cpu0-supply = <&vdd1_reg>;
20		};
21	};
22
23	memory@80000000 {
24		device_type = "memory";
25		reg = <0x80000000 0x10000000>; /* 256 MB */
26	};
27
28	leds {
29		pinctrl-names = "default";
30		pinctrl-0 = <&leds_pins>;
31
32		compatible = "gpio-leds";
33
34		led0 {
35			label = "com:green:user";
36			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
37			default-state = "on";
38		};
39	};
40
41	vbat: fixedregulator0 {
42		compatible = "regulator-fixed";
43		regulator-name = "vbat";
44		regulator-min-microvolt = <5000000>;
45		regulator-max-microvolt = <5000000>;
46		regulator-boot-on;
47	};
48
49	vmmc: fixedregulator1 {
50		compatible = "regulator-fixed";
51		regulator-name = "vmmc";
52		regulator-min-microvolt = <3300000>;
53		regulator-max-microvolt = <3300000>;
54	};
55};
56
57&am33xx_pinmux {
58	i2c0_pins: pinmux_i2c0_pins {
59		pinctrl-single,pins = <
60			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
61			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
62		>;
63	};
64
65	nandflash_pins: pinmux_nandflash_pins {
66		pinctrl-single,pins = <
67			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
68			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
69			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
70			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
71			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
72			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
73			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
74			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
75			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
76			AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
77			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0 */
78			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
79			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
80			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
81			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
82		>;
83	};
84
85	uart0_pins: pinmux_uart0_pins {
86		pinctrl-single,pins = <
87			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
88			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
89		>;
90	};
91
92	leds_pins: pinmux_leds_pins {
93		pinctrl-single,pins = <
94			AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a7.gpio1_23 */
95		>;
96	};
97};
98
99&mac {
100	status = "okay";
101};
102
103&davinci_mdio {
104	status = "okay";
105};
106
107&cpsw_emac0 {
108	phy_id = <&davinci_mdio>, <0>;
109	phy-mode = "rmii";
110};
111
112&cpsw_emac1 {
113	phy_id = <&davinci_mdio>, <1>;
114	phy-mode = "rmii";
115};
116
117&phy_sel {
118	rmii-clock-ext;
119};
120
121&elm {
122	status = "okay";
123};
124
125&gpmc {
126	status = "okay";
127	pinctrl-names = "default";
128	pinctrl-0 = <&nandflash_pins>;
129
130	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
131
132	nand@0,0 {
133		compatible = "ti,omap2-nand";
134		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
135		interrupt-parent = <&gpmc>;
136		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
137			     <1 IRQ_TYPE_NONE>;	/* termcount */
138		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
139		nand-bus-width = <8>;
140		ti,nand-ecc-opt = "bch8";
141		gpmc,device-width = <1>;
142		gpmc,sync-clk-ps = <0>;
143		gpmc,cs-on-ns = <0>;
144		gpmc,cs-rd-off-ns = <44>;
145		gpmc,cs-wr-off-ns = <44>;
146		gpmc,adv-on-ns = <6>;
147		gpmc,adv-rd-off-ns = <34>;
148		gpmc,adv-wr-off-ns = <44>;
149		gpmc,we-on-ns = <0>;
150		gpmc,we-off-ns = <40>;
151		gpmc,oe-on-ns = <0>;
152		gpmc,oe-off-ns = <54>;
153		gpmc,access-ns = <64>;
154		gpmc,rd-cycle-ns = <82>;
155		gpmc,wr-cycle-ns = <82>;
156		gpmc,bus-turnaround-ns = <0>;
157		gpmc,cycle2cycle-delay-ns = <0>;
158		gpmc,clk-activation-ns = <0>;
159		gpmc,wr-access-ns = <40>;
160		gpmc,wr-data-mux-bus-ns = <0>;
161
162		#address-cells = <1>;
163		#size-cells = <1>;
164		ti,elm-id = <&elm>;
165
166		/* MTD partition table */
167		partition@0 {
168			label = "SPL";
169			reg = <0x00000000 0x000080000>;
170		};
171
172		partition@1 {
173			label = "U-boot";
174			reg = <0x00080000 0x001e0000>;
175		};
176
177		partition@2 {
178			label = "U-Boot Env";
179			reg = <0x00260000 0x00020000>;
180		};
181
182		partition@3 {
183			label = "Kernel";
184			reg = <0x00280000 0x00500000>;
185		};
186
187		partition@4 {
188			label = "File System";
189			reg = <0x00780000 0x007880000>;
190		};
191	};
192};
193
194&i2c0 {
195	status = "okay";
196	pinctrl-names = "default";
197	pinctrl-0 = <&i2c0_pins>;
198
199	clock-frequency = <400000>;
200
201	tps: tps@2d {
202		reg = <0x2d>;
203	};
204};
205
206&mmc1 {
207	status = "okay";
208	vmmc-supply = <&vmmc>;
209	bus-width = <4>;
210};
211
212&uart0 {
213	status = "okay";
214	pinctrl-names = "default";
215	pinctrl-0 = <&uart0_pins>;
216};
217
218&usb {
219	status = "okay";
220};
221
222&usb_ctrl_mod {
223	status = "okay";
224};
225
226&usb0_phy {
227	status = "okay";
228};
229
230&usb1_phy {
231	status = "okay";
232};
233
234&usb0 {
235	status = "okay";
236};
237
238&usb1 {
239	status = "okay";
240	dr_mode = "host";
241};
242
243&cppi41dma  {
244	status = "okay";
245};
246
247#include "tps65910.dtsi"
248
249&tps {
250	vcc1-supply = <&vbat>;
251	vcc2-supply = <&vbat>;
252	vcc3-supply = <&vbat>;
253	vcc4-supply = <&vbat>;
254	vcc5-supply = <&vbat>;
255	vcc6-supply = <&vbat>;
256	vcc7-supply = <&vbat>;
257	vccio-supply = <&vbat>;
258
259	regulators {
260		vrtc_reg: regulator@0 {
261			regulator-always-on;
262		};
263
264		vio_reg: regulator@1 {
265			regulator-always-on;
266		};
267
268		vdd1_reg: regulator@2 {
269			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
270			regulator-name = "vdd_mpu";
271			regulator-min-microvolt = <912500>;
272			regulator-max-microvolt = <1312500>;
273			regulator-boot-on;
274			regulator-always-on;
275		};
276
277		vdd2_reg: regulator@3 {
278			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
279			regulator-name = "vdd_core";
280			regulator-min-microvolt = <912500>;
281			regulator-max-microvolt = <1150000>;
282			regulator-boot-on;
283			regulator-always-on;
284		};
285
286		vdd3_reg: regulator@4 {
287			regulator-always-on;
288		};
289
290		vdig1_reg: regulator@5 {
291			regulator-always-on;
292		};
293
294		vdig2_reg: regulator@6 {
295			regulator-always-on;
296		};
297
298		vpll_reg: regulator@7 {
299			regulator-always-on;
300		};
301
302		vdac_reg: regulator@8 {
303			regulator-always-on;
304		};
305
306		vaux1_reg: regulator@9 {
307			regulator-always-on;
308		};
309
310		vaux2_reg: regulator@10 {
311			regulator-always-on;
312		};
313
314		vaux33_reg: regulator@11 {
315			regulator-always-on;
316		};
317
318		vmmc_reg: regulator@12 {
319			regulator-always-on;
320		};
321	};
322};
323
324