xref: /openbmc/u-boot/arch/arc/Kconfig (revision c68c03f5)
1menu "ARC architecture"
2	depends on ARC
3
4config SYS_ARCH
5	default "arc"
6
7config SYS_CPU
8	default "arcv1" if ISA_ARCOMPACT
9	default "arcv2" if ISA_ARCV2
10
11choice
12	prompt "ARC Instruction Set"
13	default ISA_ARCOMPACT
14
15config ISA_ARCOMPACT
16	bool "ARCompact ISA"
17	help
18	  The original ARC ISA of ARC600/700 cores
19
20config ISA_ARCV2
21	bool "ARC ISA v2"
22	help
23	  ISA for the Next Generation ARC-HS cores
24
25endchoice
26
27choice
28	prompt "CPU selection"
29	default CPU_ARC770D if ISA_ARCOMPACT
30	default CPU_ARCHS38 if ISA_ARCV2
31
32config CPU_ARC750D
33	bool "ARC 750D"
34	select ARC_MMU_V2
35	depends on ISA_ARCOMPACT
36	help
37	  Choose this option to build an U-Boot for ARC750D CPU.
38
39config CPU_ARC770D
40	bool "ARC 770D"
41	select ARC_MMU_V3
42	depends on ISA_ARCOMPACT
43	help
44	  Choose this option to build an U-Boot for ARC770D CPU.
45
46config CPU_ARCEM6
47	bool "ARC EM6"
48	select ARC_MMU_ABSENT
49	depends on ISA_ARCV2
50	help
51	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
52
53config CPU_ARCHS36
54	bool "ARC HS36"
55	select ARC_MMU_ABSENT
56	depends on ISA_ARCV2
57	help
58	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
59
60config CPU_ARCHS38
61	bool "ARC HS38"
62	select ARC_MMU_V4
63	depends on ISA_ARCV2
64	help
65	  Next Generation ARC Core based on ISA-v2 ISA with MMU.
66
67endchoice
68
69choice
70	prompt "MMU Version"
71	default ARC_MMU_V3 if CPU_ARC770D
72	default ARC_MMU_V2 if CPU_ARC750D
73	default ARC_MMU_ABSENT if CPU_ARCEM6
74	default ARC_MMU_ABSENT if CPU_ARCHS36
75	default ARC_MMU_V4 if CPU_ARCHS38
76
77config ARC_MMU_ABSENT
78	bool "No MMU"
79	help
80	  No MMU
81
82config ARC_MMU_V2
83	bool "MMU v2"
84	depends on CPU_ARC750D
85	help
86	  Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
87	  when 2 D-TLB and 1 I-TLB entries index into same 2way set.
88
89config ARC_MMU_V3
90	bool "MMU v3"
91	depends on CPU_ARC770D
92	help
93	  Introduced with ARC700 4.10: New Features
94	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
95	  Shared Address Spaces (SASID)
96
97config ARC_MMU_V4
98	bool "MMU v4"
99	depends on CPU_ARCHS38
100	help
101	  Introduced as a part of ARC HS38 release.
102
103endchoice
104
105config CPU_BIG_ENDIAN
106	bool "Enable Big Endian Mode"
107	default n
108	help
109	  Build kernel for Big Endian Mode of ARC CPU
110
111config SYS_ICACHE_OFF
112	bool "Do not use Instruction Cache"
113	default n
114
115config SYS_DCACHE_OFF
116	bool "Do not use Data Cache"
117	default n
118
119choice
120	prompt "Target select"
121	default TARGET_AXS103
122
123config TARGET_TB100
124	bool "Support tb100"
125
126config TARGET_NSIM
127	bool "Support standalone nSIM & Free nSIM"
128
129config TARGET_AXS101
130	bool "Support Synopsys Designware SDP board AXS101"
131
132config TARGET_AXS103
133	bool "Support Synopsys Designware SDP board AXS103"
134
135config TARGET_HSDK
136	bool "Support Synpsys HS DevelopmentKit board"
137
138endchoice
139
140source "board/abilis/tb100/Kconfig"
141source "board/synopsys/Kconfig"
142source "board/synopsys/axs10x/Kconfig"
143source "board/synopsys/hsdk/Kconfig"
144
145endmenu
146