1 // Copyright (c) 2020 Intel Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //      http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 #pragma once
15 
16 #include <peci.h>
17 
18 #include <boost/asio/io_context.hpp>
19 #include <sdbusplus/asio/connection.hpp>
20 
21 #include <bitset>
22 #include <iostream>
23 
24 namespace cpu_info
25 {
26 namespace sst
27 {
28 
29 /**
30  * Retrieve all SST configuration info for all discoverable CPUs, and publish
31  * the info on new D-Bus objects on the given bus connection.
32  *
33  * This function may block until all discovery is completed (many seconds), or
34  * it may schedule the work to be done at a later time (on the given ASIO
35  * context) if CPUs are not currently available, and may also schedule periodic
36  * work to be done after initial discovery is completed.
37  *
38  * @param[in,out]   ioc     ASIO IO context/service
39  * @param[in,out]   conn    D-Bus ASIO connection.
40  */
41 void init(boost::asio::io_context& ioc,
42           const std::shared_ptr<sdbusplus::asio::connection>& conn);
43 
44 class PECIError : public std::runtime_error
45 {
46     using std::runtime_error::runtime_error;
47 };
48 
49 bool checkPECIStatus(EPECIStatus libStatus, uint8_t completionCode);
50 
51 constexpr int extendedModel(CPUModel model)
52 {
53     return (model >> 16) & 0xF;
54 }
55 
56 /**
57  * Construct a list of indexes of the set bits in the input value.
58  * E.g. fn(0x7A) -> {1,3,4,5,6}
59  *
60  * @param[in]   mask    Bitmask to convert.
61  *
62  * @return  List of bit indexes.
63  */
64 static std::vector<uint32_t> convertMaskToList(std::bitset<64> mask)
65 {
66     std::vector<uint32_t> bitList;
67     for (size_t i = 0; i < mask.size(); ++i)
68     {
69         if (mask.test(i))
70         {
71             bitList.push_back(i);
72         }
73     }
74     return bitList;
75 }
76 
77 using TurboEntry = std::tuple<uint32_t, size_t>;
78 
79 /**
80  * Abstract interface that must be implemented by backends, allowing discovery
81  * and control of a single CPU package.
82  */
83 class SSTInterface
84 {
85   public:
86     virtual ~SSTInterface()
87     {}
88 
89     /**
90      * Whether the interface is ready to be used, or we need to wait longer. The
91      * backend may need to wait e.g. for the host BIOS to initialize the
92      * interface.
93      */
94     virtual bool ready() = 0;
95 
96     /** Whether the processor supports the control ("set") functions. */
97     virtual bool supportsControl() = 0;
98 
99     /** Whether SST-PP is enabled on the processor. */
100     virtual bool ppEnabled() = 0;
101     /** Return the current SST-PP configuration level */
102     virtual unsigned int currentLevel() = 0;
103     /** Return the maximum valid SST-PP configuration level */
104     virtual unsigned int numLevels() = 0;
105 
106     /**
107      * Whether the given level is supported. The level indices may be
108      * discontinuous, so this function should be used before querying deeper
109      * properties of a level.
110      */
111     virtual bool levelSupported(unsigned int level) = 0;
112     /** Whether SST-BF is supported in a given level. */
113     virtual bool bfSupported(unsigned int level) = 0;
114     /** Whether SST-TF is supported in a given level. */
115     virtual bool tfSupported(unsigned int level) = 0;
116     /** Whether SST-BF is enabled in a given level. */
117     virtual bool bfEnabled(unsigned int level) = 0;
118     /** Whether SST-TF is enabled in a given level. */
119     virtual bool tfEnabled(unsigned int level) = 0;
120     /** Return the package Thermal Design Power in Watts for a given level. */
121     virtual unsigned int tdp(unsigned int level) = 0;
122     /** Return the number of cores enabled in a given level. */
123     virtual unsigned int coreCount(unsigned int level) = 0;
124     /** Return the list of enabled logical core indices for a given level. */
125     virtual std::vector<unsigned int> enabledCoreList(unsigned int level) = 0;
126     /**
127      * Return the list of TurboEntrys which define the SSE turbo profile for a
128      * given level.
129      */
130     virtual std::vector<TurboEntry> sseTurboProfile(unsigned int level) = 0;
131     /** Return the base frequency (P1) for a given level. */
132     virtual unsigned int p1Freq(unsigned int level) = 0;
133     /** Return the maximum single-core frequency (P0) for a given level. */
134     virtual unsigned int p0Freq(unsigned int level) = 0;
135     /**
136      * Return the DTS max or external Prochot temperature in degrees Celsius
137      * for a given level.
138      */
139     virtual unsigned int prochotTemp(unsigned int level) = 0;
140     /**
141      * Return the list of logical core indices which have high priority when
142      * SST-BF is enabled for a given level.
143      */
144     virtual std::vector<unsigned int>
145         bfHighPriorityCoreList(unsigned int level) = 0;
146     /** Return the high priority base frequency for a given level. */
147     virtual unsigned int bfHighPriorityFreq(unsigned int level) = 0;
148     /** Return the low priority base frequency for a given level. */
149     virtual unsigned int bfLowPriorityFreq(unsigned int level) = 0;
150 
151     /** Enable or disable SST-BF for the current configuration. */
152     virtual void setBfEnabled(bool enable) = 0;
153     /** Enable or disable SST-TF for the current configuration. */
154     virtual void setTfEnabled(bool enable) = 0;
155     /** Change the current configuration to the given level. */
156     virtual void setCurrentLevel(unsigned int level) = 0;
157 };
158 
159 /**
160  * BackendProvider represents a function which may create an SSTInterface given
161  * a CPU PECI address, and the CPU Model information. Usually the CPUModel is
162  * sufficient to determine if the backend is supported.
163  * Backend should return nullptr to indicate it doesn't support a given CPU.
164  * The SST upper layer will call the registered backend provider functions in
165  * arbitrary order until one of them returns a non-null pointer.
166  */
167 using BackendProvider =
168     std::function<std::unique_ptr<SSTInterface>(uint8_t, CPUModel)>;
169 
170 /**
171  * Backends should use 1 instance of the SSTProviderRegistration macro at file
172  * scope to register their provider function. This static struct instance
173  * register the backend before main() is run, and prevents the upper layer from
174  * having to know about which backends exist.
175  */
176 #define SSTProviderRegistration(fn)                                            \
177     struct fn##Register                                                        \
178     {                                                                          \
179         fn##Register()                                                         \
180         {                                                                      \
181             std::cerr << "Registering SST Provider " #fn << std::endl;         \
182             registerBackend(fn);                                               \
183         }                                                                      \
184     } fn##Instance;
185 void registerBackend(BackendProvider);
186 
187 } // namespace sst
188 } // namespace cpu_info
189