xref: /openbmc/qemu/tcg/s390x/tcg-target-con-str.h (revision 764ecf77)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define S390 target-specific operand constraints.
4  * Copyright (c) 2021 Linaro
5  */
6 
7 /*
8  * Define constraint letters for register sets:
9  * REGS(letter, register_mask)
10  */
11 REGS('r', ALL_GENERAL_REGS)
12 REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)
13 REGS('v', ALL_VECTOR_REGS)
14 /*
15  * A (single) even/odd pair for division.
16  * TODO: Add something to the register allocator to allow
17  * this kind of regno+1 pairing to be done more generally.
18  */
19 REGS('a', 1u << TCG_REG_R2)
20 REGS('b', 1u << TCG_REG_R3)
21 
22 /*
23  * Define constraint letters for constants:
24  * CONST(letter, TCG_CT_CONST_* bit set)
25  */
26 CONST('A', TCG_CT_CONST_S33)
27 CONST('I', TCG_CT_CONST_S16)
28 CONST('J', TCG_CT_CONST_S32)
29 CONST('Z', TCG_CT_CONST_ZERO)
30