xref: /openbmc/qemu/tcg/mips/tcg-target-has.h (revision 7498d882cbe39ae7df4315ea006830e640f0d47b)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Define target-specific opcode support
4  * Copyright (c) 2008-2009 Arnaud Patard <arnaud.patard@rtp-net.org>
5  * Copyright (c) 2009 Aurelien Jarno <aurelien@aurel32.net>
6  */
7 
8 #ifndef TCG_TARGET_HAS_H
9 #define TCG_TARGET_HAS_H
10 
11 /* MOVN/MOVZ instructions detection */
12 #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
13     defined(_MIPS_ARCH_LOONGSON2E) || defined(_MIPS_ARCH_LOONGSON2F) || \
14     defined(_MIPS_ARCH_MIPS4)
15 #define use_movnz_instructions  1
16 #else
17 extern bool use_movnz_instructions;
18 #endif
19 
20 /* MIPS32 instruction set detection */
21 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 1)
22 #define use_mips32_instructions  1
23 #else
24 extern bool use_mips32_instructions;
25 #endif
26 
27 /* MIPS32R2 instruction set detection */
28 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
29 #define use_mips32r2_instructions  1
30 #else
31 extern bool use_mips32r2_instructions;
32 #endif
33 
34 /* MIPS32R6 instruction set detection */
35 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 6)
36 #define use_mips32r6_instructions  1
37 #else
38 #define use_mips32r6_instructions  0
39 #endif
40 
41 /* optional instructions */
42 
43 #if TCG_TARGET_REG_BITS == 64
44 #define TCG_TARGET_HAS_add2_i32         0
45 #define TCG_TARGET_HAS_sub2_i32         0
46 #define TCG_TARGET_HAS_extr_i64_i32     1
47 #define TCG_TARGET_HAS_add2_i64         0
48 #define TCG_TARGET_HAS_sub2_i64         0
49 #define TCG_TARGET_HAS_ext32s_i64       1
50 #define TCG_TARGET_HAS_ext32u_i64       1
51 #endif
52 
53 /* optional instructions detected at runtime */
54 #define TCG_TARGET_HAS_extract2_i32     0
55 #define TCG_TARGET_HAS_qemu_st8_i32     0
56 
57 #if TCG_TARGET_REG_BITS == 64
58 #define TCG_TARGET_HAS_bswap64_i64      1
59 #define TCG_TARGET_HAS_extract2_i64     0
60 #endif
61 
62 #define TCG_TARGET_HAS_qemu_ldst_i128   0
63 #define TCG_TARGET_HAS_tst              0
64 
65 #define TCG_TARGET_extract_valid(type, ofs, len)  use_mips32r2_instructions
66 #define TCG_TARGET_deposit_valid(type, ofs, len)  use_mips32r2_instructions
67 
68 static inline bool
69 tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
70 {
71     if (ofs == 0) {
72         switch (len) {
73         case 8:
74         case 16:
75             return use_mips32r2_instructions;
76         case 32:
77             return type == TCG_TYPE_I64;
78         }
79     }
80     return false;
81 }
82 #define TCG_TARGET_sextract_valid  tcg_target_sextract_valid
83 
84 #endif
85