1a2b0a27dSPhilippe Mathieu-Daudé /* 2a2b0a27dSPhilippe Mathieu-Daudé * MIPS SIMD Architecture (MSA) translation routines 3a2b0a27dSPhilippe Mathieu-Daudé * 4a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2004-2005 Jocelyn Mayer 5a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2006 Marius Groeger (FPU operations) 6a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support) 7a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2009 CodeSourcery (MIPS16 and microMIPS support) 8a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2012 Jia Liu & Dongxue Zhang (MIPS ASE DSP support) 9a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2020 Philippe Mathieu-Daudé 10a2b0a27dSPhilippe Mathieu-Daudé * 11a2b0a27dSPhilippe Mathieu-Daudé * SPDX-License-Identifier: LGPL-2.1-or-later 12a2b0a27dSPhilippe Mathieu-Daudé */ 13a2b0a27dSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 14a2b0a27dSPhilippe Mathieu-Daudé #include "tcg/tcg-op.h" 15a2b0a27dSPhilippe Mathieu-Daudé #include "exec/helper-gen.h" 16a2b0a27dSPhilippe Mathieu-Daudé #include "translate.h" 17a2b0a27dSPhilippe Mathieu-Daudé #include "fpu_helper.h" 18a2b0a27dSPhilippe Mathieu-Daudé #include "internal.h" 19a2b0a27dSPhilippe Mathieu-Daudé 20a2b0a27dSPhilippe Mathieu-Daudé /* Include the auto-generated decoder. */ 21f5c6ee0cSPhilippe Mathieu-Daudé #include "decode-msa.c.inc" 22a2b0a27dSPhilippe Mathieu-Daudé 23a2b0a27dSPhilippe Mathieu-Daudé #define OPC_MSA (0x1E << 26) 24a2b0a27dSPhilippe Mathieu-Daudé 25a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_MINOR(op) (MASK_OP_MAJOR(op) | (op & 0x3F)) 26a2b0a27dSPhilippe Mathieu-Daudé enum { 27a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I8_00 = 0x00 | OPC_MSA, 28a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I8_01 = 0x01 | OPC_MSA, 29a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I8_02 = 0x02 | OPC_MSA, 30a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I5_06 = 0x06 | OPC_MSA, 31a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I5_07 = 0x07 | OPC_MSA, 32a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_BIT_09 = 0x09 | OPC_MSA, 33a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_BIT_0A = 0x0A | OPC_MSA, 34a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0D = 0x0D | OPC_MSA, 35a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0E = 0x0E | OPC_MSA, 36a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0F = 0x0F | OPC_MSA, 37a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_10 = 0x10 | OPC_MSA, 38a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_11 = 0x11 | OPC_MSA, 39a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_12 = 0x12 | OPC_MSA, 40a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_13 = 0x13 | OPC_MSA, 41a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_14 = 0x14 | OPC_MSA, 42a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_15 = 0x15 | OPC_MSA, 43a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_ELM = 0x19 | OPC_MSA, 44a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1A = 0x1A | OPC_MSA, 45a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1B = 0x1B | OPC_MSA, 46a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1C = 0x1C | OPC_MSA, 47a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_VEC = 0x1E | OPC_MSA, 48a2b0a27dSPhilippe Mathieu-Daudé 49a2b0a27dSPhilippe Mathieu-Daudé /* MI10 instruction */ 50a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_B = (0x20) | OPC_MSA, 51a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_H = (0x21) | OPC_MSA, 52a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_W = (0x22) | OPC_MSA, 53a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_D = (0x23) | OPC_MSA, 54a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_B = (0x24) | OPC_MSA, 55a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_H = (0x25) | OPC_MSA, 56a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_W = (0x26) | OPC_MSA, 57a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_D = (0x27) | OPC_MSA, 58a2b0a27dSPhilippe Mathieu-Daudé }; 59a2b0a27dSPhilippe Mathieu-Daudé 60a2b0a27dSPhilippe Mathieu-Daudé enum { 61a2b0a27dSPhilippe Mathieu-Daudé /* I5 instruction df(bits 22..21) = _b, _h, _w, _d */ 62a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDVI_df = (0x0 << 23) | OPC_MSA_I5_06, 63a2b0a27dSPhilippe Mathieu-Daudé OPC_CEQI_df = (0x0 << 23) | OPC_MSA_I5_07, 64a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBVI_df = (0x1 << 23) | OPC_MSA_I5_06, 65a2b0a27dSPhilippe Mathieu-Daudé OPC_MAXI_S_df = (0x2 << 23) | OPC_MSA_I5_06, 66a2b0a27dSPhilippe Mathieu-Daudé OPC_CLTI_S_df = (0x2 << 23) | OPC_MSA_I5_07, 67a2b0a27dSPhilippe Mathieu-Daudé OPC_MAXI_U_df = (0x3 << 23) | OPC_MSA_I5_06, 68a2b0a27dSPhilippe Mathieu-Daudé OPC_CLTI_U_df = (0x3 << 23) | OPC_MSA_I5_07, 69a2b0a27dSPhilippe Mathieu-Daudé OPC_MINI_S_df = (0x4 << 23) | OPC_MSA_I5_06, 70a2b0a27dSPhilippe Mathieu-Daudé OPC_CLEI_S_df = (0x4 << 23) | OPC_MSA_I5_07, 71a2b0a27dSPhilippe Mathieu-Daudé OPC_MINI_U_df = (0x5 << 23) | OPC_MSA_I5_06, 72a2b0a27dSPhilippe Mathieu-Daudé OPC_CLEI_U_df = (0x5 << 23) | OPC_MSA_I5_07, 73a2b0a27dSPhilippe Mathieu-Daudé OPC_LDI_df = (0x6 << 23) | OPC_MSA_I5_07, 74a2b0a27dSPhilippe Mathieu-Daudé 75a2b0a27dSPhilippe Mathieu-Daudé /* I8 instruction */ 76a2b0a27dSPhilippe Mathieu-Daudé OPC_ANDI_B = (0x0 << 24) | OPC_MSA_I8_00, 77a2b0a27dSPhilippe Mathieu-Daudé OPC_BMNZI_B = (0x0 << 24) | OPC_MSA_I8_01, 78a2b0a27dSPhilippe Mathieu-Daudé OPC_SHF_B = (0x0 << 24) | OPC_MSA_I8_02, 79a2b0a27dSPhilippe Mathieu-Daudé OPC_ORI_B = (0x1 << 24) | OPC_MSA_I8_00, 80a2b0a27dSPhilippe Mathieu-Daudé OPC_BMZI_B = (0x1 << 24) | OPC_MSA_I8_01, 81a2b0a27dSPhilippe Mathieu-Daudé OPC_SHF_H = (0x1 << 24) | OPC_MSA_I8_02, 82a2b0a27dSPhilippe Mathieu-Daudé OPC_NORI_B = (0x2 << 24) | OPC_MSA_I8_00, 83a2b0a27dSPhilippe Mathieu-Daudé OPC_BSELI_B = (0x2 << 24) | OPC_MSA_I8_01, 84a2b0a27dSPhilippe Mathieu-Daudé OPC_SHF_W = (0x2 << 24) | OPC_MSA_I8_02, 85a2b0a27dSPhilippe Mathieu-Daudé OPC_XORI_B = (0x3 << 24) | OPC_MSA_I8_00, 86a2b0a27dSPhilippe Mathieu-Daudé 87a2b0a27dSPhilippe Mathieu-Daudé /* VEC/2R/2RF instruction */ 88a2b0a27dSPhilippe Mathieu-Daudé OPC_AND_V = (0x00 << 21) | OPC_MSA_VEC, 89a2b0a27dSPhilippe Mathieu-Daudé OPC_OR_V = (0x01 << 21) | OPC_MSA_VEC, 90a2b0a27dSPhilippe Mathieu-Daudé OPC_NOR_V = (0x02 << 21) | OPC_MSA_VEC, 91a2b0a27dSPhilippe Mathieu-Daudé OPC_XOR_V = (0x03 << 21) | OPC_MSA_VEC, 92a2b0a27dSPhilippe Mathieu-Daudé OPC_BMNZ_V = (0x04 << 21) | OPC_MSA_VEC, 93a2b0a27dSPhilippe Mathieu-Daudé OPC_BMZ_V = (0x05 << 21) | OPC_MSA_VEC, 94a2b0a27dSPhilippe Mathieu-Daudé OPC_BSEL_V = (0x06 << 21) | OPC_MSA_VEC, 95a2b0a27dSPhilippe Mathieu-Daudé 96a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_2R = (0x18 << 21) | OPC_MSA_VEC, 97a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_2RF = (0x19 << 21) | OPC_MSA_VEC, 98a2b0a27dSPhilippe Mathieu-Daudé 99a2b0a27dSPhilippe Mathieu-Daudé /* 2R instruction df(bits 17..16) = _b, _h, _w, _d */ 100a2b0a27dSPhilippe Mathieu-Daudé OPC_FILL_df = (0x00 << 18) | OPC_MSA_2R, 101a2b0a27dSPhilippe Mathieu-Daudé OPC_PCNT_df = (0x01 << 18) | OPC_MSA_2R, 102a2b0a27dSPhilippe Mathieu-Daudé OPC_NLOC_df = (0x02 << 18) | OPC_MSA_2R, 103a2b0a27dSPhilippe Mathieu-Daudé OPC_NLZC_df = (0x03 << 18) | OPC_MSA_2R, 104a2b0a27dSPhilippe Mathieu-Daudé 105a2b0a27dSPhilippe Mathieu-Daudé /* 2RF instruction df(bit 16) = _w, _d */ 106a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLASS_df = (0x00 << 17) | OPC_MSA_2RF, 107a2b0a27dSPhilippe Mathieu-Daudé OPC_FTRUNC_S_df = (0x01 << 17) | OPC_MSA_2RF, 108a2b0a27dSPhilippe Mathieu-Daudé OPC_FTRUNC_U_df = (0x02 << 17) | OPC_MSA_2RF, 109a2b0a27dSPhilippe Mathieu-Daudé OPC_FSQRT_df = (0x03 << 17) | OPC_MSA_2RF, 110a2b0a27dSPhilippe Mathieu-Daudé OPC_FRSQRT_df = (0x04 << 17) | OPC_MSA_2RF, 111a2b0a27dSPhilippe Mathieu-Daudé OPC_FRCP_df = (0x05 << 17) | OPC_MSA_2RF, 112a2b0a27dSPhilippe Mathieu-Daudé OPC_FRINT_df = (0x06 << 17) | OPC_MSA_2RF, 113a2b0a27dSPhilippe Mathieu-Daudé OPC_FLOG2_df = (0x07 << 17) | OPC_MSA_2RF, 114a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXUPL_df = (0x08 << 17) | OPC_MSA_2RF, 115a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXUPR_df = (0x09 << 17) | OPC_MSA_2RF, 116a2b0a27dSPhilippe Mathieu-Daudé OPC_FFQL_df = (0x0A << 17) | OPC_MSA_2RF, 117a2b0a27dSPhilippe Mathieu-Daudé OPC_FFQR_df = (0x0B << 17) | OPC_MSA_2RF, 118a2b0a27dSPhilippe Mathieu-Daudé OPC_FTINT_S_df = (0x0C << 17) | OPC_MSA_2RF, 119a2b0a27dSPhilippe Mathieu-Daudé OPC_FTINT_U_df = (0x0D << 17) | OPC_MSA_2RF, 120a2b0a27dSPhilippe Mathieu-Daudé OPC_FFINT_S_df = (0x0E << 17) | OPC_MSA_2RF, 121a2b0a27dSPhilippe Mathieu-Daudé OPC_FFINT_U_df = (0x0F << 17) | OPC_MSA_2RF, 122a2b0a27dSPhilippe Mathieu-Daudé 123a2b0a27dSPhilippe Mathieu-Daudé /* 3R instruction df(bits 22..21) = _b, _h, _w, d */ 124a2b0a27dSPhilippe Mathieu-Daudé OPC_SLL_df = (0x0 << 23) | OPC_MSA_3R_0D, 125a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDV_df = (0x0 << 23) | OPC_MSA_3R_0E, 126a2b0a27dSPhilippe Mathieu-Daudé OPC_CEQ_df = (0x0 << 23) | OPC_MSA_3R_0F, 127a2b0a27dSPhilippe Mathieu-Daudé OPC_ADD_A_df = (0x0 << 23) | OPC_MSA_3R_10, 128a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBS_S_df = (0x0 << 23) | OPC_MSA_3R_11, 129a2b0a27dSPhilippe Mathieu-Daudé OPC_MULV_df = (0x0 << 23) | OPC_MSA_3R_12, 130a2b0a27dSPhilippe Mathieu-Daudé OPC_DOTP_S_df = (0x0 << 23) | OPC_MSA_3R_13, 131a2b0a27dSPhilippe Mathieu-Daudé OPC_SLD_df = (0x0 << 23) | OPC_MSA_3R_14, 132a2b0a27dSPhilippe Mathieu-Daudé OPC_VSHF_df = (0x0 << 23) | OPC_MSA_3R_15, 133a2b0a27dSPhilippe Mathieu-Daudé OPC_SRA_df = (0x1 << 23) | OPC_MSA_3R_0D, 134a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBV_df = (0x1 << 23) | OPC_MSA_3R_0E, 135a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_A_df = (0x1 << 23) | OPC_MSA_3R_10, 136a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBS_U_df = (0x1 << 23) | OPC_MSA_3R_11, 137a2b0a27dSPhilippe Mathieu-Daudé OPC_MADDV_df = (0x1 << 23) | OPC_MSA_3R_12, 138a2b0a27dSPhilippe Mathieu-Daudé OPC_DOTP_U_df = (0x1 << 23) | OPC_MSA_3R_13, 139a2b0a27dSPhilippe Mathieu-Daudé OPC_SPLAT_df = (0x1 << 23) | OPC_MSA_3R_14, 140a2b0a27dSPhilippe Mathieu-Daudé OPC_SRAR_df = (0x1 << 23) | OPC_MSA_3R_15, 141a2b0a27dSPhilippe Mathieu-Daudé OPC_SRL_df = (0x2 << 23) | OPC_MSA_3R_0D, 142a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_S_df = (0x2 << 23) | OPC_MSA_3R_0E, 143a2b0a27dSPhilippe Mathieu-Daudé OPC_CLT_S_df = (0x2 << 23) | OPC_MSA_3R_0F, 144a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_S_df = (0x2 << 23) | OPC_MSA_3R_10, 145a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBSUS_U_df = (0x2 << 23) | OPC_MSA_3R_11, 146a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUBV_df = (0x2 << 23) | OPC_MSA_3R_12, 147a2b0a27dSPhilippe Mathieu-Daudé OPC_DPADD_S_df = (0x2 << 23) | OPC_MSA_3R_13, 148a2b0a27dSPhilippe Mathieu-Daudé OPC_PCKEV_df = (0x2 << 23) | OPC_MSA_3R_14, 149a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLR_df = (0x2 << 23) | OPC_MSA_3R_15, 150a2b0a27dSPhilippe Mathieu-Daudé OPC_BCLR_df = (0x3 << 23) | OPC_MSA_3R_0D, 151a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_U_df = (0x3 << 23) | OPC_MSA_3R_0E, 152a2b0a27dSPhilippe Mathieu-Daudé OPC_CLT_U_df = (0x3 << 23) | OPC_MSA_3R_0F, 153a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_U_df = (0x3 << 23) | OPC_MSA_3R_10, 154a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBSUU_S_df = (0x3 << 23) | OPC_MSA_3R_11, 155a2b0a27dSPhilippe Mathieu-Daudé OPC_DPADD_U_df = (0x3 << 23) | OPC_MSA_3R_13, 156a2b0a27dSPhilippe Mathieu-Daudé OPC_PCKOD_df = (0x3 << 23) | OPC_MSA_3R_14, 157a2b0a27dSPhilippe Mathieu-Daudé OPC_BSET_df = (0x4 << 23) | OPC_MSA_3R_0D, 158a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_S_df = (0x4 << 23) | OPC_MSA_3R_0E, 159a2b0a27dSPhilippe Mathieu-Daudé OPC_CLE_S_df = (0x4 << 23) | OPC_MSA_3R_0F, 160a2b0a27dSPhilippe Mathieu-Daudé OPC_AVE_S_df = (0x4 << 23) | OPC_MSA_3R_10, 161a2b0a27dSPhilippe Mathieu-Daudé OPC_ASUB_S_df = (0x4 << 23) | OPC_MSA_3R_11, 162a2b0a27dSPhilippe Mathieu-Daudé OPC_DIV_S_df = (0x4 << 23) | OPC_MSA_3R_12, 163a2b0a27dSPhilippe Mathieu-Daudé OPC_DPSUB_S_df = (0x4 << 23) | OPC_MSA_3R_13, 164a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVL_df = (0x4 << 23) | OPC_MSA_3R_14, 165a2b0a27dSPhilippe Mathieu-Daudé OPC_HADD_S_df = (0x4 << 23) | OPC_MSA_3R_15, 166a2b0a27dSPhilippe Mathieu-Daudé OPC_BNEG_df = (0x5 << 23) | OPC_MSA_3R_0D, 167a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_U_df = (0x5 << 23) | OPC_MSA_3R_0E, 168a2b0a27dSPhilippe Mathieu-Daudé OPC_CLE_U_df = (0x5 << 23) | OPC_MSA_3R_0F, 169a2b0a27dSPhilippe Mathieu-Daudé OPC_AVE_U_df = (0x5 << 23) | OPC_MSA_3R_10, 170a2b0a27dSPhilippe Mathieu-Daudé OPC_ASUB_U_df = (0x5 << 23) | OPC_MSA_3R_11, 171a2b0a27dSPhilippe Mathieu-Daudé OPC_DIV_U_df = (0x5 << 23) | OPC_MSA_3R_12, 172a2b0a27dSPhilippe Mathieu-Daudé OPC_DPSUB_U_df = (0x5 << 23) | OPC_MSA_3R_13, 173a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVR_df = (0x5 << 23) | OPC_MSA_3R_14, 174a2b0a27dSPhilippe Mathieu-Daudé OPC_HADD_U_df = (0x5 << 23) | OPC_MSA_3R_15, 175a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSL_df = (0x6 << 23) | OPC_MSA_3R_0D, 176a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_A_df = (0x6 << 23) | OPC_MSA_3R_0E, 177a2b0a27dSPhilippe Mathieu-Daudé OPC_AVER_S_df = (0x6 << 23) | OPC_MSA_3R_10, 178a2b0a27dSPhilippe Mathieu-Daudé OPC_MOD_S_df = (0x6 << 23) | OPC_MSA_3R_12, 179a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVEV_df = (0x6 << 23) | OPC_MSA_3R_14, 180a2b0a27dSPhilippe Mathieu-Daudé OPC_HSUB_S_df = (0x6 << 23) | OPC_MSA_3R_15, 181a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSR_df = (0x7 << 23) | OPC_MSA_3R_0D, 182a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_A_df = (0x7 << 23) | OPC_MSA_3R_0E, 183a2b0a27dSPhilippe Mathieu-Daudé OPC_AVER_U_df = (0x7 << 23) | OPC_MSA_3R_10, 184a2b0a27dSPhilippe Mathieu-Daudé OPC_MOD_U_df = (0x7 << 23) | OPC_MSA_3R_12, 185a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVOD_df = (0x7 << 23) | OPC_MSA_3R_14, 186a2b0a27dSPhilippe Mathieu-Daudé OPC_HSUB_U_df = (0x7 << 23) | OPC_MSA_3R_15, 187a2b0a27dSPhilippe Mathieu-Daudé 188a2b0a27dSPhilippe Mathieu-Daudé /* ELM instructions df(bits 21..16) = _b, _h, _w, _d */ 189a2b0a27dSPhilippe Mathieu-Daudé OPC_SLDI_df = (0x0 << 22) | (0x00 << 16) | OPC_MSA_ELM, 190a2b0a27dSPhilippe Mathieu-Daudé OPC_CTCMSA = (0x0 << 22) | (0x3E << 16) | OPC_MSA_ELM, 191a2b0a27dSPhilippe Mathieu-Daudé OPC_SPLATI_df = (0x1 << 22) | (0x00 << 16) | OPC_MSA_ELM, 192a2b0a27dSPhilippe Mathieu-Daudé OPC_CFCMSA = (0x1 << 22) | (0x3E << 16) | OPC_MSA_ELM, 193a2b0a27dSPhilippe Mathieu-Daudé OPC_COPY_S_df = (0x2 << 22) | (0x00 << 16) | OPC_MSA_ELM, 194a2b0a27dSPhilippe Mathieu-Daudé OPC_MOVE_V = (0x2 << 22) | (0x3E << 16) | OPC_MSA_ELM, 195a2b0a27dSPhilippe Mathieu-Daudé OPC_COPY_U_df = (0x3 << 22) | (0x00 << 16) | OPC_MSA_ELM, 196a2b0a27dSPhilippe Mathieu-Daudé OPC_INSERT_df = (0x4 << 22) | (0x00 << 16) | OPC_MSA_ELM, 197a2b0a27dSPhilippe Mathieu-Daudé OPC_INSVE_df = (0x5 << 22) | (0x00 << 16) | OPC_MSA_ELM, 198a2b0a27dSPhilippe Mathieu-Daudé 199a2b0a27dSPhilippe Mathieu-Daudé /* 3RF instruction _df(bit 21) = _w, _d */ 200a2b0a27dSPhilippe Mathieu-Daudé OPC_FCAF_df = (0x0 << 22) | OPC_MSA_3RF_1A, 201a2b0a27dSPhilippe Mathieu-Daudé OPC_FADD_df = (0x0 << 22) | OPC_MSA_3RF_1B, 202a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUN_df = (0x1 << 22) | OPC_MSA_3RF_1A, 203a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUB_df = (0x1 << 22) | OPC_MSA_3RF_1B, 204a2b0a27dSPhilippe Mathieu-Daudé OPC_FCOR_df = (0x1 << 22) | OPC_MSA_3RF_1C, 205a2b0a27dSPhilippe Mathieu-Daudé OPC_FCEQ_df = (0x2 << 22) | OPC_MSA_3RF_1A, 206a2b0a27dSPhilippe Mathieu-Daudé OPC_FMUL_df = (0x2 << 22) | OPC_MSA_3RF_1B, 207a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUNE_df = (0x2 << 22) | OPC_MSA_3RF_1C, 208a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUEQ_df = (0x3 << 22) | OPC_MSA_3RF_1A, 209a2b0a27dSPhilippe Mathieu-Daudé OPC_FDIV_df = (0x3 << 22) | OPC_MSA_3RF_1B, 210a2b0a27dSPhilippe Mathieu-Daudé OPC_FCNE_df = (0x3 << 22) | OPC_MSA_3RF_1C, 211a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLT_df = (0x4 << 22) | OPC_MSA_3RF_1A, 212a2b0a27dSPhilippe Mathieu-Daudé OPC_FMADD_df = (0x4 << 22) | OPC_MSA_3RF_1B, 213a2b0a27dSPhilippe Mathieu-Daudé OPC_MUL_Q_df = (0x4 << 22) | OPC_MSA_3RF_1C, 214a2b0a27dSPhilippe Mathieu-Daudé OPC_FCULT_df = (0x5 << 22) | OPC_MSA_3RF_1A, 215a2b0a27dSPhilippe Mathieu-Daudé OPC_FMSUB_df = (0x5 << 22) | OPC_MSA_3RF_1B, 216a2b0a27dSPhilippe Mathieu-Daudé OPC_MADD_Q_df = (0x5 << 22) | OPC_MSA_3RF_1C, 217a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLE_df = (0x6 << 22) | OPC_MSA_3RF_1A, 218a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUB_Q_df = (0x6 << 22) | OPC_MSA_3RF_1C, 219a2b0a27dSPhilippe Mathieu-Daudé OPC_FCULE_df = (0x7 << 22) | OPC_MSA_3RF_1A, 220a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXP2_df = (0x7 << 22) | OPC_MSA_3RF_1B, 221a2b0a27dSPhilippe Mathieu-Daudé OPC_FSAF_df = (0x8 << 22) | OPC_MSA_3RF_1A, 222a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXDO_df = (0x8 << 22) | OPC_MSA_3RF_1B, 223a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUN_df = (0x9 << 22) | OPC_MSA_3RF_1A, 224a2b0a27dSPhilippe Mathieu-Daudé OPC_FSOR_df = (0x9 << 22) | OPC_MSA_3RF_1C, 225a2b0a27dSPhilippe Mathieu-Daudé OPC_FSEQ_df = (0xA << 22) | OPC_MSA_3RF_1A, 226a2b0a27dSPhilippe Mathieu-Daudé OPC_FTQ_df = (0xA << 22) | OPC_MSA_3RF_1B, 227a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUNE_df = (0xA << 22) | OPC_MSA_3RF_1C, 228a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUEQ_df = (0xB << 22) | OPC_MSA_3RF_1A, 229a2b0a27dSPhilippe Mathieu-Daudé OPC_FSNE_df = (0xB << 22) | OPC_MSA_3RF_1C, 230a2b0a27dSPhilippe Mathieu-Daudé OPC_FSLT_df = (0xC << 22) | OPC_MSA_3RF_1A, 231a2b0a27dSPhilippe Mathieu-Daudé OPC_FMIN_df = (0xC << 22) | OPC_MSA_3RF_1B, 232a2b0a27dSPhilippe Mathieu-Daudé OPC_MULR_Q_df = (0xC << 22) | OPC_MSA_3RF_1C, 233a2b0a27dSPhilippe Mathieu-Daudé OPC_FSULT_df = (0xD << 22) | OPC_MSA_3RF_1A, 234a2b0a27dSPhilippe Mathieu-Daudé OPC_FMIN_A_df = (0xD << 22) | OPC_MSA_3RF_1B, 235a2b0a27dSPhilippe Mathieu-Daudé OPC_MADDR_Q_df = (0xD << 22) | OPC_MSA_3RF_1C, 236a2b0a27dSPhilippe Mathieu-Daudé OPC_FSLE_df = (0xE << 22) | OPC_MSA_3RF_1A, 237a2b0a27dSPhilippe Mathieu-Daudé OPC_FMAX_df = (0xE << 22) | OPC_MSA_3RF_1B, 238a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUBR_Q_df = (0xE << 22) | OPC_MSA_3RF_1C, 239a2b0a27dSPhilippe Mathieu-Daudé OPC_FSULE_df = (0xF << 22) | OPC_MSA_3RF_1A, 240a2b0a27dSPhilippe Mathieu-Daudé OPC_FMAX_A_df = (0xF << 22) | OPC_MSA_3RF_1B, 241a2b0a27dSPhilippe Mathieu-Daudé 242a2b0a27dSPhilippe Mathieu-Daudé /* BIT instruction df(bits 22..16) = _B _H _W _D */ 243a2b0a27dSPhilippe Mathieu-Daudé OPC_SLLI_df = (0x0 << 23) | OPC_MSA_BIT_09, 244a2b0a27dSPhilippe Mathieu-Daudé OPC_SAT_S_df = (0x0 << 23) | OPC_MSA_BIT_0A, 245a2b0a27dSPhilippe Mathieu-Daudé OPC_SRAI_df = (0x1 << 23) | OPC_MSA_BIT_09, 246a2b0a27dSPhilippe Mathieu-Daudé OPC_SAT_U_df = (0x1 << 23) | OPC_MSA_BIT_0A, 247a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLI_df = (0x2 << 23) | OPC_MSA_BIT_09, 248a2b0a27dSPhilippe Mathieu-Daudé OPC_SRARI_df = (0x2 << 23) | OPC_MSA_BIT_0A, 249a2b0a27dSPhilippe Mathieu-Daudé OPC_BCLRI_df = (0x3 << 23) | OPC_MSA_BIT_09, 250a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLRI_df = (0x3 << 23) | OPC_MSA_BIT_0A, 251a2b0a27dSPhilippe Mathieu-Daudé OPC_BSETI_df = (0x4 << 23) | OPC_MSA_BIT_09, 252a2b0a27dSPhilippe Mathieu-Daudé OPC_BNEGI_df = (0x5 << 23) | OPC_MSA_BIT_09, 253a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSLI_df = (0x6 << 23) | OPC_MSA_BIT_09, 254a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSRI_df = (0x7 << 23) | OPC_MSA_BIT_09, 255a2b0a27dSPhilippe Mathieu-Daudé }; 256a2b0a27dSPhilippe Mathieu-Daudé 25706106772SPhilippe Mathieu-Daudé static const char msaregnames[][6] = { 258a2b0a27dSPhilippe Mathieu-Daudé "w0.d0", "w0.d1", "w1.d0", "w1.d1", 259a2b0a27dSPhilippe Mathieu-Daudé "w2.d0", "w2.d1", "w3.d0", "w3.d1", 260a2b0a27dSPhilippe Mathieu-Daudé "w4.d0", "w4.d1", "w5.d0", "w5.d1", 261a2b0a27dSPhilippe Mathieu-Daudé "w6.d0", "w6.d1", "w7.d0", "w7.d1", 262a2b0a27dSPhilippe Mathieu-Daudé "w8.d0", "w8.d1", "w9.d0", "w9.d1", 263a2b0a27dSPhilippe Mathieu-Daudé "w10.d0", "w10.d1", "w11.d0", "w11.d1", 264a2b0a27dSPhilippe Mathieu-Daudé "w12.d0", "w12.d1", "w13.d0", "w13.d1", 265a2b0a27dSPhilippe Mathieu-Daudé "w14.d0", "w14.d1", "w15.d0", "w15.d1", 266a2b0a27dSPhilippe Mathieu-Daudé "w16.d0", "w16.d1", "w17.d0", "w17.d1", 267a2b0a27dSPhilippe Mathieu-Daudé "w18.d0", "w18.d1", "w19.d0", "w19.d1", 268a2b0a27dSPhilippe Mathieu-Daudé "w20.d0", "w20.d1", "w21.d0", "w21.d1", 269a2b0a27dSPhilippe Mathieu-Daudé "w22.d0", "w22.d1", "w23.d0", "w23.d1", 270a2b0a27dSPhilippe Mathieu-Daudé "w24.d0", "w24.d1", "w25.d0", "w25.d1", 271a2b0a27dSPhilippe Mathieu-Daudé "w26.d0", "w26.d1", "w27.d0", "w27.d1", 272a2b0a27dSPhilippe Mathieu-Daudé "w28.d0", "w28.d1", "w29.d0", "w29.d1", 273a2b0a27dSPhilippe Mathieu-Daudé "w30.d0", "w30.d1", "w31.d0", "w31.d1", 274a2b0a27dSPhilippe Mathieu-Daudé }; 275a2b0a27dSPhilippe Mathieu-Daudé 276a2b0a27dSPhilippe Mathieu-Daudé static TCGv_i64 msa_wr_d[64]; 277a2b0a27dSPhilippe Mathieu-Daudé 278a2b0a27dSPhilippe Mathieu-Daudé void msa_translate_init(void) 279a2b0a27dSPhilippe Mathieu-Daudé { 280a2b0a27dSPhilippe Mathieu-Daudé int i; 281a2b0a27dSPhilippe Mathieu-Daudé 282a2b0a27dSPhilippe Mathieu-Daudé for (i = 0; i < 32; i++) { 283*bbc213b3SPhilippe Mathieu-Daudé int off; 284a2b0a27dSPhilippe Mathieu-Daudé 285a2b0a27dSPhilippe Mathieu-Daudé /* 286a2b0a27dSPhilippe Mathieu-Daudé * The MSA vector registers are mapped on the 287a2b0a27dSPhilippe Mathieu-Daudé * scalar floating-point unit (FPU) registers. 288a2b0a27dSPhilippe Mathieu-Daudé */ 289*bbc213b3SPhilippe Mathieu-Daudé off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); 290a2b0a27dSPhilippe Mathieu-Daudé msa_wr_d[i * 2] = fpu_f64[i]; 291*bbc213b3SPhilippe Mathieu-Daudé 292a2b0a27dSPhilippe Mathieu-Daudé off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); 293a2b0a27dSPhilippe Mathieu-Daudé msa_wr_d[i * 2 + 1] = 294a2b0a27dSPhilippe Mathieu-Daudé tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]); 295a2b0a27dSPhilippe Mathieu-Daudé } 296a2b0a27dSPhilippe Mathieu-Daudé } 297a2b0a27dSPhilippe Mathieu-Daudé 298a2b0a27dSPhilippe Mathieu-Daudé static inline int check_msa_access(DisasContext *ctx) 299a2b0a27dSPhilippe Mathieu-Daudé { 300a2b0a27dSPhilippe Mathieu-Daudé if (unlikely((ctx->hflags & MIPS_HFLAG_FPU) && 301a2b0a27dSPhilippe Mathieu-Daudé !(ctx->hflags & MIPS_HFLAG_F64))) { 302a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 303a2b0a27dSPhilippe Mathieu-Daudé return 0; 304a2b0a27dSPhilippe Mathieu-Daudé } 305a2b0a27dSPhilippe Mathieu-Daudé 306a2b0a27dSPhilippe Mathieu-Daudé if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) { 307a2b0a27dSPhilippe Mathieu-Daudé generate_exception_end(ctx, EXCP_MSADIS); 308a2b0a27dSPhilippe Mathieu-Daudé return 0; 309a2b0a27dSPhilippe Mathieu-Daudé } 310a2b0a27dSPhilippe Mathieu-Daudé return 1; 311a2b0a27dSPhilippe Mathieu-Daudé } 312a2b0a27dSPhilippe Mathieu-Daudé 313a2b0a27dSPhilippe Mathieu-Daudé static void gen_check_zero_element(TCGv tresult, uint8_t df, uint8_t wt, 314a2b0a27dSPhilippe Mathieu-Daudé TCGCond cond) 315a2b0a27dSPhilippe Mathieu-Daudé { 316a2b0a27dSPhilippe Mathieu-Daudé /* generates tcg ops to check if any element is 0 */ 317a2b0a27dSPhilippe Mathieu-Daudé /* Note this function only works with MSA_WRLEN = 128 */ 318a2b0a27dSPhilippe Mathieu-Daudé uint64_t eval_zero_or_big = 0; 319a2b0a27dSPhilippe Mathieu-Daudé uint64_t eval_big = 0; 320a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t0 = tcg_temp_new_i64(); 321a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t1 = tcg_temp_new_i64(); 322a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 323a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 324a2b0a27dSPhilippe Mathieu-Daudé eval_zero_or_big = 0x0101010101010101ULL; 325a2b0a27dSPhilippe Mathieu-Daudé eval_big = 0x8080808080808080ULL; 326a2b0a27dSPhilippe Mathieu-Daudé break; 327a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 328a2b0a27dSPhilippe Mathieu-Daudé eval_zero_or_big = 0x0001000100010001ULL; 329a2b0a27dSPhilippe Mathieu-Daudé eval_big = 0x8000800080008000ULL; 330a2b0a27dSPhilippe Mathieu-Daudé break; 331a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 332a2b0a27dSPhilippe Mathieu-Daudé eval_zero_or_big = 0x0000000100000001ULL; 333a2b0a27dSPhilippe Mathieu-Daudé eval_big = 0x8000000080000000ULL; 334a2b0a27dSPhilippe Mathieu-Daudé break; 335a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 336a2b0a27dSPhilippe Mathieu-Daudé eval_zero_or_big = 0x0000000000000001ULL; 337a2b0a27dSPhilippe Mathieu-Daudé eval_big = 0x8000000000000000ULL; 338a2b0a27dSPhilippe Mathieu-Daudé break; 339a2b0a27dSPhilippe Mathieu-Daudé } 340a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_subi_i64(t0, msa_wr_d[wt << 1], eval_zero_or_big); 341a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andc_i64(t0, t0, msa_wr_d[wt << 1]); 342a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andi_i64(t0, t0, eval_big); 343a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_subi_i64(t1, msa_wr_d[(wt << 1) + 1], eval_zero_or_big); 344a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andc_i64(t1, t1, msa_wr_d[(wt << 1) + 1]); 345a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andi_i64(t1, t1, eval_big); 346a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_or_i64(t0, t0, t1); 347a2b0a27dSPhilippe Mathieu-Daudé /* if all bits are zero then all elements are not zero */ 348a2b0a27dSPhilippe Mathieu-Daudé /* if some bit is non-zero then some element is zero */ 349a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_setcondi_i64(cond, t0, t0, 0); 350a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_trunc_i64_tl(tresult, t0); 351a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t0); 352a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t1); 353a2b0a27dSPhilippe Mathieu-Daudé } 354a2b0a27dSPhilippe Mathieu-Daudé 355a2b0a27dSPhilippe Mathieu-Daudé static bool gen_msa_BxZ_V(DisasContext *ctx, int wt, int s16, TCGCond cond) 356a2b0a27dSPhilippe Mathieu-Daudé { 357a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t0; 358a2b0a27dSPhilippe Mathieu-Daudé 359a2b0a27dSPhilippe Mathieu-Daudé check_msa_access(ctx); 360a2b0a27dSPhilippe Mathieu-Daudé 361a2b0a27dSPhilippe Mathieu-Daudé if (ctx->hflags & MIPS_HFLAG_BMASK) { 362a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 363a2b0a27dSPhilippe Mathieu-Daudé return true; 364a2b0a27dSPhilippe Mathieu-Daudé } 365a2b0a27dSPhilippe Mathieu-Daudé t0 = tcg_temp_new_i64(); 366a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_or_i64(t0, msa_wr_d[wt << 1], msa_wr_d[(wt << 1) + 1]); 367a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_setcondi_i64(cond, t0, t0, 0); 368a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_trunc_i64_tl(bcond, t0); 369a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t0); 370a2b0a27dSPhilippe Mathieu-Daudé 371a2b0a27dSPhilippe Mathieu-Daudé ctx->btarget = ctx->base.pc_next + (s16 << 2) + 4; 372a2b0a27dSPhilippe Mathieu-Daudé 373a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BC; 374a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BDS32; 375a2b0a27dSPhilippe Mathieu-Daudé 376a2b0a27dSPhilippe Mathieu-Daudé return true; 377a2b0a27dSPhilippe Mathieu-Daudé } 378a2b0a27dSPhilippe Mathieu-Daudé 379a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BZ_V(DisasContext *ctx, arg_msa_bz *a) 380a2b0a27dSPhilippe Mathieu-Daudé { 381a2b0a27dSPhilippe Mathieu-Daudé return gen_msa_BxZ_V(ctx, a->wt, a->s16, TCG_COND_EQ); 382a2b0a27dSPhilippe Mathieu-Daudé } 383a2b0a27dSPhilippe Mathieu-Daudé 384a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BNZ_V(DisasContext *ctx, arg_msa_bz *a) 385a2b0a27dSPhilippe Mathieu-Daudé { 386a2b0a27dSPhilippe Mathieu-Daudé return gen_msa_BxZ_V(ctx, a->wt, a->s16, TCG_COND_NE); 387a2b0a27dSPhilippe Mathieu-Daudé } 388a2b0a27dSPhilippe Mathieu-Daudé 389a2b0a27dSPhilippe Mathieu-Daudé static bool gen_msa_BxZ(DisasContext *ctx, int df, int wt, int s16, bool if_not) 390a2b0a27dSPhilippe Mathieu-Daudé { 391a2b0a27dSPhilippe Mathieu-Daudé check_msa_access(ctx); 392a2b0a27dSPhilippe Mathieu-Daudé 393a2b0a27dSPhilippe Mathieu-Daudé if (ctx->hflags & MIPS_HFLAG_BMASK) { 394a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 395a2b0a27dSPhilippe Mathieu-Daudé return true; 396a2b0a27dSPhilippe Mathieu-Daudé } 397a2b0a27dSPhilippe Mathieu-Daudé 398a2b0a27dSPhilippe Mathieu-Daudé gen_check_zero_element(bcond, df, wt, if_not ? TCG_COND_EQ : TCG_COND_NE); 399a2b0a27dSPhilippe Mathieu-Daudé 400a2b0a27dSPhilippe Mathieu-Daudé ctx->btarget = ctx->base.pc_next + (s16 << 2) + 4; 401a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BC; 402a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BDS32; 403a2b0a27dSPhilippe Mathieu-Daudé 404a2b0a27dSPhilippe Mathieu-Daudé return true; 405a2b0a27dSPhilippe Mathieu-Daudé } 406a2b0a27dSPhilippe Mathieu-Daudé 407a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BZ_x(DisasContext *ctx, arg_msa_bz *a) 408a2b0a27dSPhilippe Mathieu-Daudé { 409a2b0a27dSPhilippe Mathieu-Daudé return gen_msa_BxZ(ctx, a->df, a->wt, a->s16, false); 410a2b0a27dSPhilippe Mathieu-Daudé } 411a2b0a27dSPhilippe Mathieu-Daudé 412a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BNZ_x(DisasContext *ctx, arg_msa_bz *a) 413a2b0a27dSPhilippe Mathieu-Daudé { 414a2b0a27dSPhilippe Mathieu-Daudé return gen_msa_BxZ(ctx, a->df, a->wt, a->s16, true); 415a2b0a27dSPhilippe Mathieu-Daudé } 416a2b0a27dSPhilippe Mathieu-Daudé 417a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_i8(DisasContext *ctx) 418a2b0a27dSPhilippe Mathieu-Daudé { 419a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_I8(op) (MASK_MSA_MINOR(op) | (op & (0x03 << 24))) 420a2b0a27dSPhilippe Mathieu-Daudé uint8_t i8 = (ctx->opcode >> 16) & 0xff; 421a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 422a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 423a2b0a27dSPhilippe Mathieu-Daudé 424a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 425a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 426a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 ti8 = tcg_const_i32(i8); 427a2b0a27dSPhilippe Mathieu-Daudé 428a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_I8(ctx->opcode)) { 429a2b0a27dSPhilippe Mathieu-Daudé case OPC_ANDI_B: 430a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_andi_b(cpu_env, twd, tws, ti8); 431a2b0a27dSPhilippe Mathieu-Daudé break; 432a2b0a27dSPhilippe Mathieu-Daudé case OPC_ORI_B: 433a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ori_b(cpu_env, twd, tws, ti8); 434a2b0a27dSPhilippe Mathieu-Daudé break; 435a2b0a27dSPhilippe Mathieu-Daudé case OPC_NORI_B: 436a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nori_b(cpu_env, twd, tws, ti8); 437a2b0a27dSPhilippe Mathieu-Daudé break; 438a2b0a27dSPhilippe Mathieu-Daudé case OPC_XORI_B: 439a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_xori_b(cpu_env, twd, tws, ti8); 440a2b0a27dSPhilippe Mathieu-Daudé break; 441a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZI_B: 442a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmnzi_b(cpu_env, twd, tws, ti8); 443a2b0a27dSPhilippe Mathieu-Daudé break; 444a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZI_B: 445a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmzi_b(cpu_env, twd, tws, ti8); 446a2b0a27dSPhilippe Mathieu-Daudé break; 447a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSELI_B: 448a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bseli_b(cpu_env, twd, tws, ti8); 449a2b0a27dSPhilippe Mathieu-Daudé break; 450a2b0a27dSPhilippe Mathieu-Daudé case OPC_SHF_B: 451a2b0a27dSPhilippe Mathieu-Daudé case OPC_SHF_H: 452a2b0a27dSPhilippe Mathieu-Daudé case OPC_SHF_W: 453a2b0a27dSPhilippe Mathieu-Daudé { 454a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 24) & 0x3; 455a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 456a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 457a2b0a27dSPhilippe Mathieu-Daudé } else { 458a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(df); 459a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_shf_df(cpu_env, tdf, twd, tws, ti8); 460a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 461a2b0a27dSPhilippe Mathieu-Daudé } 462a2b0a27dSPhilippe Mathieu-Daudé } 463a2b0a27dSPhilippe Mathieu-Daudé break; 464a2b0a27dSPhilippe Mathieu-Daudé default: 465a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 466a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 467a2b0a27dSPhilippe Mathieu-Daudé break; 468a2b0a27dSPhilippe Mathieu-Daudé } 469a2b0a27dSPhilippe Mathieu-Daudé 470a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 471a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 472a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(ti8); 473a2b0a27dSPhilippe Mathieu-Daudé } 474a2b0a27dSPhilippe Mathieu-Daudé 475a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_i5(DisasContext *ctx) 476a2b0a27dSPhilippe Mathieu-Daudé { 477a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_I5(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 478a2b0a27dSPhilippe Mathieu-Daudé int8_t s5 = (int8_t) sextract32(ctx->opcode, 16, 5); 479469a316dSPhilippe Mathieu-Daudé uint8_t u5 = extract32(ctx->opcode, 16, 5); 480a2b0a27dSPhilippe Mathieu-Daudé 481469a316dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(extract32(ctx->opcode, 21, 2)); 482469a316dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(extract32(ctx->opcode, 11, 5)); 483469a316dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(extract32(ctx->opcode, 6, 5)); 484a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 timm = tcg_temp_new_i32(); 485a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, u5); 486a2b0a27dSPhilippe Mathieu-Daudé 487a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_I5(ctx->opcode)) { 488a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDVI_df: 489a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addvi_df(cpu_env, tdf, twd, tws, timm); 490a2b0a27dSPhilippe Mathieu-Daudé break; 491a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBVI_df: 492a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subvi_df(cpu_env, tdf, twd, tws, timm); 493a2b0a27dSPhilippe Mathieu-Daudé break; 494a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAXI_S_df: 495a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 496a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maxi_s_df(cpu_env, tdf, twd, tws, timm); 497a2b0a27dSPhilippe Mathieu-Daudé break; 498a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAXI_U_df: 499a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maxi_u_df(cpu_env, tdf, twd, tws, timm); 500a2b0a27dSPhilippe Mathieu-Daudé break; 501a2b0a27dSPhilippe Mathieu-Daudé case OPC_MINI_S_df: 502a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 503a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mini_s_df(cpu_env, tdf, twd, tws, timm); 504a2b0a27dSPhilippe Mathieu-Daudé break; 505a2b0a27dSPhilippe Mathieu-Daudé case OPC_MINI_U_df: 506a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mini_u_df(cpu_env, tdf, twd, tws, timm); 507a2b0a27dSPhilippe Mathieu-Daudé break; 508a2b0a27dSPhilippe Mathieu-Daudé case OPC_CEQI_df: 509a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 510a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceqi_df(cpu_env, tdf, twd, tws, timm); 511a2b0a27dSPhilippe Mathieu-Daudé break; 512a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLTI_S_df: 513a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 514a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clti_s_df(cpu_env, tdf, twd, tws, timm); 515a2b0a27dSPhilippe Mathieu-Daudé break; 516a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLTI_U_df: 517a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clti_u_df(cpu_env, tdf, twd, tws, timm); 518a2b0a27dSPhilippe Mathieu-Daudé break; 519a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLEI_S_df: 520a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 521a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clei_s_df(cpu_env, tdf, twd, tws, timm); 522a2b0a27dSPhilippe Mathieu-Daudé break; 523a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLEI_U_df: 524a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clei_u_df(cpu_env, tdf, twd, tws, timm); 525a2b0a27dSPhilippe Mathieu-Daudé break; 526a2b0a27dSPhilippe Mathieu-Daudé case OPC_LDI_df: 527a2b0a27dSPhilippe Mathieu-Daudé { 528a2b0a27dSPhilippe Mathieu-Daudé int32_t s10 = sextract32(ctx->opcode, 11, 10); 529a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s10); 530a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ldi_df(cpu_env, tdf, twd, timm); 531a2b0a27dSPhilippe Mathieu-Daudé } 532a2b0a27dSPhilippe Mathieu-Daudé break; 533a2b0a27dSPhilippe Mathieu-Daudé default: 534a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 535a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 536a2b0a27dSPhilippe Mathieu-Daudé break; 537a2b0a27dSPhilippe Mathieu-Daudé } 538a2b0a27dSPhilippe Mathieu-Daudé 539a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 540a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 541a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 542a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(timm); 543a2b0a27dSPhilippe Mathieu-Daudé } 544a2b0a27dSPhilippe Mathieu-Daudé 545a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_bit(DisasContext *ctx) 546a2b0a27dSPhilippe Mathieu-Daudé { 547a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_BIT(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 548a2b0a27dSPhilippe Mathieu-Daudé uint8_t dfm = (ctx->opcode >> 16) & 0x7f; 549a2b0a27dSPhilippe Mathieu-Daudé uint32_t df = 0, m = 0; 550a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 551a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 552a2b0a27dSPhilippe Mathieu-Daudé 553a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf; 554a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tm; 555a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd; 556a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws; 557a2b0a27dSPhilippe Mathieu-Daudé 558a2b0a27dSPhilippe Mathieu-Daudé if ((dfm & 0x40) == 0x00) { 559a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x3f; 560a2b0a27dSPhilippe Mathieu-Daudé df = DF_DOUBLE; 561a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfm & 0x60) == 0x40) { 562a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x1f; 563a2b0a27dSPhilippe Mathieu-Daudé df = DF_WORD; 564a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfm & 0x70) == 0x60) { 565a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x0f; 566a2b0a27dSPhilippe Mathieu-Daudé df = DF_HALF; 567a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfm & 0x78) == 0x70) { 568a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x7; 569a2b0a27dSPhilippe Mathieu-Daudé df = DF_BYTE; 570a2b0a27dSPhilippe Mathieu-Daudé } else { 571a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 572a2b0a27dSPhilippe Mathieu-Daudé return; 573a2b0a27dSPhilippe Mathieu-Daudé } 574a2b0a27dSPhilippe Mathieu-Daudé 575a2b0a27dSPhilippe Mathieu-Daudé tdf = tcg_const_i32(df); 576a2b0a27dSPhilippe Mathieu-Daudé tm = tcg_const_i32(m); 577a2b0a27dSPhilippe Mathieu-Daudé twd = tcg_const_i32(wd); 578a2b0a27dSPhilippe Mathieu-Daudé tws = tcg_const_i32(ws); 579a2b0a27dSPhilippe Mathieu-Daudé 580a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_BIT(ctx->opcode)) { 581a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLLI_df: 582a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_slli_df(cpu_env, tdf, twd, tws, tm); 583a2b0a27dSPhilippe Mathieu-Daudé break; 584a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRAI_df: 585a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srai_df(cpu_env, tdf, twd, tws, tm); 586a2b0a27dSPhilippe Mathieu-Daudé break; 587a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLI_df: 588a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srli_df(cpu_env, tdf, twd, tws, tm); 589a2b0a27dSPhilippe Mathieu-Daudé break; 590a2b0a27dSPhilippe Mathieu-Daudé case OPC_BCLRI_df: 591a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclri_df(cpu_env, tdf, twd, tws, tm); 592a2b0a27dSPhilippe Mathieu-Daudé break; 593a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSETI_df: 594a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bseti_df(cpu_env, tdf, twd, tws, tm); 595a2b0a27dSPhilippe Mathieu-Daudé break; 596a2b0a27dSPhilippe Mathieu-Daudé case OPC_BNEGI_df: 597a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bnegi_df(cpu_env, tdf, twd, tws, tm); 598a2b0a27dSPhilippe Mathieu-Daudé break; 599a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSLI_df: 600a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsli_df(cpu_env, tdf, twd, tws, tm); 601a2b0a27dSPhilippe Mathieu-Daudé break; 602a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSRI_df: 603a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsri_df(cpu_env, tdf, twd, tws, tm); 604a2b0a27dSPhilippe Mathieu-Daudé break; 605a2b0a27dSPhilippe Mathieu-Daudé case OPC_SAT_S_df: 606a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sat_s_df(cpu_env, tdf, twd, tws, tm); 607a2b0a27dSPhilippe Mathieu-Daudé break; 608a2b0a27dSPhilippe Mathieu-Daudé case OPC_SAT_U_df: 609a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sat_u_df(cpu_env, tdf, twd, tws, tm); 610a2b0a27dSPhilippe Mathieu-Daudé break; 611a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRARI_df: 612a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srari_df(cpu_env, tdf, twd, tws, tm); 613a2b0a27dSPhilippe Mathieu-Daudé break; 614a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLRI_df: 615a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlri_df(cpu_env, tdf, twd, tws, tm); 616a2b0a27dSPhilippe Mathieu-Daudé break; 617a2b0a27dSPhilippe Mathieu-Daudé default: 618a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 619a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 620a2b0a27dSPhilippe Mathieu-Daudé break; 621a2b0a27dSPhilippe Mathieu-Daudé } 622a2b0a27dSPhilippe Mathieu-Daudé 623a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 624a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tm); 625a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 626a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 627a2b0a27dSPhilippe Mathieu-Daudé } 628a2b0a27dSPhilippe Mathieu-Daudé 629a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_3r(DisasContext *ctx) 630a2b0a27dSPhilippe Mathieu-Daudé { 631a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_3R(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 632a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 21) & 0x3; 633a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 634a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 635a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 636a2b0a27dSPhilippe Mathieu-Daudé 637a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(df); 638a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 639a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 640a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 641a2b0a27dSPhilippe Mathieu-Daudé 642a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3R(ctx->opcode)) { 643a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSL_df: 644a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 645a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 646a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_b(cpu_env, twd, tws, twt); 647a2b0a27dSPhilippe Mathieu-Daudé break; 648a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 649a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_h(cpu_env, twd, tws, twt); 650a2b0a27dSPhilippe Mathieu-Daudé break; 651a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 652a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_w(cpu_env, twd, tws, twt); 653a2b0a27dSPhilippe Mathieu-Daudé break; 654a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 655a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_d(cpu_env, twd, tws, twt); 656a2b0a27dSPhilippe Mathieu-Daudé break; 657a2b0a27dSPhilippe Mathieu-Daudé } 658a2b0a27dSPhilippe Mathieu-Daudé break; 659a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSR_df: 660a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 661a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 662a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_b(cpu_env, twd, tws, twt); 663a2b0a27dSPhilippe Mathieu-Daudé break; 664a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 665a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_h(cpu_env, twd, tws, twt); 666a2b0a27dSPhilippe Mathieu-Daudé break; 667a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 668a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_w(cpu_env, twd, tws, twt); 669a2b0a27dSPhilippe Mathieu-Daudé break; 670a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 671a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_d(cpu_env, twd, tws, twt); 672a2b0a27dSPhilippe Mathieu-Daudé break; 673a2b0a27dSPhilippe Mathieu-Daudé } 674a2b0a27dSPhilippe Mathieu-Daudé break; 675a2b0a27dSPhilippe Mathieu-Daudé case OPC_BCLR_df: 676a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 677a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 678a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_b(cpu_env, twd, tws, twt); 679a2b0a27dSPhilippe Mathieu-Daudé break; 680a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 681a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_h(cpu_env, twd, tws, twt); 682a2b0a27dSPhilippe Mathieu-Daudé break; 683a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 684a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_w(cpu_env, twd, tws, twt); 685a2b0a27dSPhilippe Mathieu-Daudé break; 686a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 687a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_d(cpu_env, twd, tws, twt); 688a2b0a27dSPhilippe Mathieu-Daudé break; 689a2b0a27dSPhilippe Mathieu-Daudé } 690a2b0a27dSPhilippe Mathieu-Daudé break; 691a2b0a27dSPhilippe Mathieu-Daudé case OPC_BNEG_df: 692a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 693a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 694a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_b(cpu_env, twd, tws, twt); 695a2b0a27dSPhilippe Mathieu-Daudé break; 696a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 697a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_h(cpu_env, twd, tws, twt); 698a2b0a27dSPhilippe Mathieu-Daudé break; 699a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 700a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_w(cpu_env, twd, tws, twt); 701a2b0a27dSPhilippe Mathieu-Daudé break; 702a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 703a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_d(cpu_env, twd, tws, twt); 704a2b0a27dSPhilippe Mathieu-Daudé break; 705a2b0a27dSPhilippe Mathieu-Daudé } 706a2b0a27dSPhilippe Mathieu-Daudé break; 707a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSET_df: 708a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 709a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 710a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_b(cpu_env, twd, tws, twt); 711a2b0a27dSPhilippe Mathieu-Daudé break; 712a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 713a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_h(cpu_env, twd, tws, twt); 714a2b0a27dSPhilippe Mathieu-Daudé break; 715a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 716a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_w(cpu_env, twd, tws, twt); 717a2b0a27dSPhilippe Mathieu-Daudé break; 718a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 719a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_d(cpu_env, twd, tws, twt); 720a2b0a27dSPhilippe Mathieu-Daudé break; 721a2b0a27dSPhilippe Mathieu-Daudé } 722a2b0a27dSPhilippe Mathieu-Daudé break; 723a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADD_A_df: 724a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 725a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 726a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_b(cpu_env, twd, tws, twt); 727a2b0a27dSPhilippe Mathieu-Daudé break; 728a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 729a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_h(cpu_env, twd, tws, twt); 730a2b0a27dSPhilippe Mathieu-Daudé break; 731a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 732a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_w(cpu_env, twd, tws, twt); 733a2b0a27dSPhilippe Mathieu-Daudé break; 734a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 735a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_d(cpu_env, twd, tws, twt); 736a2b0a27dSPhilippe Mathieu-Daudé break; 737a2b0a27dSPhilippe Mathieu-Daudé } 738a2b0a27dSPhilippe Mathieu-Daudé break; 739a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_A_df: 740a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 741a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 742a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_b(cpu_env, twd, tws, twt); 743a2b0a27dSPhilippe Mathieu-Daudé break; 744a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 745a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_h(cpu_env, twd, tws, twt); 746a2b0a27dSPhilippe Mathieu-Daudé break; 747a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 748a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_w(cpu_env, twd, tws, twt); 749a2b0a27dSPhilippe Mathieu-Daudé break; 750a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 751a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_d(cpu_env, twd, tws, twt); 752a2b0a27dSPhilippe Mathieu-Daudé break; 753a2b0a27dSPhilippe Mathieu-Daudé } 754a2b0a27dSPhilippe Mathieu-Daudé break; 755a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_S_df: 756a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 757a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 758a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_b(cpu_env, twd, tws, twt); 759a2b0a27dSPhilippe Mathieu-Daudé break; 760a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 761a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_h(cpu_env, twd, tws, twt); 762a2b0a27dSPhilippe Mathieu-Daudé break; 763a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 764a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_w(cpu_env, twd, tws, twt); 765a2b0a27dSPhilippe Mathieu-Daudé break; 766a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 767a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_d(cpu_env, twd, tws, twt); 768a2b0a27dSPhilippe Mathieu-Daudé break; 769a2b0a27dSPhilippe Mathieu-Daudé } 770a2b0a27dSPhilippe Mathieu-Daudé break; 771a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_U_df: 772a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 773a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 774a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_b(cpu_env, twd, tws, twt); 775a2b0a27dSPhilippe Mathieu-Daudé break; 776a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 777a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_h(cpu_env, twd, tws, twt); 778a2b0a27dSPhilippe Mathieu-Daudé break; 779a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 780a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_w(cpu_env, twd, tws, twt); 781a2b0a27dSPhilippe Mathieu-Daudé break; 782a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 783a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_d(cpu_env, twd, tws, twt); 784a2b0a27dSPhilippe Mathieu-Daudé break; 785a2b0a27dSPhilippe Mathieu-Daudé } 786a2b0a27dSPhilippe Mathieu-Daudé break; 787a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDV_df: 788a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 789a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 790a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_b(cpu_env, twd, tws, twt); 791a2b0a27dSPhilippe Mathieu-Daudé break; 792a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 793a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_h(cpu_env, twd, tws, twt); 794a2b0a27dSPhilippe Mathieu-Daudé break; 795a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 796a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_w(cpu_env, twd, tws, twt); 797a2b0a27dSPhilippe Mathieu-Daudé break; 798a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 799a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_d(cpu_env, twd, tws, twt); 800a2b0a27dSPhilippe Mathieu-Daudé break; 801a2b0a27dSPhilippe Mathieu-Daudé } 802a2b0a27dSPhilippe Mathieu-Daudé break; 803a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVE_S_df: 804a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 805a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 806a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_b(cpu_env, twd, tws, twt); 807a2b0a27dSPhilippe Mathieu-Daudé break; 808a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 809a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_h(cpu_env, twd, tws, twt); 810a2b0a27dSPhilippe Mathieu-Daudé break; 811a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 812a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_w(cpu_env, twd, tws, twt); 813a2b0a27dSPhilippe Mathieu-Daudé break; 814a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 815a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_d(cpu_env, twd, tws, twt); 816a2b0a27dSPhilippe Mathieu-Daudé break; 817a2b0a27dSPhilippe Mathieu-Daudé } 818a2b0a27dSPhilippe Mathieu-Daudé break; 819a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVE_U_df: 820a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 821a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 822a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_b(cpu_env, twd, tws, twt); 823a2b0a27dSPhilippe Mathieu-Daudé break; 824a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 825a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_h(cpu_env, twd, tws, twt); 826a2b0a27dSPhilippe Mathieu-Daudé break; 827a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 828a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_w(cpu_env, twd, tws, twt); 829a2b0a27dSPhilippe Mathieu-Daudé break; 830a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 831a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_d(cpu_env, twd, tws, twt); 832a2b0a27dSPhilippe Mathieu-Daudé break; 833a2b0a27dSPhilippe Mathieu-Daudé } 834a2b0a27dSPhilippe Mathieu-Daudé break; 835a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVER_S_df: 836a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 837a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 838a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_b(cpu_env, twd, tws, twt); 839a2b0a27dSPhilippe Mathieu-Daudé break; 840a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 841a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_h(cpu_env, twd, tws, twt); 842a2b0a27dSPhilippe Mathieu-Daudé break; 843a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 844a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_w(cpu_env, twd, tws, twt); 845a2b0a27dSPhilippe Mathieu-Daudé break; 846a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 847a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_d(cpu_env, twd, tws, twt); 848a2b0a27dSPhilippe Mathieu-Daudé break; 849a2b0a27dSPhilippe Mathieu-Daudé } 850a2b0a27dSPhilippe Mathieu-Daudé break; 851a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVER_U_df: 852a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 853a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 854a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_b(cpu_env, twd, tws, twt); 855a2b0a27dSPhilippe Mathieu-Daudé break; 856a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 857a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_h(cpu_env, twd, tws, twt); 858a2b0a27dSPhilippe Mathieu-Daudé break; 859a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 860a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_w(cpu_env, twd, tws, twt); 861a2b0a27dSPhilippe Mathieu-Daudé break; 862a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 863a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_d(cpu_env, twd, tws, twt); 864a2b0a27dSPhilippe Mathieu-Daudé break; 865a2b0a27dSPhilippe Mathieu-Daudé } 866a2b0a27dSPhilippe Mathieu-Daudé break; 867a2b0a27dSPhilippe Mathieu-Daudé case OPC_CEQ_df: 868a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 869a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 870a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_b(cpu_env, twd, tws, twt); 871a2b0a27dSPhilippe Mathieu-Daudé break; 872a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 873a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_h(cpu_env, twd, tws, twt); 874a2b0a27dSPhilippe Mathieu-Daudé break; 875a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 876a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_w(cpu_env, twd, tws, twt); 877a2b0a27dSPhilippe Mathieu-Daudé break; 878a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 879a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_d(cpu_env, twd, tws, twt); 880a2b0a27dSPhilippe Mathieu-Daudé break; 881a2b0a27dSPhilippe Mathieu-Daudé } 882a2b0a27dSPhilippe Mathieu-Daudé break; 883a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLE_S_df: 884a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 885a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 886a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_b(cpu_env, twd, tws, twt); 887a2b0a27dSPhilippe Mathieu-Daudé break; 888a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 889a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_h(cpu_env, twd, tws, twt); 890a2b0a27dSPhilippe Mathieu-Daudé break; 891a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 892a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_w(cpu_env, twd, tws, twt); 893a2b0a27dSPhilippe Mathieu-Daudé break; 894a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 895a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_d(cpu_env, twd, tws, twt); 896a2b0a27dSPhilippe Mathieu-Daudé break; 897a2b0a27dSPhilippe Mathieu-Daudé } 898a2b0a27dSPhilippe Mathieu-Daudé break; 899a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLE_U_df: 900a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 901a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 902a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_b(cpu_env, twd, tws, twt); 903a2b0a27dSPhilippe Mathieu-Daudé break; 904a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 905a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_h(cpu_env, twd, tws, twt); 906a2b0a27dSPhilippe Mathieu-Daudé break; 907a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 908a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_w(cpu_env, twd, tws, twt); 909a2b0a27dSPhilippe Mathieu-Daudé break; 910a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 911a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_d(cpu_env, twd, tws, twt); 912a2b0a27dSPhilippe Mathieu-Daudé break; 913a2b0a27dSPhilippe Mathieu-Daudé } 914a2b0a27dSPhilippe Mathieu-Daudé break; 915a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLT_S_df: 916a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 917a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 918a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_b(cpu_env, twd, tws, twt); 919a2b0a27dSPhilippe Mathieu-Daudé break; 920a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 921a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_h(cpu_env, twd, tws, twt); 922a2b0a27dSPhilippe Mathieu-Daudé break; 923a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 924a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_w(cpu_env, twd, tws, twt); 925a2b0a27dSPhilippe Mathieu-Daudé break; 926a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 927a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_d(cpu_env, twd, tws, twt); 928a2b0a27dSPhilippe Mathieu-Daudé break; 929a2b0a27dSPhilippe Mathieu-Daudé } 930a2b0a27dSPhilippe Mathieu-Daudé break; 931a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLT_U_df: 932a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 933a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 934a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_b(cpu_env, twd, tws, twt); 935a2b0a27dSPhilippe Mathieu-Daudé break; 936a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 937a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_h(cpu_env, twd, tws, twt); 938a2b0a27dSPhilippe Mathieu-Daudé break; 939a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 940a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_w(cpu_env, twd, tws, twt); 941a2b0a27dSPhilippe Mathieu-Daudé break; 942a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 943a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_d(cpu_env, twd, tws, twt); 944a2b0a27dSPhilippe Mathieu-Daudé break; 945a2b0a27dSPhilippe Mathieu-Daudé } 946a2b0a27dSPhilippe Mathieu-Daudé break; 947a2b0a27dSPhilippe Mathieu-Daudé case OPC_DIV_S_df: 948a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 949a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 950a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_b(cpu_env, twd, tws, twt); 951a2b0a27dSPhilippe Mathieu-Daudé break; 952a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 953a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_h(cpu_env, twd, tws, twt); 954a2b0a27dSPhilippe Mathieu-Daudé break; 955a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 956a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_w(cpu_env, twd, tws, twt); 957a2b0a27dSPhilippe Mathieu-Daudé break; 958a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 959a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_d(cpu_env, twd, tws, twt); 960a2b0a27dSPhilippe Mathieu-Daudé break; 961a2b0a27dSPhilippe Mathieu-Daudé } 962a2b0a27dSPhilippe Mathieu-Daudé break; 963a2b0a27dSPhilippe Mathieu-Daudé case OPC_DIV_U_df: 964a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 965a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 966a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_b(cpu_env, twd, tws, twt); 967a2b0a27dSPhilippe Mathieu-Daudé break; 968a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 969a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_h(cpu_env, twd, tws, twt); 970a2b0a27dSPhilippe Mathieu-Daudé break; 971a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 972a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_w(cpu_env, twd, tws, twt); 973a2b0a27dSPhilippe Mathieu-Daudé break; 974a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 975a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_d(cpu_env, twd, tws, twt); 976a2b0a27dSPhilippe Mathieu-Daudé break; 977a2b0a27dSPhilippe Mathieu-Daudé } 978a2b0a27dSPhilippe Mathieu-Daudé break; 979a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_A_df: 980a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 981a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 982a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_b(cpu_env, twd, tws, twt); 983a2b0a27dSPhilippe Mathieu-Daudé break; 984a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 985a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_h(cpu_env, twd, tws, twt); 986a2b0a27dSPhilippe Mathieu-Daudé break; 987a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 988a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_w(cpu_env, twd, tws, twt); 989a2b0a27dSPhilippe Mathieu-Daudé break; 990a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 991a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_d(cpu_env, twd, tws, twt); 992a2b0a27dSPhilippe Mathieu-Daudé break; 993a2b0a27dSPhilippe Mathieu-Daudé } 994a2b0a27dSPhilippe Mathieu-Daudé break; 995a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_S_df: 996a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 997a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 998a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_b(cpu_env, twd, tws, twt); 999a2b0a27dSPhilippe Mathieu-Daudé break; 1000a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1001a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_h(cpu_env, twd, tws, twt); 1002a2b0a27dSPhilippe Mathieu-Daudé break; 1003a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1004a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_w(cpu_env, twd, tws, twt); 1005a2b0a27dSPhilippe Mathieu-Daudé break; 1006a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1007a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_d(cpu_env, twd, tws, twt); 1008a2b0a27dSPhilippe Mathieu-Daudé break; 1009a2b0a27dSPhilippe Mathieu-Daudé } 1010a2b0a27dSPhilippe Mathieu-Daudé break; 1011a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_U_df: 1012a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1013a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1014a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_b(cpu_env, twd, tws, twt); 1015a2b0a27dSPhilippe Mathieu-Daudé break; 1016a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1017a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_h(cpu_env, twd, tws, twt); 1018a2b0a27dSPhilippe Mathieu-Daudé break; 1019a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1020a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_w(cpu_env, twd, tws, twt); 1021a2b0a27dSPhilippe Mathieu-Daudé break; 1022a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1023a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_d(cpu_env, twd, tws, twt); 1024a2b0a27dSPhilippe Mathieu-Daudé break; 1025a2b0a27dSPhilippe Mathieu-Daudé } 1026a2b0a27dSPhilippe Mathieu-Daudé break; 1027a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_A_df: 1028a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1029a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1030a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_b(cpu_env, twd, tws, twt); 1031a2b0a27dSPhilippe Mathieu-Daudé break; 1032a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1033a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_h(cpu_env, twd, tws, twt); 1034a2b0a27dSPhilippe Mathieu-Daudé break; 1035a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1036a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_w(cpu_env, twd, tws, twt); 1037a2b0a27dSPhilippe Mathieu-Daudé break; 1038a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1039a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_d(cpu_env, twd, tws, twt); 1040a2b0a27dSPhilippe Mathieu-Daudé break; 1041a2b0a27dSPhilippe Mathieu-Daudé } 1042a2b0a27dSPhilippe Mathieu-Daudé break; 1043a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_S_df: 1044a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1045a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1046a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_b(cpu_env, twd, tws, twt); 1047a2b0a27dSPhilippe Mathieu-Daudé break; 1048a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1049a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_h(cpu_env, twd, tws, twt); 1050a2b0a27dSPhilippe Mathieu-Daudé break; 1051a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1052a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_w(cpu_env, twd, tws, twt); 1053a2b0a27dSPhilippe Mathieu-Daudé break; 1054a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1055a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_d(cpu_env, twd, tws, twt); 1056a2b0a27dSPhilippe Mathieu-Daudé break; 1057a2b0a27dSPhilippe Mathieu-Daudé } 1058a2b0a27dSPhilippe Mathieu-Daudé break; 1059a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_U_df: 1060a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1061a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1062a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_b(cpu_env, twd, tws, twt); 1063a2b0a27dSPhilippe Mathieu-Daudé break; 1064a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1065a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_h(cpu_env, twd, tws, twt); 1066a2b0a27dSPhilippe Mathieu-Daudé break; 1067a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1068a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_w(cpu_env, twd, tws, twt); 1069a2b0a27dSPhilippe Mathieu-Daudé break; 1070a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1071a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_d(cpu_env, twd, tws, twt); 1072a2b0a27dSPhilippe Mathieu-Daudé break; 1073a2b0a27dSPhilippe Mathieu-Daudé } 1074a2b0a27dSPhilippe Mathieu-Daudé break; 1075a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOD_S_df: 1076a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1077a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1078a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_b(cpu_env, twd, tws, twt); 1079a2b0a27dSPhilippe Mathieu-Daudé break; 1080a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1081a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_h(cpu_env, twd, tws, twt); 1082a2b0a27dSPhilippe Mathieu-Daudé break; 1083a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1084a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_w(cpu_env, twd, tws, twt); 1085a2b0a27dSPhilippe Mathieu-Daudé break; 1086a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1087a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_d(cpu_env, twd, tws, twt); 1088a2b0a27dSPhilippe Mathieu-Daudé break; 1089a2b0a27dSPhilippe Mathieu-Daudé } 1090a2b0a27dSPhilippe Mathieu-Daudé break; 1091a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOD_U_df: 1092a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1093a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1094a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_b(cpu_env, twd, tws, twt); 1095a2b0a27dSPhilippe Mathieu-Daudé break; 1096a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1097a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_h(cpu_env, twd, tws, twt); 1098a2b0a27dSPhilippe Mathieu-Daudé break; 1099a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1100a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_w(cpu_env, twd, tws, twt); 1101a2b0a27dSPhilippe Mathieu-Daudé break; 1102a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1103a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_d(cpu_env, twd, tws, twt); 1104a2b0a27dSPhilippe Mathieu-Daudé break; 1105a2b0a27dSPhilippe Mathieu-Daudé } 1106a2b0a27dSPhilippe Mathieu-Daudé break; 1107a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADDV_df: 1108a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1109a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1110a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_b(cpu_env, twd, tws, twt); 1111a2b0a27dSPhilippe Mathieu-Daudé break; 1112a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1113a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_h(cpu_env, twd, tws, twt); 1114a2b0a27dSPhilippe Mathieu-Daudé break; 1115a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1116a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_w(cpu_env, twd, tws, twt); 1117a2b0a27dSPhilippe Mathieu-Daudé break; 1118a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1119a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_d(cpu_env, twd, tws, twt); 1120a2b0a27dSPhilippe Mathieu-Daudé break; 1121a2b0a27dSPhilippe Mathieu-Daudé } 1122a2b0a27dSPhilippe Mathieu-Daudé break; 1123a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUBV_df: 1124a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1125a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1126a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_b(cpu_env, twd, tws, twt); 1127a2b0a27dSPhilippe Mathieu-Daudé break; 1128a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1129a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_h(cpu_env, twd, tws, twt); 1130a2b0a27dSPhilippe Mathieu-Daudé break; 1131a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1132a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_w(cpu_env, twd, tws, twt); 1133a2b0a27dSPhilippe Mathieu-Daudé break; 1134a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1135a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_d(cpu_env, twd, tws, twt); 1136a2b0a27dSPhilippe Mathieu-Daudé break; 1137a2b0a27dSPhilippe Mathieu-Daudé } 1138a2b0a27dSPhilippe Mathieu-Daudé break; 1139a2b0a27dSPhilippe Mathieu-Daudé case OPC_ASUB_S_df: 1140a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1141a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1142a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_b(cpu_env, twd, tws, twt); 1143a2b0a27dSPhilippe Mathieu-Daudé break; 1144a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1145a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_h(cpu_env, twd, tws, twt); 1146a2b0a27dSPhilippe Mathieu-Daudé break; 1147a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1148a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_w(cpu_env, twd, tws, twt); 1149a2b0a27dSPhilippe Mathieu-Daudé break; 1150a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1151a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_d(cpu_env, twd, tws, twt); 1152a2b0a27dSPhilippe Mathieu-Daudé break; 1153a2b0a27dSPhilippe Mathieu-Daudé } 1154a2b0a27dSPhilippe Mathieu-Daudé break; 1155a2b0a27dSPhilippe Mathieu-Daudé case OPC_ASUB_U_df: 1156a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1157a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1158a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_b(cpu_env, twd, tws, twt); 1159a2b0a27dSPhilippe Mathieu-Daudé break; 1160a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1161a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_h(cpu_env, twd, tws, twt); 1162a2b0a27dSPhilippe Mathieu-Daudé break; 1163a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1164a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_w(cpu_env, twd, tws, twt); 1165a2b0a27dSPhilippe Mathieu-Daudé break; 1166a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1167a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_d(cpu_env, twd, tws, twt); 1168a2b0a27dSPhilippe Mathieu-Daudé break; 1169a2b0a27dSPhilippe Mathieu-Daudé } 1170a2b0a27dSPhilippe Mathieu-Daudé break; 1171a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVEV_df: 1172a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1173a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1174a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_b(cpu_env, twd, tws, twt); 1175a2b0a27dSPhilippe Mathieu-Daudé break; 1176a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1177a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_h(cpu_env, twd, tws, twt); 1178a2b0a27dSPhilippe Mathieu-Daudé break; 1179a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1180a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_w(cpu_env, twd, tws, twt); 1181a2b0a27dSPhilippe Mathieu-Daudé break; 1182a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1183a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_d(cpu_env, twd, tws, twt); 1184a2b0a27dSPhilippe Mathieu-Daudé break; 1185a2b0a27dSPhilippe Mathieu-Daudé } 1186a2b0a27dSPhilippe Mathieu-Daudé break; 1187a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVOD_df: 1188a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1189a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1190a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_b(cpu_env, twd, tws, twt); 1191a2b0a27dSPhilippe Mathieu-Daudé break; 1192a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1193a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_h(cpu_env, twd, tws, twt); 1194a2b0a27dSPhilippe Mathieu-Daudé break; 1195a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1196a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_w(cpu_env, twd, tws, twt); 1197a2b0a27dSPhilippe Mathieu-Daudé break; 1198a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1199a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_d(cpu_env, twd, tws, twt); 1200a2b0a27dSPhilippe Mathieu-Daudé break; 1201a2b0a27dSPhilippe Mathieu-Daudé } 1202a2b0a27dSPhilippe Mathieu-Daudé break; 1203a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVL_df: 1204a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1205a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1206a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_b(cpu_env, twd, tws, twt); 1207a2b0a27dSPhilippe Mathieu-Daudé break; 1208a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1209a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_h(cpu_env, twd, tws, twt); 1210a2b0a27dSPhilippe Mathieu-Daudé break; 1211a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1212a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_w(cpu_env, twd, tws, twt); 1213a2b0a27dSPhilippe Mathieu-Daudé break; 1214a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1215a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_d(cpu_env, twd, tws, twt); 1216a2b0a27dSPhilippe Mathieu-Daudé break; 1217a2b0a27dSPhilippe Mathieu-Daudé } 1218a2b0a27dSPhilippe Mathieu-Daudé break; 1219a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVR_df: 1220a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1221a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1222a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_b(cpu_env, twd, tws, twt); 1223a2b0a27dSPhilippe Mathieu-Daudé break; 1224a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1225a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_h(cpu_env, twd, tws, twt); 1226a2b0a27dSPhilippe Mathieu-Daudé break; 1227a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1228a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_w(cpu_env, twd, tws, twt); 1229a2b0a27dSPhilippe Mathieu-Daudé break; 1230a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1231a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_d(cpu_env, twd, tws, twt); 1232a2b0a27dSPhilippe Mathieu-Daudé break; 1233a2b0a27dSPhilippe Mathieu-Daudé } 1234a2b0a27dSPhilippe Mathieu-Daudé break; 1235a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCKEV_df: 1236a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1237a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1238a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_b(cpu_env, twd, tws, twt); 1239a2b0a27dSPhilippe Mathieu-Daudé break; 1240a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1241a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_h(cpu_env, twd, tws, twt); 1242a2b0a27dSPhilippe Mathieu-Daudé break; 1243a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1244a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_w(cpu_env, twd, tws, twt); 1245a2b0a27dSPhilippe Mathieu-Daudé break; 1246a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1247a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_d(cpu_env, twd, tws, twt); 1248a2b0a27dSPhilippe Mathieu-Daudé break; 1249a2b0a27dSPhilippe Mathieu-Daudé } 1250a2b0a27dSPhilippe Mathieu-Daudé break; 1251a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCKOD_df: 1252a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1253a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1254a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_b(cpu_env, twd, tws, twt); 1255a2b0a27dSPhilippe Mathieu-Daudé break; 1256a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1257a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_h(cpu_env, twd, tws, twt); 1258a2b0a27dSPhilippe Mathieu-Daudé break; 1259a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1260a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_w(cpu_env, twd, tws, twt); 1261a2b0a27dSPhilippe Mathieu-Daudé break; 1262a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1263a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_d(cpu_env, twd, tws, twt); 1264a2b0a27dSPhilippe Mathieu-Daudé break; 1265a2b0a27dSPhilippe Mathieu-Daudé } 1266a2b0a27dSPhilippe Mathieu-Daudé break; 1267a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLL_df: 1268a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1269a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1270a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_b(cpu_env, twd, tws, twt); 1271a2b0a27dSPhilippe Mathieu-Daudé break; 1272a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1273a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_h(cpu_env, twd, tws, twt); 1274a2b0a27dSPhilippe Mathieu-Daudé break; 1275a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1276a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_w(cpu_env, twd, tws, twt); 1277a2b0a27dSPhilippe Mathieu-Daudé break; 1278a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1279a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_d(cpu_env, twd, tws, twt); 1280a2b0a27dSPhilippe Mathieu-Daudé break; 1281a2b0a27dSPhilippe Mathieu-Daudé } 1282a2b0a27dSPhilippe Mathieu-Daudé break; 1283a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRA_df: 1284a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1285a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1286a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_b(cpu_env, twd, tws, twt); 1287a2b0a27dSPhilippe Mathieu-Daudé break; 1288a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1289a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_h(cpu_env, twd, tws, twt); 1290a2b0a27dSPhilippe Mathieu-Daudé break; 1291a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1292a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_w(cpu_env, twd, tws, twt); 1293a2b0a27dSPhilippe Mathieu-Daudé break; 1294a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1295a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_d(cpu_env, twd, tws, twt); 1296a2b0a27dSPhilippe Mathieu-Daudé break; 1297a2b0a27dSPhilippe Mathieu-Daudé } 1298a2b0a27dSPhilippe Mathieu-Daudé break; 1299a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRAR_df: 1300a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1301a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1302a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_b(cpu_env, twd, tws, twt); 1303a2b0a27dSPhilippe Mathieu-Daudé break; 1304a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1305a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_h(cpu_env, twd, tws, twt); 1306a2b0a27dSPhilippe Mathieu-Daudé break; 1307a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1308a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_w(cpu_env, twd, tws, twt); 1309a2b0a27dSPhilippe Mathieu-Daudé break; 1310a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1311a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_d(cpu_env, twd, tws, twt); 1312a2b0a27dSPhilippe Mathieu-Daudé break; 1313a2b0a27dSPhilippe Mathieu-Daudé } 1314a2b0a27dSPhilippe Mathieu-Daudé break; 1315a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRL_df: 1316a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1317a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1318a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_b(cpu_env, twd, tws, twt); 1319a2b0a27dSPhilippe Mathieu-Daudé break; 1320a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1321a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_h(cpu_env, twd, tws, twt); 1322a2b0a27dSPhilippe Mathieu-Daudé break; 1323a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1324a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_w(cpu_env, twd, tws, twt); 1325a2b0a27dSPhilippe Mathieu-Daudé break; 1326a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1327a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_d(cpu_env, twd, tws, twt); 1328a2b0a27dSPhilippe Mathieu-Daudé break; 1329a2b0a27dSPhilippe Mathieu-Daudé } 1330a2b0a27dSPhilippe Mathieu-Daudé break; 1331a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLR_df: 1332a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1333a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1334a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_b(cpu_env, twd, tws, twt); 1335a2b0a27dSPhilippe Mathieu-Daudé break; 1336a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1337a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_h(cpu_env, twd, tws, twt); 1338a2b0a27dSPhilippe Mathieu-Daudé break; 1339a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1340a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_w(cpu_env, twd, tws, twt); 1341a2b0a27dSPhilippe Mathieu-Daudé break; 1342a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1343a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_d(cpu_env, twd, tws, twt); 1344a2b0a27dSPhilippe Mathieu-Daudé break; 1345a2b0a27dSPhilippe Mathieu-Daudé } 1346a2b0a27dSPhilippe Mathieu-Daudé break; 1347a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBS_S_df: 1348a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1349a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1350a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_b(cpu_env, twd, tws, twt); 1351a2b0a27dSPhilippe Mathieu-Daudé break; 1352a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1353a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_h(cpu_env, twd, tws, twt); 1354a2b0a27dSPhilippe Mathieu-Daudé break; 1355a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1356a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_w(cpu_env, twd, tws, twt); 1357a2b0a27dSPhilippe Mathieu-Daudé break; 1358a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1359a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_d(cpu_env, twd, tws, twt); 1360a2b0a27dSPhilippe Mathieu-Daudé break; 1361a2b0a27dSPhilippe Mathieu-Daudé } 1362a2b0a27dSPhilippe Mathieu-Daudé break; 1363a2b0a27dSPhilippe Mathieu-Daudé case OPC_MULV_df: 1364a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1365a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1366a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_b(cpu_env, twd, tws, twt); 1367a2b0a27dSPhilippe Mathieu-Daudé break; 1368a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1369a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_h(cpu_env, twd, tws, twt); 1370a2b0a27dSPhilippe Mathieu-Daudé break; 1371a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1372a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_w(cpu_env, twd, tws, twt); 1373a2b0a27dSPhilippe Mathieu-Daudé break; 1374a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1375a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_d(cpu_env, twd, tws, twt); 1376a2b0a27dSPhilippe Mathieu-Daudé break; 1377a2b0a27dSPhilippe Mathieu-Daudé } 1378a2b0a27dSPhilippe Mathieu-Daudé break; 1379a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLD_df: 1380a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sld_df(cpu_env, tdf, twd, tws, twt); 1381a2b0a27dSPhilippe Mathieu-Daudé break; 1382a2b0a27dSPhilippe Mathieu-Daudé case OPC_VSHF_df: 1383a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_vshf_df(cpu_env, tdf, twd, tws, twt); 1384a2b0a27dSPhilippe Mathieu-Daudé break; 1385a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBV_df: 1386a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1387a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1388a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_b(cpu_env, twd, tws, twt); 1389a2b0a27dSPhilippe Mathieu-Daudé break; 1390a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1391a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_h(cpu_env, twd, tws, twt); 1392a2b0a27dSPhilippe Mathieu-Daudé break; 1393a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1394a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_w(cpu_env, twd, tws, twt); 1395a2b0a27dSPhilippe Mathieu-Daudé break; 1396a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1397a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_d(cpu_env, twd, tws, twt); 1398a2b0a27dSPhilippe Mathieu-Daudé break; 1399a2b0a27dSPhilippe Mathieu-Daudé } 1400a2b0a27dSPhilippe Mathieu-Daudé break; 1401a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBS_U_df: 1402a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1403a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1404a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_b(cpu_env, twd, tws, twt); 1405a2b0a27dSPhilippe Mathieu-Daudé break; 1406a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1407a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_h(cpu_env, twd, tws, twt); 1408a2b0a27dSPhilippe Mathieu-Daudé break; 1409a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1410a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_w(cpu_env, twd, tws, twt); 1411a2b0a27dSPhilippe Mathieu-Daudé break; 1412a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1413a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_d(cpu_env, twd, tws, twt); 1414a2b0a27dSPhilippe Mathieu-Daudé break; 1415a2b0a27dSPhilippe Mathieu-Daudé } 1416a2b0a27dSPhilippe Mathieu-Daudé break; 1417a2b0a27dSPhilippe Mathieu-Daudé case OPC_SPLAT_df: 1418a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_splat_df(cpu_env, tdf, twd, tws, twt); 1419a2b0a27dSPhilippe Mathieu-Daudé break; 1420a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBSUS_U_df: 1421a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1422a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1423a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_b(cpu_env, twd, tws, twt); 1424a2b0a27dSPhilippe Mathieu-Daudé break; 1425a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1426a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_h(cpu_env, twd, tws, twt); 1427a2b0a27dSPhilippe Mathieu-Daudé break; 1428a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1429a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_w(cpu_env, twd, tws, twt); 1430a2b0a27dSPhilippe Mathieu-Daudé break; 1431a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1432a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_d(cpu_env, twd, tws, twt); 1433a2b0a27dSPhilippe Mathieu-Daudé break; 1434a2b0a27dSPhilippe Mathieu-Daudé } 1435a2b0a27dSPhilippe Mathieu-Daudé break; 1436a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBSUU_S_df: 1437a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1438a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1439a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_b(cpu_env, twd, tws, twt); 1440a2b0a27dSPhilippe Mathieu-Daudé break; 1441a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1442a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_h(cpu_env, twd, tws, twt); 1443a2b0a27dSPhilippe Mathieu-Daudé break; 1444a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1445a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_w(cpu_env, twd, tws, twt); 1446a2b0a27dSPhilippe Mathieu-Daudé break; 1447a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1448a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_d(cpu_env, twd, tws, twt); 1449a2b0a27dSPhilippe Mathieu-Daudé break; 1450a2b0a27dSPhilippe Mathieu-Daudé } 1451a2b0a27dSPhilippe Mathieu-Daudé break; 1452a2b0a27dSPhilippe Mathieu-Daudé 1453a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_S_df: 1454a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_U_df: 1455a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_S_df: 1456a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_U_df: 1457a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_S_df: 1458a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_S_df: 1459a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_U_df: 1460a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_U_df: 1461a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_S_df: 1462a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_U_df: 1463a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_BYTE) { 1464a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1465a2b0a27dSPhilippe Mathieu-Daudé break; 1466a2b0a27dSPhilippe Mathieu-Daudé } 1467a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3R(ctx->opcode)) { 1468a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_S_df: 1469a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1470a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1471a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_h(cpu_env, twd, tws, twt); 1472a2b0a27dSPhilippe Mathieu-Daudé break; 1473a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1474a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_w(cpu_env, twd, tws, twt); 1475a2b0a27dSPhilippe Mathieu-Daudé break; 1476a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1477a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_d(cpu_env, twd, tws, twt); 1478a2b0a27dSPhilippe Mathieu-Daudé break; 1479a2b0a27dSPhilippe Mathieu-Daudé } 1480a2b0a27dSPhilippe Mathieu-Daudé break; 1481a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_U_df: 1482a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1483a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1484a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_h(cpu_env, twd, tws, twt); 1485a2b0a27dSPhilippe Mathieu-Daudé break; 1486a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1487a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_w(cpu_env, twd, tws, twt); 1488a2b0a27dSPhilippe Mathieu-Daudé break; 1489a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1490a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_d(cpu_env, twd, tws, twt); 1491a2b0a27dSPhilippe Mathieu-Daudé break; 1492a2b0a27dSPhilippe Mathieu-Daudé } 1493a2b0a27dSPhilippe Mathieu-Daudé break; 1494a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_S_df: 1495a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1496a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1497a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_h(cpu_env, twd, tws, twt); 1498a2b0a27dSPhilippe Mathieu-Daudé break; 1499a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1500a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_w(cpu_env, twd, tws, twt); 1501a2b0a27dSPhilippe Mathieu-Daudé break; 1502a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1503a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_d(cpu_env, twd, tws, twt); 1504a2b0a27dSPhilippe Mathieu-Daudé break; 1505a2b0a27dSPhilippe Mathieu-Daudé } 1506a2b0a27dSPhilippe Mathieu-Daudé break; 1507a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_U_df: 1508a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1509a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1510a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_h(cpu_env, twd, tws, twt); 1511a2b0a27dSPhilippe Mathieu-Daudé break; 1512a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1513a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_w(cpu_env, twd, tws, twt); 1514a2b0a27dSPhilippe Mathieu-Daudé break; 1515a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1516a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_d(cpu_env, twd, tws, twt); 1517a2b0a27dSPhilippe Mathieu-Daudé break; 1518a2b0a27dSPhilippe Mathieu-Daudé } 1519a2b0a27dSPhilippe Mathieu-Daudé break; 1520a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_S_df: 1521a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1522a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1523a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_h(cpu_env, twd, tws, twt); 1524a2b0a27dSPhilippe Mathieu-Daudé break; 1525a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1526a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_w(cpu_env, twd, tws, twt); 1527a2b0a27dSPhilippe Mathieu-Daudé break; 1528a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1529a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_d(cpu_env, twd, tws, twt); 1530a2b0a27dSPhilippe Mathieu-Daudé break; 1531a2b0a27dSPhilippe Mathieu-Daudé } 1532a2b0a27dSPhilippe Mathieu-Daudé break; 1533a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_U_df: 1534a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1535a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1536a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_h(cpu_env, twd, tws, twt); 1537a2b0a27dSPhilippe Mathieu-Daudé break; 1538a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1539a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_w(cpu_env, twd, tws, twt); 1540a2b0a27dSPhilippe Mathieu-Daudé break; 1541a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1542a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_d(cpu_env, twd, tws, twt); 1543a2b0a27dSPhilippe Mathieu-Daudé break; 1544a2b0a27dSPhilippe Mathieu-Daudé } 1545a2b0a27dSPhilippe Mathieu-Daudé break; 1546a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_S_df: 1547a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1548a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1549a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_h(cpu_env, twd, tws, twt); 1550a2b0a27dSPhilippe Mathieu-Daudé break; 1551a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1552a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_w(cpu_env, twd, tws, twt); 1553a2b0a27dSPhilippe Mathieu-Daudé break; 1554a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1555a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_d(cpu_env, twd, tws, twt); 1556a2b0a27dSPhilippe Mathieu-Daudé break; 1557a2b0a27dSPhilippe Mathieu-Daudé } 1558a2b0a27dSPhilippe Mathieu-Daudé break; 1559a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_U_df: 1560a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1561a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1562a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_h(cpu_env, twd, tws, twt); 1563a2b0a27dSPhilippe Mathieu-Daudé break; 1564a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1565a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_w(cpu_env, twd, tws, twt); 1566a2b0a27dSPhilippe Mathieu-Daudé break; 1567a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1568a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_d(cpu_env, twd, tws, twt); 1569a2b0a27dSPhilippe Mathieu-Daudé break; 1570a2b0a27dSPhilippe Mathieu-Daudé } 1571a2b0a27dSPhilippe Mathieu-Daudé break; 1572a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_S_df: 1573a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1574a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1575a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_h(cpu_env, twd, tws, twt); 1576a2b0a27dSPhilippe Mathieu-Daudé break; 1577a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1578a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_w(cpu_env, twd, tws, twt); 1579a2b0a27dSPhilippe Mathieu-Daudé break; 1580a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1581a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_d(cpu_env, twd, tws, twt); 1582a2b0a27dSPhilippe Mathieu-Daudé break; 1583a2b0a27dSPhilippe Mathieu-Daudé } 1584a2b0a27dSPhilippe Mathieu-Daudé break; 1585a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_U_df: 1586a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1587a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1588a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_h(cpu_env, twd, tws, twt); 1589a2b0a27dSPhilippe Mathieu-Daudé break; 1590a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1591a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_w(cpu_env, twd, tws, twt); 1592a2b0a27dSPhilippe Mathieu-Daudé break; 1593a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1594a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_d(cpu_env, twd, tws, twt); 1595a2b0a27dSPhilippe Mathieu-Daudé break; 1596a2b0a27dSPhilippe Mathieu-Daudé } 1597a2b0a27dSPhilippe Mathieu-Daudé break; 1598a2b0a27dSPhilippe Mathieu-Daudé } 1599a2b0a27dSPhilippe Mathieu-Daudé break; 1600a2b0a27dSPhilippe Mathieu-Daudé default: 1601a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1602a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1603a2b0a27dSPhilippe Mathieu-Daudé break; 1604a2b0a27dSPhilippe Mathieu-Daudé } 1605a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1606a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1607a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1608a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 1609a2b0a27dSPhilippe Mathieu-Daudé } 1610a2b0a27dSPhilippe Mathieu-Daudé 1611a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm_3e(DisasContext *ctx) 1612a2b0a27dSPhilippe Mathieu-Daudé { 1613a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_ELM_DF3E(op) (MASK_MSA_MINOR(op) | (op & (0x3FF << 16))) 1614a2b0a27dSPhilippe Mathieu-Daudé uint8_t source = (ctx->opcode >> 11) & 0x1f; 1615a2b0a27dSPhilippe Mathieu-Daudé uint8_t dest = (ctx->opcode >> 6) & 0x1f; 1616a2b0a27dSPhilippe Mathieu-Daudé TCGv telm = tcg_temp_new(); 1617a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tsr = tcg_const_i32(source); 1618a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdt = tcg_const_i32(dest); 1619a2b0a27dSPhilippe Mathieu-Daudé 1620a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM_DF3E(ctx->opcode)) { 1621a2b0a27dSPhilippe Mathieu-Daudé case OPC_CTCMSA: 1622a2b0a27dSPhilippe Mathieu-Daudé gen_load_gpr(telm, source); 1623a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ctcmsa(cpu_env, telm, tdt); 1624a2b0a27dSPhilippe Mathieu-Daudé break; 1625a2b0a27dSPhilippe Mathieu-Daudé case OPC_CFCMSA: 1626a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cfcmsa(telm, cpu_env, tsr); 1627a2b0a27dSPhilippe Mathieu-Daudé gen_store_gpr(telm, dest); 1628a2b0a27dSPhilippe Mathieu-Daudé break; 1629a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOVE_V: 1630a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_move_v(cpu_env, tdt, tsr); 1631a2b0a27dSPhilippe Mathieu-Daudé break; 1632a2b0a27dSPhilippe Mathieu-Daudé default: 1633a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1634a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1635a2b0a27dSPhilippe Mathieu-Daudé break; 1636a2b0a27dSPhilippe Mathieu-Daudé } 1637a2b0a27dSPhilippe Mathieu-Daudé 1638a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free(telm); 1639a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdt); 1640a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tsr); 1641a2b0a27dSPhilippe Mathieu-Daudé } 1642a2b0a27dSPhilippe Mathieu-Daudé 1643a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm_df(DisasContext *ctx, uint32_t df, uint32_t n) 1644a2b0a27dSPhilippe Mathieu-Daudé { 1645a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_ELM(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) 1646a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1647a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1648a2b0a27dSPhilippe Mathieu-Daudé 1649a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1650a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1651a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tn = tcg_const_i32(n); 16522b537a3dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_constant_i32(df); 1653a2b0a27dSPhilippe Mathieu-Daudé 1654a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM(ctx->opcode)) { 1655a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLDI_df: 1656a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sldi_df(cpu_env, tdf, twd, tws, tn); 1657a2b0a27dSPhilippe Mathieu-Daudé break; 1658a2b0a27dSPhilippe Mathieu-Daudé case OPC_SPLATI_df: 1659a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_splati_df(cpu_env, tdf, twd, tws, tn); 1660a2b0a27dSPhilippe Mathieu-Daudé break; 1661a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSVE_df: 1662a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insve_df(cpu_env, tdf, twd, tws, tn); 1663a2b0a27dSPhilippe Mathieu-Daudé break; 1664a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_S_df: 1665a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_U_df: 1666a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSERT_df: 1667a2b0a27dSPhilippe Mathieu-Daudé #if !defined(TARGET_MIPS64) 1668a2b0a27dSPhilippe Mathieu-Daudé /* Double format valid only for MIPS64 */ 1669a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 1670a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1671a2b0a27dSPhilippe Mathieu-Daudé break; 1672a2b0a27dSPhilippe Mathieu-Daudé } 1673a2b0a27dSPhilippe Mathieu-Daudé if ((MASK_MSA_ELM(ctx->opcode) == OPC_COPY_U_df) && 1674a2b0a27dSPhilippe Mathieu-Daudé (df == DF_WORD)) { 1675a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1676a2b0a27dSPhilippe Mathieu-Daudé break; 1677a2b0a27dSPhilippe Mathieu-Daudé } 1678a2b0a27dSPhilippe Mathieu-Daudé #endif 1679a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM(ctx->opcode)) { 1680a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_S_df: 1681a2b0a27dSPhilippe Mathieu-Daudé if (likely(wd != 0)) { 1682a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1683a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1684a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_b(cpu_env, twd, tws, tn); 1685a2b0a27dSPhilippe Mathieu-Daudé break; 1686a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1687a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_h(cpu_env, twd, tws, tn); 1688a2b0a27dSPhilippe Mathieu-Daudé break; 1689a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1690a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_w(cpu_env, twd, tws, tn); 1691a2b0a27dSPhilippe Mathieu-Daudé break; 1692a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1693a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1694a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_d(cpu_env, twd, tws, tn); 1695a2b0a27dSPhilippe Mathieu-Daudé break; 1696a2b0a27dSPhilippe Mathieu-Daudé #endif 1697a2b0a27dSPhilippe Mathieu-Daudé default: 1698a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1699a2b0a27dSPhilippe Mathieu-Daudé } 1700a2b0a27dSPhilippe Mathieu-Daudé } 1701a2b0a27dSPhilippe Mathieu-Daudé break; 1702a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_U_df: 1703a2b0a27dSPhilippe Mathieu-Daudé if (likely(wd != 0)) { 1704a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1705a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1706a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_b(cpu_env, twd, tws, tn); 1707a2b0a27dSPhilippe Mathieu-Daudé break; 1708a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1709a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_h(cpu_env, twd, tws, tn); 1710a2b0a27dSPhilippe Mathieu-Daudé break; 1711a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1712a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1713a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_w(cpu_env, twd, tws, tn); 1714a2b0a27dSPhilippe Mathieu-Daudé break; 1715a2b0a27dSPhilippe Mathieu-Daudé #endif 1716a2b0a27dSPhilippe Mathieu-Daudé default: 1717a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1718a2b0a27dSPhilippe Mathieu-Daudé } 1719a2b0a27dSPhilippe Mathieu-Daudé } 1720a2b0a27dSPhilippe Mathieu-Daudé break; 1721a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSERT_df: 1722a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1723a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1724a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_b(cpu_env, twd, tws, tn); 1725a2b0a27dSPhilippe Mathieu-Daudé break; 1726a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1727a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_h(cpu_env, twd, tws, tn); 1728a2b0a27dSPhilippe Mathieu-Daudé break; 1729a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1730a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_w(cpu_env, twd, tws, tn); 1731a2b0a27dSPhilippe Mathieu-Daudé break; 1732a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1733a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1734a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_d(cpu_env, twd, tws, tn); 1735a2b0a27dSPhilippe Mathieu-Daudé break; 1736a2b0a27dSPhilippe Mathieu-Daudé #endif 1737a2b0a27dSPhilippe Mathieu-Daudé default: 1738a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1739a2b0a27dSPhilippe Mathieu-Daudé } 1740a2b0a27dSPhilippe Mathieu-Daudé break; 1741a2b0a27dSPhilippe Mathieu-Daudé } 1742a2b0a27dSPhilippe Mathieu-Daudé break; 1743a2b0a27dSPhilippe Mathieu-Daudé default: 1744a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1745a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1746a2b0a27dSPhilippe Mathieu-Daudé } 1747a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1748a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1749a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tn); 1750a2b0a27dSPhilippe Mathieu-Daudé } 1751a2b0a27dSPhilippe Mathieu-Daudé 1752a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm(DisasContext *ctx) 1753a2b0a27dSPhilippe Mathieu-Daudé { 1754a2b0a27dSPhilippe Mathieu-Daudé uint8_t dfn = (ctx->opcode >> 16) & 0x3f; 1755a2b0a27dSPhilippe Mathieu-Daudé uint32_t df = 0, n = 0; 1756a2b0a27dSPhilippe Mathieu-Daudé 1757a2b0a27dSPhilippe Mathieu-Daudé if ((dfn & 0x30) == 0x00) { 1758a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x0f; 1759a2b0a27dSPhilippe Mathieu-Daudé df = DF_BYTE; 1760a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x38) == 0x20) { 1761a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x07; 1762a2b0a27dSPhilippe Mathieu-Daudé df = DF_HALF; 1763a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x3c) == 0x30) { 1764a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x03; 1765a2b0a27dSPhilippe Mathieu-Daudé df = DF_WORD; 1766a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x3e) == 0x38) { 1767a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x01; 1768a2b0a27dSPhilippe Mathieu-Daudé df = DF_DOUBLE; 1769a2b0a27dSPhilippe Mathieu-Daudé } else if (dfn == 0x3E) { 1770a2b0a27dSPhilippe Mathieu-Daudé /* CTCMSA, CFCMSA, MOVE.V */ 1771a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm_3e(ctx); 1772a2b0a27dSPhilippe Mathieu-Daudé return; 1773a2b0a27dSPhilippe Mathieu-Daudé } else { 1774a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1775a2b0a27dSPhilippe Mathieu-Daudé return; 1776a2b0a27dSPhilippe Mathieu-Daudé } 1777a2b0a27dSPhilippe Mathieu-Daudé 1778a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm_df(ctx, df, n); 1779a2b0a27dSPhilippe Mathieu-Daudé } 1780a2b0a27dSPhilippe Mathieu-Daudé 1781a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_3rf(DisasContext *ctx) 1782a2b0a27dSPhilippe Mathieu-Daudé { 1783a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_3RF(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) 1784a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 21) & 0x1; 1785a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 1786a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1787a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1788a2b0a27dSPhilippe Mathieu-Daudé 1789a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1790a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1791a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 17921b5c0a11SPhilippe Mathieu-Daudé TCGv_i32 tdf; 1793a2b0a27dSPhilippe Mathieu-Daudé 1794a2b0a27dSPhilippe Mathieu-Daudé /* adjust df value for floating-point instruction */ 17951b5c0a11SPhilippe Mathieu-Daudé switch (MASK_MSA_3RF(ctx->opcode)) { 17961b5c0a11SPhilippe Mathieu-Daudé case OPC_MUL_Q_df: 17971b5c0a11SPhilippe Mathieu-Daudé case OPC_MADD_Q_df: 17981b5c0a11SPhilippe Mathieu-Daudé case OPC_MSUB_Q_df: 17991b5c0a11SPhilippe Mathieu-Daudé case OPC_MULR_Q_df: 18001b5c0a11SPhilippe Mathieu-Daudé case OPC_MADDR_Q_df: 18011b5c0a11SPhilippe Mathieu-Daudé case OPC_MSUBR_Q_df: 18021b5c0a11SPhilippe Mathieu-Daudé tdf = tcg_constant_i32(df + 1); 18031b5c0a11SPhilippe Mathieu-Daudé break; 18041b5c0a11SPhilippe Mathieu-Daudé default: 18051b5c0a11SPhilippe Mathieu-Daudé tdf = tcg_constant_i32(df + 2); 18061b5c0a11SPhilippe Mathieu-Daudé break; 18071b5c0a11SPhilippe Mathieu-Daudé } 1808a2b0a27dSPhilippe Mathieu-Daudé 1809a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3RF(ctx->opcode)) { 1810a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCAF_df: 1811a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcaf_df(cpu_env, tdf, twd, tws, twt); 1812a2b0a27dSPhilippe Mathieu-Daudé break; 1813a2b0a27dSPhilippe Mathieu-Daudé case OPC_FADD_df: 1814a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fadd_df(cpu_env, tdf, twd, tws, twt); 1815a2b0a27dSPhilippe Mathieu-Daudé break; 1816a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUN_df: 1817a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcun_df(cpu_env, tdf, twd, tws, twt); 1818a2b0a27dSPhilippe Mathieu-Daudé break; 1819a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUB_df: 1820a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsub_df(cpu_env, tdf, twd, tws, twt); 1821a2b0a27dSPhilippe Mathieu-Daudé break; 1822a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCOR_df: 1823a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcor_df(cpu_env, tdf, twd, tws, twt); 1824a2b0a27dSPhilippe Mathieu-Daudé break; 1825a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCEQ_df: 1826a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fceq_df(cpu_env, tdf, twd, tws, twt); 1827a2b0a27dSPhilippe Mathieu-Daudé break; 1828a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMUL_df: 1829a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmul_df(cpu_env, tdf, twd, tws, twt); 1830a2b0a27dSPhilippe Mathieu-Daudé break; 1831a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUNE_df: 1832a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcune_df(cpu_env, tdf, twd, tws, twt); 1833a2b0a27dSPhilippe Mathieu-Daudé break; 1834a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUEQ_df: 1835a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcueq_df(cpu_env, tdf, twd, tws, twt); 1836a2b0a27dSPhilippe Mathieu-Daudé break; 1837a2b0a27dSPhilippe Mathieu-Daudé case OPC_FDIV_df: 1838a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fdiv_df(cpu_env, tdf, twd, tws, twt); 1839a2b0a27dSPhilippe Mathieu-Daudé break; 1840a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCNE_df: 1841a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcne_df(cpu_env, tdf, twd, tws, twt); 1842a2b0a27dSPhilippe Mathieu-Daudé break; 1843a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLT_df: 1844a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fclt_df(cpu_env, tdf, twd, tws, twt); 1845a2b0a27dSPhilippe Mathieu-Daudé break; 1846a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMADD_df: 1847a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmadd_df(cpu_env, tdf, twd, tws, twt); 1848a2b0a27dSPhilippe Mathieu-Daudé break; 1849a2b0a27dSPhilippe Mathieu-Daudé case OPC_MUL_Q_df: 1850a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mul_q_df(cpu_env, tdf, twd, tws, twt); 1851a2b0a27dSPhilippe Mathieu-Daudé break; 1852a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCULT_df: 1853a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcult_df(cpu_env, tdf, twd, tws, twt); 1854a2b0a27dSPhilippe Mathieu-Daudé break; 1855a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMSUB_df: 1856a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmsub_df(cpu_env, tdf, twd, tws, twt); 1857a2b0a27dSPhilippe Mathieu-Daudé break; 1858a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADD_Q_df: 1859a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_madd_q_df(cpu_env, tdf, twd, tws, twt); 1860a2b0a27dSPhilippe Mathieu-Daudé break; 1861a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLE_df: 1862a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcle_df(cpu_env, tdf, twd, tws, twt); 1863a2b0a27dSPhilippe Mathieu-Daudé break; 1864a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUB_Q_df: 1865a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msub_q_df(cpu_env, tdf, twd, tws, twt); 1866a2b0a27dSPhilippe Mathieu-Daudé break; 1867a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCULE_df: 1868a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcule_df(cpu_env, tdf, twd, tws, twt); 1869a2b0a27dSPhilippe Mathieu-Daudé break; 1870a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXP2_df: 1871a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexp2_df(cpu_env, tdf, twd, tws, twt); 1872a2b0a27dSPhilippe Mathieu-Daudé break; 1873a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSAF_df: 1874a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsaf_df(cpu_env, tdf, twd, tws, twt); 1875a2b0a27dSPhilippe Mathieu-Daudé break; 1876a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXDO_df: 1877a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexdo_df(cpu_env, tdf, twd, tws, twt); 1878a2b0a27dSPhilippe Mathieu-Daudé break; 1879a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUN_df: 1880a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsun_df(cpu_env, tdf, twd, tws, twt); 1881a2b0a27dSPhilippe Mathieu-Daudé break; 1882a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSOR_df: 1883a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsor_df(cpu_env, tdf, twd, tws, twt); 1884a2b0a27dSPhilippe Mathieu-Daudé break; 1885a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSEQ_df: 1886a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fseq_df(cpu_env, tdf, twd, tws, twt); 1887a2b0a27dSPhilippe Mathieu-Daudé break; 1888a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTQ_df: 1889a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftq_df(cpu_env, tdf, twd, tws, twt); 1890a2b0a27dSPhilippe Mathieu-Daudé break; 1891a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUNE_df: 1892a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsune_df(cpu_env, tdf, twd, tws, twt); 1893a2b0a27dSPhilippe Mathieu-Daudé break; 1894a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUEQ_df: 1895a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsueq_df(cpu_env, tdf, twd, tws, twt); 1896a2b0a27dSPhilippe Mathieu-Daudé break; 1897a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSNE_df: 1898a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsne_df(cpu_env, tdf, twd, tws, twt); 1899a2b0a27dSPhilippe Mathieu-Daudé break; 1900a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSLT_df: 1901a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fslt_df(cpu_env, tdf, twd, tws, twt); 1902a2b0a27dSPhilippe Mathieu-Daudé break; 1903a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMIN_df: 1904a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmin_df(cpu_env, tdf, twd, tws, twt); 1905a2b0a27dSPhilippe Mathieu-Daudé break; 1906a2b0a27dSPhilippe Mathieu-Daudé case OPC_MULR_Q_df: 1907a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulr_q_df(cpu_env, tdf, twd, tws, twt); 1908a2b0a27dSPhilippe Mathieu-Daudé break; 1909a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSULT_df: 1910a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsult_df(cpu_env, tdf, twd, tws, twt); 1911a2b0a27dSPhilippe Mathieu-Daudé break; 1912a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMIN_A_df: 1913a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmin_a_df(cpu_env, tdf, twd, tws, twt); 1914a2b0a27dSPhilippe Mathieu-Daudé break; 1915a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADDR_Q_df: 1916a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddr_q_df(cpu_env, tdf, twd, tws, twt); 1917a2b0a27dSPhilippe Mathieu-Daudé break; 1918a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSLE_df: 1919a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsle_df(cpu_env, tdf, twd, tws, twt); 1920a2b0a27dSPhilippe Mathieu-Daudé break; 1921a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMAX_df: 1922a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmax_df(cpu_env, tdf, twd, tws, twt); 1923a2b0a27dSPhilippe Mathieu-Daudé break; 1924a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUBR_Q_df: 1925a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubr_q_df(cpu_env, tdf, twd, tws, twt); 1926a2b0a27dSPhilippe Mathieu-Daudé break; 1927a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSULE_df: 1928a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsule_df(cpu_env, tdf, twd, tws, twt); 1929a2b0a27dSPhilippe Mathieu-Daudé break; 1930a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMAX_A_df: 1931a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmax_a_df(cpu_env, tdf, twd, tws, twt); 1932a2b0a27dSPhilippe Mathieu-Daudé break; 1933a2b0a27dSPhilippe Mathieu-Daudé default: 1934a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1935a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1936a2b0a27dSPhilippe Mathieu-Daudé break; 1937a2b0a27dSPhilippe Mathieu-Daudé } 1938a2b0a27dSPhilippe Mathieu-Daudé 1939a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1940a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1941a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1942a2b0a27dSPhilippe Mathieu-Daudé } 1943a2b0a27dSPhilippe Mathieu-Daudé 1944a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_2r(DisasContext *ctx) 1945a2b0a27dSPhilippe Mathieu-Daudé { 1946a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_2R(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ 1947a2b0a27dSPhilippe Mathieu-Daudé (op & (0x7 << 18))) 1948a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1949a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1950a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 16) & 0x3; 1951a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1952a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1953a2b0a27dSPhilippe Mathieu-Daudé 1954a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_2R(ctx->opcode)) { 1955a2b0a27dSPhilippe Mathieu-Daudé case OPC_FILL_df: 1956a2b0a27dSPhilippe Mathieu-Daudé #if !defined(TARGET_MIPS64) 1957a2b0a27dSPhilippe Mathieu-Daudé /* Double format valid only for MIPS64 */ 1958a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 1959a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1960a2b0a27dSPhilippe Mathieu-Daudé break; 1961a2b0a27dSPhilippe Mathieu-Daudé } 1962a2b0a27dSPhilippe Mathieu-Daudé #endif 196374341af7SPhilippe Mathieu-Daudé gen_helper_msa_fill_df(cpu_env, tcg_constant_i32(df), 196474341af7SPhilippe Mathieu-Daudé twd, tws); /* trs */ 1965a2b0a27dSPhilippe Mathieu-Daudé break; 1966a2b0a27dSPhilippe Mathieu-Daudé case OPC_NLOC_df: 1967a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1968a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1969a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_b(cpu_env, twd, tws); 1970a2b0a27dSPhilippe Mathieu-Daudé break; 1971a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1972a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_h(cpu_env, twd, tws); 1973a2b0a27dSPhilippe Mathieu-Daudé break; 1974a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1975a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_w(cpu_env, twd, tws); 1976a2b0a27dSPhilippe Mathieu-Daudé break; 1977a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1978a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_d(cpu_env, twd, tws); 1979a2b0a27dSPhilippe Mathieu-Daudé break; 1980a2b0a27dSPhilippe Mathieu-Daudé } 1981a2b0a27dSPhilippe Mathieu-Daudé break; 1982a2b0a27dSPhilippe Mathieu-Daudé case OPC_NLZC_df: 1983a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1984a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1985a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_b(cpu_env, twd, tws); 1986a2b0a27dSPhilippe Mathieu-Daudé break; 1987a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1988a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_h(cpu_env, twd, tws); 1989a2b0a27dSPhilippe Mathieu-Daudé break; 1990a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1991a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_w(cpu_env, twd, tws); 1992a2b0a27dSPhilippe Mathieu-Daudé break; 1993a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1994a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_d(cpu_env, twd, tws); 1995a2b0a27dSPhilippe Mathieu-Daudé break; 1996a2b0a27dSPhilippe Mathieu-Daudé } 1997a2b0a27dSPhilippe Mathieu-Daudé break; 1998a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCNT_df: 1999a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 2000a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 2001a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_b(cpu_env, twd, tws); 2002a2b0a27dSPhilippe Mathieu-Daudé break; 2003a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 2004a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_h(cpu_env, twd, tws); 2005a2b0a27dSPhilippe Mathieu-Daudé break; 2006a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 2007a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_w(cpu_env, twd, tws); 2008a2b0a27dSPhilippe Mathieu-Daudé break; 2009a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 2010a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_d(cpu_env, twd, tws); 2011a2b0a27dSPhilippe Mathieu-Daudé break; 2012a2b0a27dSPhilippe Mathieu-Daudé } 2013a2b0a27dSPhilippe Mathieu-Daudé break; 2014a2b0a27dSPhilippe Mathieu-Daudé default: 2015a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2016a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2017a2b0a27dSPhilippe Mathieu-Daudé break; 2018a2b0a27dSPhilippe Mathieu-Daudé } 2019a2b0a27dSPhilippe Mathieu-Daudé 2020a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2021a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 2022a2b0a27dSPhilippe Mathieu-Daudé } 2023a2b0a27dSPhilippe Mathieu-Daudé 2024a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_2rf(DisasContext *ctx) 2025a2b0a27dSPhilippe Mathieu-Daudé { 2026a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_2RF(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ 2027a2b0a27dSPhilippe Mathieu-Daudé (op & (0xf << 17))) 2028a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 2029a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 2030a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 16) & 0x1; 2031a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 2032a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 2033a2b0a27dSPhilippe Mathieu-Daudé /* adjust df value for floating-point instruction */ 2034e81a48b9SPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_constant_i32(df + 2); 2035a2b0a27dSPhilippe Mathieu-Daudé 2036a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_2RF(ctx->opcode)) { 2037a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLASS_df: 2038a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fclass_df(cpu_env, tdf, twd, tws); 2039a2b0a27dSPhilippe Mathieu-Daudé break; 2040a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTRUNC_S_df: 2041a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftrunc_s_df(cpu_env, tdf, twd, tws); 2042a2b0a27dSPhilippe Mathieu-Daudé break; 2043a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTRUNC_U_df: 2044a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftrunc_u_df(cpu_env, tdf, twd, tws); 2045a2b0a27dSPhilippe Mathieu-Daudé break; 2046a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSQRT_df: 2047a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsqrt_df(cpu_env, tdf, twd, tws); 2048a2b0a27dSPhilippe Mathieu-Daudé break; 2049a2b0a27dSPhilippe Mathieu-Daudé case OPC_FRSQRT_df: 2050a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_frsqrt_df(cpu_env, tdf, twd, tws); 2051a2b0a27dSPhilippe Mathieu-Daudé break; 2052a2b0a27dSPhilippe Mathieu-Daudé case OPC_FRCP_df: 2053a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_frcp_df(cpu_env, tdf, twd, tws); 2054a2b0a27dSPhilippe Mathieu-Daudé break; 2055a2b0a27dSPhilippe Mathieu-Daudé case OPC_FRINT_df: 2056a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_frint_df(cpu_env, tdf, twd, tws); 2057a2b0a27dSPhilippe Mathieu-Daudé break; 2058a2b0a27dSPhilippe Mathieu-Daudé case OPC_FLOG2_df: 2059a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_flog2_df(cpu_env, tdf, twd, tws); 2060a2b0a27dSPhilippe Mathieu-Daudé break; 2061a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXUPL_df: 2062a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexupl_df(cpu_env, tdf, twd, tws); 2063a2b0a27dSPhilippe Mathieu-Daudé break; 2064a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXUPR_df: 2065a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexupr_df(cpu_env, tdf, twd, tws); 2066a2b0a27dSPhilippe Mathieu-Daudé break; 2067a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFQL_df: 2068a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffql_df(cpu_env, tdf, twd, tws); 2069a2b0a27dSPhilippe Mathieu-Daudé break; 2070a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFQR_df: 2071a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffqr_df(cpu_env, tdf, twd, tws); 2072a2b0a27dSPhilippe Mathieu-Daudé break; 2073a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTINT_S_df: 2074a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftint_s_df(cpu_env, tdf, twd, tws); 2075a2b0a27dSPhilippe Mathieu-Daudé break; 2076a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTINT_U_df: 2077a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftint_u_df(cpu_env, tdf, twd, tws); 2078a2b0a27dSPhilippe Mathieu-Daudé break; 2079a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFINT_S_df: 2080a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffint_s_df(cpu_env, tdf, twd, tws); 2081a2b0a27dSPhilippe Mathieu-Daudé break; 2082a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFINT_U_df: 2083a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffint_u_df(cpu_env, tdf, twd, tws); 2084a2b0a27dSPhilippe Mathieu-Daudé break; 2085a2b0a27dSPhilippe Mathieu-Daudé } 2086a2b0a27dSPhilippe Mathieu-Daudé 2087a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2088a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 2089a2b0a27dSPhilippe Mathieu-Daudé } 2090a2b0a27dSPhilippe Mathieu-Daudé 2091a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_vec_v(DisasContext *ctx) 2092a2b0a27dSPhilippe Mathieu-Daudé { 2093a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) 2094a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 2095a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 2096a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 2097a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 2098a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 2099a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 2100a2b0a27dSPhilippe Mathieu-Daudé 2101a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_VEC(ctx->opcode)) { 2102a2b0a27dSPhilippe Mathieu-Daudé case OPC_AND_V: 2103a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_and_v(cpu_env, twd, tws, twt); 2104a2b0a27dSPhilippe Mathieu-Daudé break; 2105a2b0a27dSPhilippe Mathieu-Daudé case OPC_OR_V: 2106a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_or_v(cpu_env, twd, tws, twt); 2107a2b0a27dSPhilippe Mathieu-Daudé break; 2108a2b0a27dSPhilippe Mathieu-Daudé case OPC_NOR_V: 2109a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nor_v(cpu_env, twd, tws, twt); 2110a2b0a27dSPhilippe Mathieu-Daudé break; 2111a2b0a27dSPhilippe Mathieu-Daudé case OPC_XOR_V: 2112a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_xor_v(cpu_env, twd, tws, twt); 2113a2b0a27dSPhilippe Mathieu-Daudé break; 2114a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZ_V: 2115a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmnz_v(cpu_env, twd, tws, twt); 2116a2b0a27dSPhilippe Mathieu-Daudé break; 2117a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZ_V: 2118a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmz_v(cpu_env, twd, tws, twt); 2119a2b0a27dSPhilippe Mathieu-Daudé break; 2120a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSEL_V: 2121a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bsel_v(cpu_env, twd, tws, twt); 2122a2b0a27dSPhilippe Mathieu-Daudé break; 2123a2b0a27dSPhilippe Mathieu-Daudé default: 2124a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2125a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2126a2b0a27dSPhilippe Mathieu-Daudé break; 2127a2b0a27dSPhilippe Mathieu-Daudé } 2128a2b0a27dSPhilippe Mathieu-Daudé 2129a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2130a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 2131a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 2132a2b0a27dSPhilippe Mathieu-Daudé } 2133a2b0a27dSPhilippe Mathieu-Daudé 2134a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_vec(DisasContext *ctx) 2135a2b0a27dSPhilippe Mathieu-Daudé { 2136a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_VEC(ctx->opcode)) { 2137a2b0a27dSPhilippe Mathieu-Daudé case OPC_AND_V: 2138a2b0a27dSPhilippe Mathieu-Daudé case OPC_OR_V: 2139a2b0a27dSPhilippe Mathieu-Daudé case OPC_NOR_V: 2140a2b0a27dSPhilippe Mathieu-Daudé case OPC_XOR_V: 2141a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZ_V: 2142a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZ_V: 2143a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSEL_V: 2144a2b0a27dSPhilippe Mathieu-Daudé gen_msa_vec_v(ctx); 2145a2b0a27dSPhilippe Mathieu-Daudé break; 2146a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_2R: 2147a2b0a27dSPhilippe Mathieu-Daudé gen_msa_2r(ctx); 2148a2b0a27dSPhilippe Mathieu-Daudé break; 2149a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_2RF: 2150a2b0a27dSPhilippe Mathieu-Daudé gen_msa_2rf(ctx); 2151a2b0a27dSPhilippe Mathieu-Daudé break; 2152a2b0a27dSPhilippe Mathieu-Daudé default: 2153a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2154a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2155a2b0a27dSPhilippe Mathieu-Daudé break; 2156a2b0a27dSPhilippe Mathieu-Daudé } 2157a2b0a27dSPhilippe Mathieu-Daudé } 2158a2b0a27dSPhilippe Mathieu-Daudé 2159525ea877SPhilippe Mathieu-Daudé static bool trans_MSA(DisasContext *ctx, arg_MSA *a) 2160a2b0a27dSPhilippe Mathieu-Daudé { 2161a2b0a27dSPhilippe Mathieu-Daudé uint32_t opcode = ctx->opcode; 2162a2b0a27dSPhilippe Mathieu-Daudé 2163a2b0a27dSPhilippe Mathieu-Daudé check_msa_access(ctx); 2164a2b0a27dSPhilippe Mathieu-Daudé 2165a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_MINOR(opcode)) { 2166a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I8_00: 2167a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I8_01: 2168a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I8_02: 2169a2b0a27dSPhilippe Mathieu-Daudé gen_msa_i8(ctx); 2170a2b0a27dSPhilippe Mathieu-Daudé break; 2171a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I5_06: 2172a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I5_07: 2173a2b0a27dSPhilippe Mathieu-Daudé gen_msa_i5(ctx); 2174a2b0a27dSPhilippe Mathieu-Daudé break; 2175a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_BIT_09: 2176a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_BIT_0A: 2177a2b0a27dSPhilippe Mathieu-Daudé gen_msa_bit(ctx); 2178a2b0a27dSPhilippe Mathieu-Daudé break; 2179a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0D: 2180a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0E: 2181a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0F: 2182a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_10: 2183a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_11: 2184a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_12: 2185a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_13: 2186a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_14: 2187a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_15: 2188a2b0a27dSPhilippe Mathieu-Daudé gen_msa_3r(ctx); 2189a2b0a27dSPhilippe Mathieu-Daudé break; 2190a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_ELM: 2191a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm(ctx); 2192a2b0a27dSPhilippe Mathieu-Daudé break; 2193a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1A: 2194a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1B: 2195a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1C: 2196a2b0a27dSPhilippe Mathieu-Daudé gen_msa_3rf(ctx); 2197a2b0a27dSPhilippe Mathieu-Daudé break; 2198a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_VEC: 2199a2b0a27dSPhilippe Mathieu-Daudé gen_msa_vec(ctx); 2200a2b0a27dSPhilippe Mathieu-Daudé break; 2201a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_B: 2202a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_H: 2203a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_W: 2204a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_D: 2205a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_B: 2206a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_H: 2207a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_W: 2208a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_D: 2209a2b0a27dSPhilippe Mathieu-Daudé { 2210a2b0a27dSPhilippe Mathieu-Daudé int32_t s10 = sextract32(ctx->opcode, 16, 10); 2211a2b0a27dSPhilippe Mathieu-Daudé uint8_t rs = (ctx->opcode >> 11) & 0x1f; 2212a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 2213a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 0) & 0x3; 2214a2b0a27dSPhilippe Mathieu-Daudé 2215a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 2216a2b0a27dSPhilippe Mathieu-Daudé TCGv taddr = tcg_temp_new(); 2217a2b0a27dSPhilippe Mathieu-Daudé gen_base_offset_addr(ctx, taddr, rs, s10 << df); 2218a2b0a27dSPhilippe Mathieu-Daudé 2219a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_MINOR(opcode)) { 2220a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_B: 2221a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_b(cpu_env, twd, taddr); 2222a2b0a27dSPhilippe Mathieu-Daudé break; 2223a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_H: 2224a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_h(cpu_env, twd, taddr); 2225a2b0a27dSPhilippe Mathieu-Daudé break; 2226a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_W: 2227a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_w(cpu_env, twd, taddr); 2228a2b0a27dSPhilippe Mathieu-Daudé break; 2229a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_D: 2230a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_d(cpu_env, twd, taddr); 2231a2b0a27dSPhilippe Mathieu-Daudé break; 2232a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_B: 2233a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_b(cpu_env, twd, taddr); 2234a2b0a27dSPhilippe Mathieu-Daudé break; 2235a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_H: 2236a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_h(cpu_env, twd, taddr); 2237a2b0a27dSPhilippe Mathieu-Daudé break; 2238a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_W: 2239a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_w(cpu_env, twd, taddr); 2240a2b0a27dSPhilippe Mathieu-Daudé break; 2241a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_D: 2242a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_d(cpu_env, twd, taddr); 2243a2b0a27dSPhilippe Mathieu-Daudé break; 2244a2b0a27dSPhilippe Mathieu-Daudé } 2245a2b0a27dSPhilippe Mathieu-Daudé 2246a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2247a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free(taddr); 2248a2b0a27dSPhilippe Mathieu-Daudé } 2249a2b0a27dSPhilippe Mathieu-Daudé break; 2250a2b0a27dSPhilippe Mathieu-Daudé default: 2251a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2252a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2253a2b0a27dSPhilippe Mathieu-Daudé break; 2254a2b0a27dSPhilippe Mathieu-Daudé } 2255a2b0a27dSPhilippe Mathieu-Daudé 2256a2b0a27dSPhilippe Mathieu-Daudé return true; 2257a2b0a27dSPhilippe Mathieu-Daudé } 2258a2b0a27dSPhilippe Mathieu-Daudé 225934fe9fa3SPhilippe Mathieu-Daudé static bool trans_LSA(DisasContext *ctx, arg_r *a) 2260a2b0a27dSPhilippe Mathieu-Daudé { 2261a2b0a27dSPhilippe Mathieu-Daudé return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); 2262a2b0a27dSPhilippe Mathieu-Daudé } 2263a2b0a27dSPhilippe Mathieu-Daudé 226434fe9fa3SPhilippe Mathieu-Daudé static bool trans_DLSA(DisasContext *ctx, arg_r *a) 2265a2b0a27dSPhilippe Mathieu-Daudé { 2266f5c6ee0cSPhilippe Mathieu-Daudé if (TARGET_LONG_BITS != 64) { 2267f5c6ee0cSPhilippe Mathieu-Daudé return false; 2268f5c6ee0cSPhilippe Mathieu-Daudé } 2269a2b0a27dSPhilippe Mathieu-Daudé return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); 2270a2b0a27dSPhilippe Mathieu-Daudé } 2271