1a2b0a27dSPhilippe Mathieu-Daudé /* 2a2b0a27dSPhilippe Mathieu-Daudé * MIPS SIMD Architecture (MSA) translation routines 3a2b0a27dSPhilippe Mathieu-Daudé * 4a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2004-2005 Jocelyn Mayer 5a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2006 Marius Groeger (FPU operations) 6a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support) 7a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2009 CodeSourcery (MIPS16 and microMIPS support) 8a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2012 Jia Liu & Dongxue Zhang (MIPS ASE DSP support) 9a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2020 Philippe Mathieu-Daudé 10a2b0a27dSPhilippe Mathieu-Daudé * 11a2b0a27dSPhilippe Mathieu-Daudé * SPDX-License-Identifier: LGPL-2.1-or-later 12a2b0a27dSPhilippe Mathieu-Daudé */ 13a2b0a27dSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 14a2b0a27dSPhilippe Mathieu-Daudé #include "tcg/tcg-op.h" 15a2b0a27dSPhilippe Mathieu-Daudé #include "exec/helper-gen.h" 16a2b0a27dSPhilippe Mathieu-Daudé #include "translate.h" 17a2b0a27dSPhilippe Mathieu-Daudé #include "fpu_helper.h" 18a2b0a27dSPhilippe Mathieu-Daudé #include "internal.h" 19a2b0a27dSPhilippe Mathieu-Daudé 20a2b0a27dSPhilippe Mathieu-Daudé /* Include the auto-generated decoder. */ 21f5c6ee0cSPhilippe Mathieu-Daudé #include "decode-msa.c.inc" 22a2b0a27dSPhilippe Mathieu-Daudé 23a2b0a27dSPhilippe Mathieu-Daudé #define OPC_MSA (0x1E << 26) 24a2b0a27dSPhilippe Mathieu-Daudé 25a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_MINOR(op) (MASK_OP_MAJOR(op) | (op & 0x3F)) 26a2b0a27dSPhilippe Mathieu-Daudé enum { 27a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I8_00 = 0x00 | OPC_MSA, 28a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I8_01 = 0x01 | OPC_MSA, 29a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I8_02 = 0x02 | OPC_MSA, 30a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I5_06 = 0x06 | OPC_MSA, 31a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_I5_07 = 0x07 | OPC_MSA, 32a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_BIT_09 = 0x09 | OPC_MSA, 33a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_BIT_0A = 0x0A | OPC_MSA, 34a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0D = 0x0D | OPC_MSA, 35a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0E = 0x0E | OPC_MSA, 36a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0F = 0x0F | OPC_MSA, 37a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_10 = 0x10 | OPC_MSA, 38a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_11 = 0x11 | OPC_MSA, 39a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_12 = 0x12 | OPC_MSA, 40a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_13 = 0x13 | OPC_MSA, 41a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_14 = 0x14 | OPC_MSA, 42a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_15 = 0x15 | OPC_MSA, 43a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_ELM = 0x19 | OPC_MSA, 44a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1A = 0x1A | OPC_MSA, 45a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1B = 0x1B | OPC_MSA, 46a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1C = 0x1C | OPC_MSA, 47a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_VEC = 0x1E | OPC_MSA, 48a2b0a27dSPhilippe Mathieu-Daudé 49a2b0a27dSPhilippe Mathieu-Daudé /* MI10 instruction */ 50a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_B = (0x20) | OPC_MSA, 51a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_H = (0x21) | OPC_MSA, 52a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_W = (0x22) | OPC_MSA, 53a2b0a27dSPhilippe Mathieu-Daudé OPC_LD_D = (0x23) | OPC_MSA, 54a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_B = (0x24) | OPC_MSA, 55a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_H = (0x25) | OPC_MSA, 56a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_W = (0x26) | OPC_MSA, 57a2b0a27dSPhilippe Mathieu-Daudé OPC_ST_D = (0x27) | OPC_MSA, 58a2b0a27dSPhilippe Mathieu-Daudé }; 59a2b0a27dSPhilippe Mathieu-Daudé 60a2b0a27dSPhilippe Mathieu-Daudé enum { 61a2b0a27dSPhilippe Mathieu-Daudé /* I5 instruction df(bits 22..21) = _b, _h, _w, _d */ 62a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDVI_df = (0x0 << 23) | OPC_MSA_I5_06, 63a2b0a27dSPhilippe Mathieu-Daudé OPC_CEQI_df = (0x0 << 23) | OPC_MSA_I5_07, 64a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBVI_df = (0x1 << 23) | OPC_MSA_I5_06, 65a2b0a27dSPhilippe Mathieu-Daudé OPC_MAXI_S_df = (0x2 << 23) | OPC_MSA_I5_06, 66a2b0a27dSPhilippe Mathieu-Daudé OPC_CLTI_S_df = (0x2 << 23) | OPC_MSA_I5_07, 67a2b0a27dSPhilippe Mathieu-Daudé OPC_MAXI_U_df = (0x3 << 23) | OPC_MSA_I5_06, 68a2b0a27dSPhilippe Mathieu-Daudé OPC_CLTI_U_df = (0x3 << 23) | OPC_MSA_I5_07, 69a2b0a27dSPhilippe Mathieu-Daudé OPC_MINI_S_df = (0x4 << 23) | OPC_MSA_I5_06, 70a2b0a27dSPhilippe Mathieu-Daudé OPC_CLEI_S_df = (0x4 << 23) | OPC_MSA_I5_07, 71a2b0a27dSPhilippe Mathieu-Daudé OPC_MINI_U_df = (0x5 << 23) | OPC_MSA_I5_06, 72a2b0a27dSPhilippe Mathieu-Daudé OPC_CLEI_U_df = (0x5 << 23) | OPC_MSA_I5_07, 73a2b0a27dSPhilippe Mathieu-Daudé 74a2b0a27dSPhilippe Mathieu-Daudé /* I8 instruction */ 75a2b0a27dSPhilippe Mathieu-Daudé OPC_ANDI_B = (0x0 << 24) | OPC_MSA_I8_00, 76a2b0a27dSPhilippe Mathieu-Daudé OPC_BMNZI_B = (0x0 << 24) | OPC_MSA_I8_01, 77a2b0a27dSPhilippe Mathieu-Daudé OPC_SHF_B = (0x0 << 24) | OPC_MSA_I8_02, 78a2b0a27dSPhilippe Mathieu-Daudé OPC_ORI_B = (0x1 << 24) | OPC_MSA_I8_00, 79a2b0a27dSPhilippe Mathieu-Daudé OPC_BMZI_B = (0x1 << 24) | OPC_MSA_I8_01, 80a2b0a27dSPhilippe Mathieu-Daudé OPC_SHF_H = (0x1 << 24) | OPC_MSA_I8_02, 81a2b0a27dSPhilippe Mathieu-Daudé OPC_NORI_B = (0x2 << 24) | OPC_MSA_I8_00, 82a2b0a27dSPhilippe Mathieu-Daudé OPC_BSELI_B = (0x2 << 24) | OPC_MSA_I8_01, 83a2b0a27dSPhilippe Mathieu-Daudé OPC_SHF_W = (0x2 << 24) | OPC_MSA_I8_02, 84a2b0a27dSPhilippe Mathieu-Daudé OPC_XORI_B = (0x3 << 24) | OPC_MSA_I8_00, 85a2b0a27dSPhilippe Mathieu-Daudé 86a2b0a27dSPhilippe Mathieu-Daudé /* VEC/2R/2RF instruction */ 87a2b0a27dSPhilippe Mathieu-Daudé OPC_AND_V = (0x00 << 21) | OPC_MSA_VEC, 88a2b0a27dSPhilippe Mathieu-Daudé OPC_OR_V = (0x01 << 21) | OPC_MSA_VEC, 89a2b0a27dSPhilippe Mathieu-Daudé OPC_NOR_V = (0x02 << 21) | OPC_MSA_VEC, 90a2b0a27dSPhilippe Mathieu-Daudé OPC_XOR_V = (0x03 << 21) | OPC_MSA_VEC, 91a2b0a27dSPhilippe Mathieu-Daudé OPC_BMNZ_V = (0x04 << 21) | OPC_MSA_VEC, 92a2b0a27dSPhilippe Mathieu-Daudé OPC_BMZ_V = (0x05 << 21) | OPC_MSA_VEC, 93a2b0a27dSPhilippe Mathieu-Daudé OPC_BSEL_V = (0x06 << 21) | OPC_MSA_VEC, 94a2b0a27dSPhilippe Mathieu-Daudé 95a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_2R = (0x18 << 21) | OPC_MSA_VEC, 96a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_2RF = (0x19 << 21) | OPC_MSA_VEC, 97a2b0a27dSPhilippe Mathieu-Daudé 98a2b0a27dSPhilippe Mathieu-Daudé /* 2R instruction df(bits 17..16) = _b, _h, _w, _d */ 99a2b0a27dSPhilippe Mathieu-Daudé OPC_FILL_df = (0x00 << 18) | OPC_MSA_2R, 100a2b0a27dSPhilippe Mathieu-Daudé OPC_PCNT_df = (0x01 << 18) | OPC_MSA_2R, 101a2b0a27dSPhilippe Mathieu-Daudé OPC_NLOC_df = (0x02 << 18) | OPC_MSA_2R, 102a2b0a27dSPhilippe Mathieu-Daudé OPC_NLZC_df = (0x03 << 18) | OPC_MSA_2R, 103a2b0a27dSPhilippe Mathieu-Daudé 104a2b0a27dSPhilippe Mathieu-Daudé /* 2RF instruction df(bit 16) = _w, _d */ 105a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLASS_df = (0x00 << 17) | OPC_MSA_2RF, 106a2b0a27dSPhilippe Mathieu-Daudé OPC_FTRUNC_S_df = (0x01 << 17) | OPC_MSA_2RF, 107a2b0a27dSPhilippe Mathieu-Daudé OPC_FTRUNC_U_df = (0x02 << 17) | OPC_MSA_2RF, 108a2b0a27dSPhilippe Mathieu-Daudé OPC_FSQRT_df = (0x03 << 17) | OPC_MSA_2RF, 109a2b0a27dSPhilippe Mathieu-Daudé OPC_FRSQRT_df = (0x04 << 17) | OPC_MSA_2RF, 110a2b0a27dSPhilippe Mathieu-Daudé OPC_FRCP_df = (0x05 << 17) | OPC_MSA_2RF, 111a2b0a27dSPhilippe Mathieu-Daudé OPC_FRINT_df = (0x06 << 17) | OPC_MSA_2RF, 112a2b0a27dSPhilippe Mathieu-Daudé OPC_FLOG2_df = (0x07 << 17) | OPC_MSA_2RF, 113a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXUPL_df = (0x08 << 17) | OPC_MSA_2RF, 114a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXUPR_df = (0x09 << 17) | OPC_MSA_2RF, 115a2b0a27dSPhilippe Mathieu-Daudé OPC_FFQL_df = (0x0A << 17) | OPC_MSA_2RF, 116a2b0a27dSPhilippe Mathieu-Daudé OPC_FFQR_df = (0x0B << 17) | OPC_MSA_2RF, 117a2b0a27dSPhilippe Mathieu-Daudé OPC_FTINT_S_df = (0x0C << 17) | OPC_MSA_2RF, 118a2b0a27dSPhilippe Mathieu-Daudé OPC_FTINT_U_df = (0x0D << 17) | OPC_MSA_2RF, 119a2b0a27dSPhilippe Mathieu-Daudé OPC_FFINT_S_df = (0x0E << 17) | OPC_MSA_2RF, 120a2b0a27dSPhilippe Mathieu-Daudé OPC_FFINT_U_df = (0x0F << 17) | OPC_MSA_2RF, 121a2b0a27dSPhilippe Mathieu-Daudé 122a2b0a27dSPhilippe Mathieu-Daudé /* 3R instruction df(bits 22..21) = _b, _h, _w, d */ 123a2b0a27dSPhilippe Mathieu-Daudé OPC_SLL_df = (0x0 << 23) | OPC_MSA_3R_0D, 124a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDV_df = (0x0 << 23) | OPC_MSA_3R_0E, 125a2b0a27dSPhilippe Mathieu-Daudé OPC_CEQ_df = (0x0 << 23) | OPC_MSA_3R_0F, 126a2b0a27dSPhilippe Mathieu-Daudé OPC_ADD_A_df = (0x0 << 23) | OPC_MSA_3R_10, 127a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBS_S_df = (0x0 << 23) | OPC_MSA_3R_11, 128a2b0a27dSPhilippe Mathieu-Daudé OPC_MULV_df = (0x0 << 23) | OPC_MSA_3R_12, 129a2b0a27dSPhilippe Mathieu-Daudé OPC_DOTP_S_df = (0x0 << 23) | OPC_MSA_3R_13, 130a2b0a27dSPhilippe Mathieu-Daudé OPC_SLD_df = (0x0 << 23) | OPC_MSA_3R_14, 131a2b0a27dSPhilippe Mathieu-Daudé OPC_VSHF_df = (0x0 << 23) | OPC_MSA_3R_15, 132a2b0a27dSPhilippe Mathieu-Daudé OPC_SRA_df = (0x1 << 23) | OPC_MSA_3R_0D, 133a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBV_df = (0x1 << 23) | OPC_MSA_3R_0E, 134a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_A_df = (0x1 << 23) | OPC_MSA_3R_10, 135a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBS_U_df = (0x1 << 23) | OPC_MSA_3R_11, 136a2b0a27dSPhilippe Mathieu-Daudé OPC_MADDV_df = (0x1 << 23) | OPC_MSA_3R_12, 137a2b0a27dSPhilippe Mathieu-Daudé OPC_DOTP_U_df = (0x1 << 23) | OPC_MSA_3R_13, 138a2b0a27dSPhilippe Mathieu-Daudé OPC_SPLAT_df = (0x1 << 23) | OPC_MSA_3R_14, 139a2b0a27dSPhilippe Mathieu-Daudé OPC_SRAR_df = (0x1 << 23) | OPC_MSA_3R_15, 140a2b0a27dSPhilippe Mathieu-Daudé OPC_SRL_df = (0x2 << 23) | OPC_MSA_3R_0D, 141a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_S_df = (0x2 << 23) | OPC_MSA_3R_0E, 142a2b0a27dSPhilippe Mathieu-Daudé OPC_CLT_S_df = (0x2 << 23) | OPC_MSA_3R_0F, 143a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_S_df = (0x2 << 23) | OPC_MSA_3R_10, 144a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBSUS_U_df = (0x2 << 23) | OPC_MSA_3R_11, 145a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUBV_df = (0x2 << 23) | OPC_MSA_3R_12, 146a2b0a27dSPhilippe Mathieu-Daudé OPC_DPADD_S_df = (0x2 << 23) | OPC_MSA_3R_13, 147a2b0a27dSPhilippe Mathieu-Daudé OPC_PCKEV_df = (0x2 << 23) | OPC_MSA_3R_14, 148a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLR_df = (0x2 << 23) | OPC_MSA_3R_15, 149a2b0a27dSPhilippe Mathieu-Daudé OPC_BCLR_df = (0x3 << 23) | OPC_MSA_3R_0D, 150a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_U_df = (0x3 << 23) | OPC_MSA_3R_0E, 151a2b0a27dSPhilippe Mathieu-Daudé OPC_CLT_U_df = (0x3 << 23) | OPC_MSA_3R_0F, 152a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_U_df = (0x3 << 23) | OPC_MSA_3R_10, 153a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBSUU_S_df = (0x3 << 23) | OPC_MSA_3R_11, 154a2b0a27dSPhilippe Mathieu-Daudé OPC_DPADD_U_df = (0x3 << 23) | OPC_MSA_3R_13, 155a2b0a27dSPhilippe Mathieu-Daudé OPC_PCKOD_df = (0x3 << 23) | OPC_MSA_3R_14, 156a2b0a27dSPhilippe Mathieu-Daudé OPC_BSET_df = (0x4 << 23) | OPC_MSA_3R_0D, 157a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_S_df = (0x4 << 23) | OPC_MSA_3R_0E, 158a2b0a27dSPhilippe Mathieu-Daudé OPC_CLE_S_df = (0x4 << 23) | OPC_MSA_3R_0F, 159a2b0a27dSPhilippe Mathieu-Daudé OPC_AVE_S_df = (0x4 << 23) | OPC_MSA_3R_10, 160a2b0a27dSPhilippe Mathieu-Daudé OPC_ASUB_S_df = (0x4 << 23) | OPC_MSA_3R_11, 161a2b0a27dSPhilippe Mathieu-Daudé OPC_DIV_S_df = (0x4 << 23) | OPC_MSA_3R_12, 162a2b0a27dSPhilippe Mathieu-Daudé OPC_DPSUB_S_df = (0x4 << 23) | OPC_MSA_3R_13, 163a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVL_df = (0x4 << 23) | OPC_MSA_3R_14, 164a2b0a27dSPhilippe Mathieu-Daudé OPC_HADD_S_df = (0x4 << 23) | OPC_MSA_3R_15, 165a2b0a27dSPhilippe Mathieu-Daudé OPC_BNEG_df = (0x5 << 23) | OPC_MSA_3R_0D, 166a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_U_df = (0x5 << 23) | OPC_MSA_3R_0E, 167a2b0a27dSPhilippe Mathieu-Daudé OPC_CLE_U_df = (0x5 << 23) | OPC_MSA_3R_0F, 168a2b0a27dSPhilippe Mathieu-Daudé OPC_AVE_U_df = (0x5 << 23) | OPC_MSA_3R_10, 169a2b0a27dSPhilippe Mathieu-Daudé OPC_ASUB_U_df = (0x5 << 23) | OPC_MSA_3R_11, 170a2b0a27dSPhilippe Mathieu-Daudé OPC_DIV_U_df = (0x5 << 23) | OPC_MSA_3R_12, 171a2b0a27dSPhilippe Mathieu-Daudé OPC_DPSUB_U_df = (0x5 << 23) | OPC_MSA_3R_13, 172a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVR_df = (0x5 << 23) | OPC_MSA_3R_14, 173a2b0a27dSPhilippe Mathieu-Daudé OPC_HADD_U_df = (0x5 << 23) | OPC_MSA_3R_15, 174a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSL_df = (0x6 << 23) | OPC_MSA_3R_0D, 175a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_A_df = (0x6 << 23) | OPC_MSA_3R_0E, 176a2b0a27dSPhilippe Mathieu-Daudé OPC_AVER_S_df = (0x6 << 23) | OPC_MSA_3R_10, 177a2b0a27dSPhilippe Mathieu-Daudé OPC_MOD_S_df = (0x6 << 23) | OPC_MSA_3R_12, 178a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVEV_df = (0x6 << 23) | OPC_MSA_3R_14, 179a2b0a27dSPhilippe Mathieu-Daudé OPC_HSUB_S_df = (0x6 << 23) | OPC_MSA_3R_15, 180a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSR_df = (0x7 << 23) | OPC_MSA_3R_0D, 181a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_A_df = (0x7 << 23) | OPC_MSA_3R_0E, 182a2b0a27dSPhilippe Mathieu-Daudé OPC_AVER_U_df = (0x7 << 23) | OPC_MSA_3R_10, 183a2b0a27dSPhilippe Mathieu-Daudé OPC_MOD_U_df = (0x7 << 23) | OPC_MSA_3R_12, 184a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVOD_df = (0x7 << 23) | OPC_MSA_3R_14, 185a2b0a27dSPhilippe Mathieu-Daudé OPC_HSUB_U_df = (0x7 << 23) | OPC_MSA_3R_15, 186a2b0a27dSPhilippe Mathieu-Daudé 187a2b0a27dSPhilippe Mathieu-Daudé /* ELM instructions df(bits 21..16) = _b, _h, _w, _d */ 188a2b0a27dSPhilippe Mathieu-Daudé OPC_SLDI_df = (0x0 << 22) | (0x00 << 16) | OPC_MSA_ELM, 189a2b0a27dSPhilippe Mathieu-Daudé OPC_CTCMSA = (0x0 << 22) | (0x3E << 16) | OPC_MSA_ELM, 190a2b0a27dSPhilippe Mathieu-Daudé OPC_SPLATI_df = (0x1 << 22) | (0x00 << 16) | OPC_MSA_ELM, 191a2b0a27dSPhilippe Mathieu-Daudé OPC_CFCMSA = (0x1 << 22) | (0x3E << 16) | OPC_MSA_ELM, 192a2b0a27dSPhilippe Mathieu-Daudé OPC_COPY_S_df = (0x2 << 22) | (0x00 << 16) | OPC_MSA_ELM, 193a2b0a27dSPhilippe Mathieu-Daudé OPC_MOVE_V = (0x2 << 22) | (0x3E << 16) | OPC_MSA_ELM, 194a2b0a27dSPhilippe Mathieu-Daudé OPC_COPY_U_df = (0x3 << 22) | (0x00 << 16) | OPC_MSA_ELM, 195a2b0a27dSPhilippe Mathieu-Daudé OPC_INSERT_df = (0x4 << 22) | (0x00 << 16) | OPC_MSA_ELM, 196a2b0a27dSPhilippe Mathieu-Daudé OPC_INSVE_df = (0x5 << 22) | (0x00 << 16) | OPC_MSA_ELM, 197a2b0a27dSPhilippe Mathieu-Daudé 198a2b0a27dSPhilippe Mathieu-Daudé /* 3RF instruction _df(bit 21) = _w, _d */ 199a2b0a27dSPhilippe Mathieu-Daudé OPC_FCAF_df = (0x0 << 22) | OPC_MSA_3RF_1A, 200a2b0a27dSPhilippe Mathieu-Daudé OPC_FADD_df = (0x0 << 22) | OPC_MSA_3RF_1B, 201a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUN_df = (0x1 << 22) | OPC_MSA_3RF_1A, 202a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUB_df = (0x1 << 22) | OPC_MSA_3RF_1B, 203a2b0a27dSPhilippe Mathieu-Daudé OPC_FCOR_df = (0x1 << 22) | OPC_MSA_3RF_1C, 204a2b0a27dSPhilippe Mathieu-Daudé OPC_FCEQ_df = (0x2 << 22) | OPC_MSA_3RF_1A, 205a2b0a27dSPhilippe Mathieu-Daudé OPC_FMUL_df = (0x2 << 22) | OPC_MSA_3RF_1B, 206a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUNE_df = (0x2 << 22) | OPC_MSA_3RF_1C, 207a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUEQ_df = (0x3 << 22) | OPC_MSA_3RF_1A, 208a2b0a27dSPhilippe Mathieu-Daudé OPC_FDIV_df = (0x3 << 22) | OPC_MSA_3RF_1B, 209a2b0a27dSPhilippe Mathieu-Daudé OPC_FCNE_df = (0x3 << 22) | OPC_MSA_3RF_1C, 210a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLT_df = (0x4 << 22) | OPC_MSA_3RF_1A, 211a2b0a27dSPhilippe Mathieu-Daudé OPC_FMADD_df = (0x4 << 22) | OPC_MSA_3RF_1B, 212a2b0a27dSPhilippe Mathieu-Daudé OPC_MUL_Q_df = (0x4 << 22) | OPC_MSA_3RF_1C, 213a2b0a27dSPhilippe Mathieu-Daudé OPC_FCULT_df = (0x5 << 22) | OPC_MSA_3RF_1A, 214a2b0a27dSPhilippe Mathieu-Daudé OPC_FMSUB_df = (0x5 << 22) | OPC_MSA_3RF_1B, 215a2b0a27dSPhilippe Mathieu-Daudé OPC_MADD_Q_df = (0x5 << 22) | OPC_MSA_3RF_1C, 216a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLE_df = (0x6 << 22) | OPC_MSA_3RF_1A, 217a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUB_Q_df = (0x6 << 22) | OPC_MSA_3RF_1C, 218a2b0a27dSPhilippe Mathieu-Daudé OPC_FCULE_df = (0x7 << 22) | OPC_MSA_3RF_1A, 219a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXP2_df = (0x7 << 22) | OPC_MSA_3RF_1B, 220a2b0a27dSPhilippe Mathieu-Daudé OPC_FSAF_df = (0x8 << 22) | OPC_MSA_3RF_1A, 221a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXDO_df = (0x8 << 22) | OPC_MSA_3RF_1B, 222a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUN_df = (0x9 << 22) | OPC_MSA_3RF_1A, 223a2b0a27dSPhilippe Mathieu-Daudé OPC_FSOR_df = (0x9 << 22) | OPC_MSA_3RF_1C, 224a2b0a27dSPhilippe Mathieu-Daudé OPC_FSEQ_df = (0xA << 22) | OPC_MSA_3RF_1A, 225a2b0a27dSPhilippe Mathieu-Daudé OPC_FTQ_df = (0xA << 22) | OPC_MSA_3RF_1B, 226a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUNE_df = (0xA << 22) | OPC_MSA_3RF_1C, 227a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUEQ_df = (0xB << 22) | OPC_MSA_3RF_1A, 228a2b0a27dSPhilippe Mathieu-Daudé OPC_FSNE_df = (0xB << 22) | OPC_MSA_3RF_1C, 229a2b0a27dSPhilippe Mathieu-Daudé OPC_FSLT_df = (0xC << 22) | OPC_MSA_3RF_1A, 230a2b0a27dSPhilippe Mathieu-Daudé OPC_FMIN_df = (0xC << 22) | OPC_MSA_3RF_1B, 231a2b0a27dSPhilippe Mathieu-Daudé OPC_MULR_Q_df = (0xC << 22) | OPC_MSA_3RF_1C, 232a2b0a27dSPhilippe Mathieu-Daudé OPC_FSULT_df = (0xD << 22) | OPC_MSA_3RF_1A, 233a2b0a27dSPhilippe Mathieu-Daudé OPC_FMIN_A_df = (0xD << 22) | OPC_MSA_3RF_1B, 234a2b0a27dSPhilippe Mathieu-Daudé OPC_MADDR_Q_df = (0xD << 22) | OPC_MSA_3RF_1C, 235a2b0a27dSPhilippe Mathieu-Daudé OPC_FSLE_df = (0xE << 22) | OPC_MSA_3RF_1A, 236a2b0a27dSPhilippe Mathieu-Daudé OPC_FMAX_df = (0xE << 22) | OPC_MSA_3RF_1B, 237a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUBR_Q_df = (0xE << 22) | OPC_MSA_3RF_1C, 238a2b0a27dSPhilippe Mathieu-Daudé OPC_FSULE_df = (0xF << 22) | OPC_MSA_3RF_1A, 239a2b0a27dSPhilippe Mathieu-Daudé OPC_FMAX_A_df = (0xF << 22) | OPC_MSA_3RF_1B, 240a2b0a27dSPhilippe Mathieu-Daudé 241a2b0a27dSPhilippe Mathieu-Daudé /* BIT instruction df(bits 22..16) = _B _H _W _D */ 242a2b0a27dSPhilippe Mathieu-Daudé OPC_SLLI_df = (0x0 << 23) | OPC_MSA_BIT_09, 243a2b0a27dSPhilippe Mathieu-Daudé OPC_SAT_S_df = (0x0 << 23) | OPC_MSA_BIT_0A, 244a2b0a27dSPhilippe Mathieu-Daudé OPC_SRAI_df = (0x1 << 23) | OPC_MSA_BIT_09, 245a2b0a27dSPhilippe Mathieu-Daudé OPC_SAT_U_df = (0x1 << 23) | OPC_MSA_BIT_0A, 246a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLI_df = (0x2 << 23) | OPC_MSA_BIT_09, 247a2b0a27dSPhilippe Mathieu-Daudé OPC_SRARI_df = (0x2 << 23) | OPC_MSA_BIT_0A, 248a2b0a27dSPhilippe Mathieu-Daudé OPC_BCLRI_df = (0x3 << 23) | OPC_MSA_BIT_09, 249a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLRI_df = (0x3 << 23) | OPC_MSA_BIT_0A, 250a2b0a27dSPhilippe Mathieu-Daudé OPC_BSETI_df = (0x4 << 23) | OPC_MSA_BIT_09, 251a2b0a27dSPhilippe Mathieu-Daudé OPC_BNEGI_df = (0x5 << 23) | OPC_MSA_BIT_09, 252a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSLI_df = (0x6 << 23) | OPC_MSA_BIT_09, 253a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSRI_df = (0x7 << 23) | OPC_MSA_BIT_09, 254a2b0a27dSPhilippe Mathieu-Daudé }; 255a2b0a27dSPhilippe Mathieu-Daudé 25606106772SPhilippe Mathieu-Daudé static const char msaregnames[][6] = { 257a2b0a27dSPhilippe Mathieu-Daudé "w0.d0", "w0.d1", "w1.d0", "w1.d1", 258a2b0a27dSPhilippe Mathieu-Daudé "w2.d0", "w2.d1", "w3.d0", "w3.d1", 259a2b0a27dSPhilippe Mathieu-Daudé "w4.d0", "w4.d1", "w5.d0", "w5.d1", 260a2b0a27dSPhilippe Mathieu-Daudé "w6.d0", "w6.d1", "w7.d0", "w7.d1", 261a2b0a27dSPhilippe Mathieu-Daudé "w8.d0", "w8.d1", "w9.d0", "w9.d1", 262a2b0a27dSPhilippe Mathieu-Daudé "w10.d0", "w10.d1", "w11.d0", "w11.d1", 263a2b0a27dSPhilippe Mathieu-Daudé "w12.d0", "w12.d1", "w13.d0", "w13.d1", 264a2b0a27dSPhilippe Mathieu-Daudé "w14.d0", "w14.d1", "w15.d0", "w15.d1", 265a2b0a27dSPhilippe Mathieu-Daudé "w16.d0", "w16.d1", "w17.d0", "w17.d1", 266a2b0a27dSPhilippe Mathieu-Daudé "w18.d0", "w18.d1", "w19.d0", "w19.d1", 267a2b0a27dSPhilippe Mathieu-Daudé "w20.d0", "w20.d1", "w21.d0", "w21.d1", 268a2b0a27dSPhilippe Mathieu-Daudé "w22.d0", "w22.d1", "w23.d0", "w23.d1", 269a2b0a27dSPhilippe Mathieu-Daudé "w24.d0", "w24.d1", "w25.d0", "w25.d1", 270a2b0a27dSPhilippe Mathieu-Daudé "w26.d0", "w26.d1", "w27.d0", "w27.d1", 271a2b0a27dSPhilippe Mathieu-Daudé "w28.d0", "w28.d1", "w29.d0", "w29.d1", 272a2b0a27dSPhilippe Mathieu-Daudé "w30.d0", "w30.d1", "w31.d0", "w31.d1", 273a2b0a27dSPhilippe Mathieu-Daudé }; 274a2b0a27dSPhilippe Mathieu-Daudé 275a2b0a27dSPhilippe Mathieu-Daudé static TCGv_i64 msa_wr_d[64]; 276a2b0a27dSPhilippe Mathieu-Daudé 277a2b0a27dSPhilippe Mathieu-Daudé void msa_translate_init(void) 278a2b0a27dSPhilippe Mathieu-Daudé { 279a2b0a27dSPhilippe Mathieu-Daudé int i; 280a2b0a27dSPhilippe Mathieu-Daudé 281a2b0a27dSPhilippe Mathieu-Daudé for (i = 0; i < 32; i++) { 282bbc213b3SPhilippe Mathieu-Daudé int off; 283a2b0a27dSPhilippe Mathieu-Daudé 284a2b0a27dSPhilippe Mathieu-Daudé /* 285a2b0a27dSPhilippe Mathieu-Daudé * The MSA vector registers are mapped on the 286a2b0a27dSPhilippe Mathieu-Daudé * scalar floating-point unit (FPU) registers. 287a2b0a27dSPhilippe Mathieu-Daudé */ 288bbc213b3SPhilippe Mathieu-Daudé off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); 289a2b0a27dSPhilippe Mathieu-Daudé msa_wr_d[i * 2] = fpu_f64[i]; 290bbc213b3SPhilippe Mathieu-Daudé 291a2b0a27dSPhilippe Mathieu-Daudé off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); 292a2b0a27dSPhilippe Mathieu-Daudé msa_wr_d[i * 2 + 1] = 293a2b0a27dSPhilippe Mathieu-Daudé tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]); 294a2b0a27dSPhilippe Mathieu-Daudé } 295a2b0a27dSPhilippe Mathieu-Daudé } 296a2b0a27dSPhilippe Mathieu-Daudé 297340ee8b3SPhilippe Mathieu-Daudé /* 298340ee8b3SPhilippe Mathieu-Daudé * Check if MSA is enabled. 299340ee8b3SPhilippe Mathieu-Daudé * This function is always called with MSA available. 300340ee8b3SPhilippe Mathieu-Daudé * If MSA is disabled, raise an exception. 301340ee8b3SPhilippe Mathieu-Daudé */ 302340ee8b3SPhilippe Mathieu-Daudé static inline bool check_msa_enabled(DisasContext *ctx) 303a2b0a27dSPhilippe Mathieu-Daudé { 304a2b0a27dSPhilippe Mathieu-Daudé if (unlikely((ctx->hflags & MIPS_HFLAG_FPU) && 305a2b0a27dSPhilippe Mathieu-Daudé !(ctx->hflags & MIPS_HFLAG_F64))) { 306a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 307340ee8b3SPhilippe Mathieu-Daudé return false; 308a2b0a27dSPhilippe Mathieu-Daudé } 309a2b0a27dSPhilippe Mathieu-Daudé 310a2b0a27dSPhilippe Mathieu-Daudé if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) { 311a2b0a27dSPhilippe Mathieu-Daudé generate_exception_end(ctx, EXCP_MSADIS); 312340ee8b3SPhilippe Mathieu-Daudé return false; 313a2b0a27dSPhilippe Mathieu-Daudé } 314340ee8b3SPhilippe Mathieu-Daudé return true; 315a2b0a27dSPhilippe Mathieu-Daudé } 316a2b0a27dSPhilippe Mathieu-Daudé 317a2b0a27dSPhilippe Mathieu-Daudé static void gen_check_zero_element(TCGv tresult, uint8_t df, uint8_t wt, 318a2b0a27dSPhilippe Mathieu-Daudé TCGCond cond) 319a2b0a27dSPhilippe Mathieu-Daudé { 320a2b0a27dSPhilippe Mathieu-Daudé /* generates tcg ops to check if any element is 0 */ 321a2b0a27dSPhilippe Mathieu-Daudé /* Note this function only works with MSA_WRLEN = 128 */ 32240f75c02SPhilippe Mathieu-Daudé uint64_t eval_zero_or_big = dup_const(df, 1); 32340f75c02SPhilippe Mathieu-Daudé uint64_t eval_big = eval_zero_or_big << ((8 << df) - 1); 324a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t0 = tcg_temp_new_i64(); 325a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t1 = tcg_temp_new_i64(); 32640f75c02SPhilippe Mathieu-Daudé 327a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_subi_i64(t0, msa_wr_d[wt << 1], eval_zero_or_big); 328a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andc_i64(t0, t0, msa_wr_d[wt << 1]); 329a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andi_i64(t0, t0, eval_big); 330a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_subi_i64(t1, msa_wr_d[(wt << 1) + 1], eval_zero_or_big); 331a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andc_i64(t1, t1, msa_wr_d[(wt << 1) + 1]); 332a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andi_i64(t1, t1, eval_big); 333a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_or_i64(t0, t0, t1); 334a2b0a27dSPhilippe Mathieu-Daudé /* if all bits are zero then all elements are not zero */ 335a2b0a27dSPhilippe Mathieu-Daudé /* if some bit is non-zero then some element is zero */ 336a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_setcondi_i64(cond, t0, t0, 0); 337a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_trunc_i64_tl(tresult, t0); 338a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t0); 339a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t1); 340a2b0a27dSPhilippe Mathieu-Daudé } 341a2b0a27dSPhilippe Mathieu-Daudé 342d61566cfSPhilippe Mathieu-Daudé static bool gen_msa_BxZ_V(DisasContext *ctx, int wt, int sa, TCGCond cond) 343a2b0a27dSPhilippe Mathieu-Daudé { 344a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t0; 345a2b0a27dSPhilippe Mathieu-Daudé 346340ee8b3SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 347340ee8b3SPhilippe Mathieu-Daudé return true; 348340ee8b3SPhilippe Mathieu-Daudé } 349a2b0a27dSPhilippe Mathieu-Daudé 350a2b0a27dSPhilippe Mathieu-Daudé if (ctx->hflags & MIPS_HFLAG_BMASK) { 351a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 352a2b0a27dSPhilippe Mathieu-Daudé return true; 353a2b0a27dSPhilippe Mathieu-Daudé } 354a2b0a27dSPhilippe Mathieu-Daudé t0 = tcg_temp_new_i64(); 355a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_or_i64(t0, msa_wr_d[wt << 1], msa_wr_d[(wt << 1) + 1]); 356a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_setcondi_i64(cond, t0, t0, 0); 357a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_trunc_i64_tl(bcond, t0); 358a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t0); 359a2b0a27dSPhilippe Mathieu-Daudé 360d61566cfSPhilippe Mathieu-Daudé ctx->btarget = ctx->base.pc_next + (sa << 2) + 4; 361a2b0a27dSPhilippe Mathieu-Daudé 362a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BC; 363a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BDS32; 364a2b0a27dSPhilippe Mathieu-Daudé 365a2b0a27dSPhilippe Mathieu-Daudé return true; 366a2b0a27dSPhilippe Mathieu-Daudé } 367a2b0a27dSPhilippe Mathieu-Daudé 368a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BZ_V(DisasContext *ctx, arg_msa_bz *a) 369a2b0a27dSPhilippe Mathieu-Daudé { 370d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ_V(ctx, a->wt, a->sa, TCG_COND_EQ); 371a2b0a27dSPhilippe Mathieu-Daudé } 372a2b0a27dSPhilippe Mathieu-Daudé 373a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BNZ_V(DisasContext *ctx, arg_msa_bz *a) 374a2b0a27dSPhilippe Mathieu-Daudé { 375d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ_V(ctx, a->wt, a->sa, TCG_COND_NE); 376a2b0a27dSPhilippe Mathieu-Daudé } 377a2b0a27dSPhilippe Mathieu-Daudé 378d61566cfSPhilippe Mathieu-Daudé static bool gen_msa_BxZ(DisasContext *ctx, int df, int wt, int sa, bool if_not) 379a2b0a27dSPhilippe Mathieu-Daudé { 380340ee8b3SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 381340ee8b3SPhilippe Mathieu-Daudé return true; 382340ee8b3SPhilippe Mathieu-Daudé } 383a2b0a27dSPhilippe Mathieu-Daudé 384a2b0a27dSPhilippe Mathieu-Daudé if (ctx->hflags & MIPS_HFLAG_BMASK) { 385a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 386a2b0a27dSPhilippe Mathieu-Daudé return true; 387a2b0a27dSPhilippe Mathieu-Daudé } 388a2b0a27dSPhilippe Mathieu-Daudé 389a2b0a27dSPhilippe Mathieu-Daudé gen_check_zero_element(bcond, df, wt, if_not ? TCG_COND_EQ : TCG_COND_NE); 390a2b0a27dSPhilippe Mathieu-Daudé 391d61566cfSPhilippe Mathieu-Daudé ctx->btarget = ctx->base.pc_next + (sa << 2) + 4; 392a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BC; 393a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BDS32; 394a2b0a27dSPhilippe Mathieu-Daudé 395a2b0a27dSPhilippe Mathieu-Daudé return true; 396a2b0a27dSPhilippe Mathieu-Daudé } 397a2b0a27dSPhilippe Mathieu-Daudé 398d61566cfSPhilippe Mathieu-Daudé static bool trans_BZ(DisasContext *ctx, arg_msa_bz *a) 399a2b0a27dSPhilippe Mathieu-Daudé { 400d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ(ctx, a->df, a->wt, a->sa, false); 401a2b0a27dSPhilippe Mathieu-Daudé } 402a2b0a27dSPhilippe Mathieu-Daudé 403d61566cfSPhilippe Mathieu-Daudé static bool trans_BNZ(DisasContext *ctx, arg_msa_bz *a) 404a2b0a27dSPhilippe Mathieu-Daudé { 405d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ(ctx, a->df, a->wt, a->sa, true); 406a2b0a27dSPhilippe Mathieu-Daudé } 407a2b0a27dSPhilippe Mathieu-Daudé 408a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_i8(DisasContext *ctx) 409a2b0a27dSPhilippe Mathieu-Daudé { 410a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_I8(op) (MASK_MSA_MINOR(op) | (op & (0x03 << 24))) 411a2b0a27dSPhilippe Mathieu-Daudé uint8_t i8 = (ctx->opcode >> 16) & 0xff; 412a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 413a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 414a2b0a27dSPhilippe Mathieu-Daudé 415a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 416a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 417a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 ti8 = tcg_const_i32(i8); 418a2b0a27dSPhilippe Mathieu-Daudé 419a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_I8(ctx->opcode)) { 420a2b0a27dSPhilippe Mathieu-Daudé case OPC_ANDI_B: 421a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_andi_b(cpu_env, twd, tws, ti8); 422a2b0a27dSPhilippe Mathieu-Daudé break; 423a2b0a27dSPhilippe Mathieu-Daudé case OPC_ORI_B: 424a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ori_b(cpu_env, twd, tws, ti8); 425a2b0a27dSPhilippe Mathieu-Daudé break; 426a2b0a27dSPhilippe Mathieu-Daudé case OPC_NORI_B: 427a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nori_b(cpu_env, twd, tws, ti8); 428a2b0a27dSPhilippe Mathieu-Daudé break; 429a2b0a27dSPhilippe Mathieu-Daudé case OPC_XORI_B: 430a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_xori_b(cpu_env, twd, tws, ti8); 431a2b0a27dSPhilippe Mathieu-Daudé break; 432a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZI_B: 433a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmnzi_b(cpu_env, twd, tws, ti8); 434a2b0a27dSPhilippe Mathieu-Daudé break; 435a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZI_B: 436a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmzi_b(cpu_env, twd, tws, ti8); 437a2b0a27dSPhilippe Mathieu-Daudé break; 438a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSELI_B: 439a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bseli_b(cpu_env, twd, tws, ti8); 440a2b0a27dSPhilippe Mathieu-Daudé break; 441a2b0a27dSPhilippe Mathieu-Daudé case OPC_SHF_B: 442a2b0a27dSPhilippe Mathieu-Daudé case OPC_SHF_H: 443a2b0a27dSPhilippe Mathieu-Daudé case OPC_SHF_W: 444a2b0a27dSPhilippe Mathieu-Daudé { 445a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 24) & 0x3; 446a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 447a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 448a2b0a27dSPhilippe Mathieu-Daudé } else { 449a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(df); 450a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_shf_df(cpu_env, tdf, twd, tws, ti8); 451a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 452a2b0a27dSPhilippe Mathieu-Daudé } 453a2b0a27dSPhilippe Mathieu-Daudé } 454a2b0a27dSPhilippe Mathieu-Daudé break; 455a2b0a27dSPhilippe Mathieu-Daudé default: 456a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 457a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 458a2b0a27dSPhilippe Mathieu-Daudé break; 459a2b0a27dSPhilippe Mathieu-Daudé } 460a2b0a27dSPhilippe Mathieu-Daudé 461a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 462a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 463a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(ti8); 464a2b0a27dSPhilippe Mathieu-Daudé } 465a2b0a27dSPhilippe Mathieu-Daudé 466a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_i5(DisasContext *ctx) 467a2b0a27dSPhilippe Mathieu-Daudé { 468a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_I5(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 469a2b0a27dSPhilippe Mathieu-Daudé int8_t s5 = (int8_t) sextract32(ctx->opcode, 16, 5); 470469a316dSPhilippe Mathieu-Daudé uint8_t u5 = extract32(ctx->opcode, 16, 5); 471a2b0a27dSPhilippe Mathieu-Daudé 472469a316dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(extract32(ctx->opcode, 21, 2)); 473469a316dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(extract32(ctx->opcode, 11, 5)); 474469a316dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(extract32(ctx->opcode, 6, 5)); 475a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 timm = tcg_temp_new_i32(); 476a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, u5); 477a2b0a27dSPhilippe Mathieu-Daudé 478a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_I5(ctx->opcode)) { 479a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDVI_df: 480a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addvi_df(cpu_env, tdf, twd, tws, timm); 481a2b0a27dSPhilippe Mathieu-Daudé break; 482a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBVI_df: 483a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subvi_df(cpu_env, tdf, twd, tws, timm); 484a2b0a27dSPhilippe Mathieu-Daudé break; 485a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAXI_S_df: 486a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 487a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maxi_s_df(cpu_env, tdf, twd, tws, timm); 488a2b0a27dSPhilippe Mathieu-Daudé break; 489a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAXI_U_df: 490a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maxi_u_df(cpu_env, tdf, twd, tws, timm); 491a2b0a27dSPhilippe Mathieu-Daudé break; 492a2b0a27dSPhilippe Mathieu-Daudé case OPC_MINI_S_df: 493a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 494a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mini_s_df(cpu_env, tdf, twd, tws, timm); 495a2b0a27dSPhilippe Mathieu-Daudé break; 496a2b0a27dSPhilippe Mathieu-Daudé case OPC_MINI_U_df: 497a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mini_u_df(cpu_env, tdf, twd, tws, timm); 498a2b0a27dSPhilippe Mathieu-Daudé break; 499a2b0a27dSPhilippe Mathieu-Daudé case OPC_CEQI_df: 500a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 501a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceqi_df(cpu_env, tdf, twd, tws, timm); 502a2b0a27dSPhilippe Mathieu-Daudé break; 503a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLTI_S_df: 504a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 505a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clti_s_df(cpu_env, tdf, twd, tws, timm); 506a2b0a27dSPhilippe Mathieu-Daudé break; 507a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLTI_U_df: 508a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clti_u_df(cpu_env, tdf, twd, tws, timm); 509a2b0a27dSPhilippe Mathieu-Daudé break; 510a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLEI_S_df: 511a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_movi_i32(timm, s5); 512a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clei_s_df(cpu_env, tdf, twd, tws, timm); 513a2b0a27dSPhilippe Mathieu-Daudé break; 514a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLEI_U_df: 515a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clei_u_df(cpu_env, tdf, twd, tws, timm); 516a2b0a27dSPhilippe Mathieu-Daudé break; 517a2b0a27dSPhilippe Mathieu-Daudé default: 518a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 519a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 520a2b0a27dSPhilippe Mathieu-Daudé break; 521a2b0a27dSPhilippe Mathieu-Daudé } 522a2b0a27dSPhilippe Mathieu-Daudé 523a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 524a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 525a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 526a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(timm); 527a2b0a27dSPhilippe Mathieu-Daudé } 528a2b0a27dSPhilippe Mathieu-Daudé 529*75094c33SPhilippe Mathieu-Daudé static bool trans_LDI(DisasContext *ctx, arg_msa_ldi *a) 530*75094c33SPhilippe Mathieu-Daudé { 531*75094c33SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 532*75094c33SPhilippe Mathieu-Daudé return true; 533*75094c33SPhilippe Mathieu-Daudé } 534*75094c33SPhilippe Mathieu-Daudé 535*75094c33SPhilippe Mathieu-Daudé gen_helper_msa_ldi_df(cpu_env, 536*75094c33SPhilippe Mathieu-Daudé tcg_constant_i32(a->df), 537*75094c33SPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 538*75094c33SPhilippe Mathieu-Daudé tcg_constant_i32(a->sa)); 539*75094c33SPhilippe Mathieu-Daudé 540*75094c33SPhilippe Mathieu-Daudé return true; 541*75094c33SPhilippe Mathieu-Daudé } 542*75094c33SPhilippe Mathieu-Daudé 543a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_bit(DisasContext *ctx) 544a2b0a27dSPhilippe Mathieu-Daudé { 545a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_BIT(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 546a2b0a27dSPhilippe Mathieu-Daudé uint8_t dfm = (ctx->opcode >> 16) & 0x7f; 547a2b0a27dSPhilippe Mathieu-Daudé uint32_t df = 0, m = 0; 548a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 549a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 550a2b0a27dSPhilippe Mathieu-Daudé 551a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf; 552a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tm; 553a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd; 554a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws; 555a2b0a27dSPhilippe Mathieu-Daudé 556a2b0a27dSPhilippe Mathieu-Daudé if ((dfm & 0x40) == 0x00) { 557a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x3f; 558a2b0a27dSPhilippe Mathieu-Daudé df = DF_DOUBLE; 559a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfm & 0x60) == 0x40) { 560a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x1f; 561a2b0a27dSPhilippe Mathieu-Daudé df = DF_WORD; 562a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfm & 0x70) == 0x60) { 563a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x0f; 564a2b0a27dSPhilippe Mathieu-Daudé df = DF_HALF; 565a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfm & 0x78) == 0x70) { 566a2b0a27dSPhilippe Mathieu-Daudé m = dfm & 0x7; 567a2b0a27dSPhilippe Mathieu-Daudé df = DF_BYTE; 568a2b0a27dSPhilippe Mathieu-Daudé } else { 569a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 570a2b0a27dSPhilippe Mathieu-Daudé return; 571a2b0a27dSPhilippe Mathieu-Daudé } 572a2b0a27dSPhilippe Mathieu-Daudé 573a2b0a27dSPhilippe Mathieu-Daudé tdf = tcg_const_i32(df); 574a2b0a27dSPhilippe Mathieu-Daudé tm = tcg_const_i32(m); 575a2b0a27dSPhilippe Mathieu-Daudé twd = tcg_const_i32(wd); 576a2b0a27dSPhilippe Mathieu-Daudé tws = tcg_const_i32(ws); 577a2b0a27dSPhilippe Mathieu-Daudé 578a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_BIT(ctx->opcode)) { 579a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLLI_df: 580a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_slli_df(cpu_env, tdf, twd, tws, tm); 581a2b0a27dSPhilippe Mathieu-Daudé break; 582a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRAI_df: 583a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srai_df(cpu_env, tdf, twd, tws, tm); 584a2b0a27dSPhilippe Mathieu-Daudé break; 585a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLI_df: 586a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srli_df(cpu_env, tdf, twd, tws, tm); 587a2b0a27dSPhilippe Mathieu-Daudé break; 588a2b0a27dSPhilippe Mathieu-Daudé case OPC_BCLRI_df: 589a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclri_df(cpu_env, tdf, twd, tws, tm); 590a2b0a27dSPhilippe Mathieu-Daudé break; 591a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSETI_df: 592a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bseti_df(cpu_env, tdf, twd, tws, tm); 593a2b0a27dSPhilippe Mathieu-Daudé break; 594a2b0a27dSPhilippe Mathieu-Daudé case OPC_BNEGI_df: 595a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bnegi_df(cpu_env, tdf, twd, tws, tm); 596a2b0a27dSPhilippe Mathieu-Daudé break; 597a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSLI_df: 598a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsli_df(cpu_env, tdf, twd, tws, tm); 599a2b0a27dSPhilippe Mathieu-Daudé break; 600a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSRI_df: 601a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsri_df(cpu_env, tdf, twd, tws, tm); 602a2b0a27dSPhilippe Mathieu-Daudé break; 603a2b0a27dSPhilippe Mathieu-Daudé case OPC_SAT_S_df: 604a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sat_s_df(cpu_env, tdf, twd, tws, tm); 605a2b0a27dSPhilippe Mathieu-Daudé break; 606a2b0a27dSPhilippe Mathieu-Daudé case OPC_SAT_U_df: 607a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sat_u_df(cpu_env, tdf, twd, tws, tm); 608a2b0a27dSPhilippe Mathieu-Daudé break; 609a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRARI_df: 610a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srari_df(cpu_env, tdf, twd, tws, tm); 611a2b0a27dSPhilippe Mathieu-Daudé break; 612a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLRI_df: 613a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlri_df(cpu_env, tdf, twd, tws, tm); 614a2b0a27dSPhilippe Mathieu-Daudé break; 615a2b0a27dSPhilippe Mathieu-Daudé default: 616a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 617a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 618a2b0a27dSPhilippe Mathieu-Daudé break; 619a2b0a27dSPhilippe Mathieu-Daudé } 620a2b0a27dSPhilippe Mathieu-Daudé 621a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 622a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tm); 623a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 624a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 625a2b0a27dSPhilippe Mathieu-Daudé } 626a2b0a27dSPhilippe Mathieu-Daudé 627a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_3r(DisasContext *ctx) 628a2b0a27dSPhilippe Mathieu-Daudé { 629a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_3R(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 630a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 21) & 0x3; 631a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 632a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 633a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 634a2b0a27dSPhilippe Mathieu-Daudé 635a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(df); 636a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 637a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 638a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 639a2b0a27dSPhilippe Mathieu-Daudé 640a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3R(ctx->opcode)) { 641a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSL_df: 642a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 643a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 644a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_b(cpu_env, twd, tws, twt); 645a2b0a27dSPhilippe Mathieu-Daudé break; 646a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 647a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_h(cpu_env, twd, tws, twt); 648a2b0a27dSPhilippe Mathieu-Daudé break; 649a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 650a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_w(cpu_env, twd, tws, twt); 651a2b0a27dSPhilippe Mathieu-Daudé break; 652a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 653a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_d(cpu_env, twd, tws, twt); 654a2b0a27dSPhilippe Mathieu-Daudé break; 655a2b0a27dSPhilippe Mathieu-Daudé } 656a2b0a27dSPhilippe Mathieu-Daudé break; 657a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSR_df: 658a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 659a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 660a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_b(cpu_env, twd, tws, twt); 661a2b0a27dSPhilippe Mathieu-Daudé break; 662a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 663a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_h(cpu_env, twd, tws, twt); 664a2b0a27dSPhilippe Mathieu-Daudé break; 665a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 666a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_w(cpu_env, twd, tws, twt); 667a2b0a27dSPhilippe Mathieu-Daudé break; 668a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 669a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_d(cpu_env, twd, tws, twt); 670a2b0a27dSPhilippe Mathieu-Daudé break; 671a2b0a27dSPhilippe Mathieu-Daudé } 672a2b0a27dSPhilippe Mathieu-Daudé break; 673a2b0a27dSPhilippe Mathieu-Daudé case OPC_BCLR_df: 674a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 675a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 676a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_b(cpu_env, twd, tws, twt); 677a2b0a27dSPhilippe Mathieu-Daudé break; 678a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 679a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_h(cpu_env, twd, tws, twt); 680a2b0a27dSPhilippe Mathieu-Daudé break; 681a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 682a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_w(cpu_env, twd, tws, twt); 683a2b0a27dSPhilippe Mathieu-Daudé break; 684a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 685a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_d(cpu_env, twd, tws, twt); 686a2b0a27dSPhilippe Mathieu-Daudé break; 687a2b0a27dSPhilippe Mathieu-Daudé } 688a2b0a27dSPhilippe Mathieu-Daudé break; 689a2b0a27dSPhilippe Mathieu-Daudé case OPC_BNEG_df: 690a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 691a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 692a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_b(cpu_env, twd, tws, twt); 693a2b0a27dSPhilippe Mathieu-Daudé break; 694a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 695a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_h(cpu_env, twd, tws, twt); 696a2b0a27dSPhilippe Mathieu-Daudé break; 697a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 698a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_w(cpu_env, twd, tws, twt); 699a2b0a27dSPhilippe Mathieu-Daudé break; 700a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 701a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_d(cpu_env, twd, tws, twt); 702a2b0a27dSPhilippe Mathieu-Daudé break; 703a2b0a27dSPhilippe Mathieu-Daudé } 704a2b0a27dSPhilippe Mathieu-Daudé break; 705a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSET_df: 706a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 707a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 708a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_b(cpu_env, twd, tws, twt); 709a2b0a27dSPhilippe Mathieu-Daudé break; 710a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 711a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_h(cpu_env, twd, tws, twt); 712a2b0a27dSPhilippe Mathieu-Daudé break; 713a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 714a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_w(cpu_env, twd, tws, twt); 715a2b0a27dSPhilippe Mathieu-Daudé break; 716a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 717a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_d(cpu_env, twd, tws, twt); 718a2b0a27dSPhilippe Mathieu-Daudé break; 719a2b0a27dSPhilippe Mathieu-Daudé } 720a2b0a27dSPhilippe Mathieu-Daudé break; 721a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADD_A_df: 722a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 723a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 724a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_b(cpu_env, twd, tws, twt); 725a2b0a27dSPhilippe Mathieu-Daudé break; 726a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 727a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_h(cpu_env, twd, tws, twt); 728a2b0a27dSPhilippe Mathieu-Daudé break; 729a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 730a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_w(cpu_env, twd, tws, twt); 731a2b0a27dSPhilippe Mathieu-Daudé break; 732a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 733a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_d(cpu_env, twd, tws, twt); 734a2b0a27dSPhilippe Mathieu-Daudé break; 735a2b0a27dSPhilippe Mathieu-Daudé } 736a2b0a27dSPhilippe Mathieu-Daudé break; 737a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_A_df: 738a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 739a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 740a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_b(cpu_env, twd, tws, twt); 741a2b0a27dSPhilippe Mathieu-Daudé break; 742a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 743a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_h(cpu_env, twd, tws, twt); 744a2b0a27dSPhilippe Mathieu-Daudé break; 745a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 746a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_w(cpu_env, twd, tws, twt); 747a2b0a27dSPhilippe Mathieu-Daudé break; 748a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 749a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_d(cpu_env, twd, tws, twt); 750a2b0a27dSPhilippe Mathieu-Daudé break; 751a2b0a27dSPhilippe Mathieu-Daudé } 752a2b0a27dSPhilippe Mathieu-Daudé break; 753a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_S_df: 754a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 755a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 756a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_b(cpu_env, twd, tws, twt); 757a2b0a27dSPhilippe Mathieu-Daudé break; 758a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 759a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_h(cpu_env, twd, tws, twt); 760a2b0a27dSPhilippe Mathieu-Daudé break; 761a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 762a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_w(cpu_env, twd, tws, twt); 763a2b0a27dSPhilippe Mathieu-Daudé break; 764a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 765a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_d(cpu_env, twd, tws, twt); 766a2b0a27dSPhilippe Mathieu-Daudé break; 767a2b0a27dSPhilippe Mathieu-Daudé } 768a2b0a27dSPhilippe Mathieu-Daudé break; 769a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_U_df: 770a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 771a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 772a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_b(cpu_env, twd, tws, twt); 773a2b0a27dSPhilippe Mathieu-Daudé break; 774a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 775a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_h(cpu_env, twd, tws, twt); 776a2b0a27dSPhilippe Mathieu-Daudé break; 777a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 778a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_w(cpu_env, twd, tws, twt); 779a2b0a27dSPhilippe Mathieu-Daudé break; 780a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 781a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_d(cpu_env, twd, tws, twt); 782a2b0a27dSPhilippe Mathieu-Daudé break; 783a2b0a27dSPhilippe Mathieu-Daudé } 784a2b0a27dSPhilippe Mathieu-Daudé break; 785a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDV_df: 786a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 787a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 788a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_b(cpu_env, twd, tws, twt); 789a2b0a27dSPhilippe Mathieu-Daudé break; 790a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 791a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_h(cpu_env, twd, tws, twt); 792a2b0a27dSPhilippe Mathieu-Daudé break; 793a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 794a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_w(cpu_env, twd, tws, twt); 795a2b0a27dSPhilippe Mathieu-Daudé break; 796a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 797a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_d(cpu_env, twd, tws, twt); 798a2b0a27dSPhilippe Mathieu-Daudé break; 799a2b0a27dSPhilippe Mathieu-Daudé } 800a2b0a27dSPhilippe Mathieu-Daudé break; 801a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVE_S_df: 802a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 803a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 804a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_b(cpu_env, twd, tws, twt); 805a2b0a27dSPhilippe Mathieu-Daudé break; 806a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 807a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_h(cpu_env, twd, tws, twt); 808a2b0a27dSPhilippe Mathieu-Daudé break; 809a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 810a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_w(cpu_env, twd, tws, twt); 811a2b0a27dSPhilippe Mathieu-Daudé break; 812a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 813a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_d(cpu_env, twd, tws, twt); 814a2b0a27dSPhilippe Mathieu-Daudé break; 815a2b0a27dSPhilippe Mathieu-Daudé } 816a2b0a27dSPhilippe Mathieu-Daudé break; 817a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVE_U_df: 818a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 819a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 820a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_b(cpu_env, twd, tws, twt); 821a2b0a27dSPhilippe Mathieu-Daudé break; 822a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 823a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_h(cpu_env, twd, tws, twt); 824a2b0a27dSPhilippe Mathieu-Daudé break; 825a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 826a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_w(cpu_env, twd, tws, twt); 827a2b0a27dSPhilippe Mathieu-Daudé break; 828a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 829a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_d(cpu_env, twd, tws, twt); 830a2b0a27dSPhilippe Mathieu-Daudé break; 831a2b0a27dSPhilippe Mathieu-Daudé } 832a2b0a27dSPhilippe Mathieu-Daudé break; 833a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVER_S_df: 834a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 835a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 836a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_b(cpu_env, twd, tws, twt); 837a2b0a27dSPhilippe Mathieu-Daudé break; 838a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 839a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_h(cpu_env, twd, tws, twt); 840a2b0a27dSPhilippe Mathieu-Daudé break; 841a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 842a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_w(cpu_env, twd, tws, twt); 843a2b0a27dSPhilippe Mathieu-Daudé break; 844a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 845a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_d(cpu_env, twd, tws, twt); 846a2b0a27dSPhilippe Mathieu-Daudé break; 847a2b0a27dSPhilippe Mathieu-Daudé } 848a2b0a27dSPhilippe Mathieu-Daudé break; 849a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVER_U_df: 850a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 851a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 852a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_b(cpu_env, twd, tws, twt); 853a2b0a27dSPhilippe Mathieu-Daudé break; 854a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 855a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_h(cpu_env, twd, tws, twt); 856a2b0a27dSPhilippe Mathieu-Daudé break; 857a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 858a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_w(cpu_env, twd, tws, twt); 859a2b0a27dSPhilippe Mathieu-Daudé break; 860a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 861a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_d(cpu_env, twd, tws, twt); 862a2b0a27dSPhilippe Mathieu-Daudé break; 863a2b0a27dSPhilippe Mathieu-Daudé } 864a2b0a27dSPhilippe Mathieu-Daudé break; 865a2b0a27dSPhilippe Mathieu-Daudé case OPC_CEQ_df: 866a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 867a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 868a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_b(cpu_env, twd, tws, twt); 869a2b0a27dSPhilippe Mathieu-Daudé break; 870a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 871a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_h(cpu_env, twd, tws, twt); 872a2b0a27dSPhilippe Mathieu-Daudé break; 873a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 874a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_w(cpu_env, twd, tws, twt); 875a2b0a27dSPhilippe Mathieu-Daudé break; 876a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 877a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_d(cpu_env, twd, tws, twt); 878a2b0a27dSPhilippe Mathieu-Daudé break; 879a2b0a27dSPhilippe Mathieu-Daudé } 880a2b0a27dSPhilippe Mathieu-Daudé break; 881a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLE_S_df: 882a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 883a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 884a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_b(cpu_env, twd, tws, twt); 885a2b0a27dSPhilippe Mathieu-Daudé break; 886a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 887a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_h(cpu_env, twd, tws, twt); 888a2b0a27dSPhilippe Mathieu-Daudé break; 889a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 890a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_w(cpu_env, twd, tws, twt); 891a2b0a27dSPhilippe Mathieu-Daudé break; 892a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 893a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_d(cpu_env, twd, tws, twt); 894a2b0a27dSPhilippe Mathieu-Daudé break; 895a2b0a27dSPhilippe Mathieu-Daudé } 896a2b0a27dSPhilippe Mathieu-Daudé break; 897a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLE_U_df: 898a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 899a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 900a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_b(cpu_env, twd, tws, twt); 901a2b0a27dSPhilippe Mathieu-Daudé break; 902a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 903a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_h(cpu_env, twd, tws, twt); 904a2b0a27dSPhilippe Mathieu-Daudé break; 905a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 906a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_w(cpu_env, twd, tws, twt); 907a2b0a27dSPhilippe Mathieu-Daudé break; 908a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 909a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_d(cpu_env, twd, tws, twt); 910a2b0a27dSPhilippe Mathieu-Daudé break; 911a2b0a27dSPhilippe Mathieu-Daudé } 912a2b0a27dSPhilippe Mathieu-Daudé break; 913a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLT_S_df: 914a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 915a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 916a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_b(cpu_env, twd, tws, twt); 917a2b0a27dSPhilippe Mathieu-Daudé break; 918a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 919a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_h(cpu_env, twd, tws, twt); 920a2b0a27dSPhilippe Mathieu-Daudé break; 921a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 922a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_w(cpu_env, twd, tws, twt); 923a2b0a27dSPhilippe Mathieu-Daudé break; 924a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 925a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_d(cpu_env, twd, tws, twt); 926a2b0a27dSPhilippe Mathieu-Daudé break; 927a2b0a27dSPhilippe Mathieu-Daudé } 928a2b0a27dSPhilippe Mathieu-Daudé break; 929a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLT_U_df: 930a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 931a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 932a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_b(cpu_env, twd, tws, twt); 933a2b0a27dSPhilippe Mathieu-Daudé break; 934a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 935a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_h(cpu_env, twd, tws, twt); 936a2b0a27dSPhilippe Mathieu-Daudé break; 937a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 938a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_w(cpu_env, twd, tws, twt); 939a2b0a27dSPhilippe Mathieu-Daudé break; 940a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 941a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_d(cpu_env, twd, tws, twt); 942a2b0a27dSPhilippe Mathieu-Daudé break; 943a2b0a27dSPhilippe Mathieu-Daudé } 944a2b0a27dSPhilippe Mathieu-Daudé break; 945a2b0a27dSPhilippe Mathieu-Daudé case OPC_DIV_S_df: 946a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 947a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 948a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_b(cpu_env, twd, tws, twt); 949a2b0a27dSPhilippe Mathieu-Daudé break; 950a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 951a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_h(cpu_env, twd, tws, twt); 952a2b0a27dSPhilippe Mathieu-Daudé break; 953a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 954a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_w(cpu_env, twd, tws, twt); 955a2b0a27dSPhilippe Mathieu-Daudé break; 956a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 957a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_d(cpu_env, twd, tws, twt); 958a2b0a27dSPhilippe Mathieu-Daudé break; 959a2b0a27dSPhilippe Mathieu-Daudé } 960a2b0a27dSPhilippe Mathieu-Daudé break; 961a2b0a27dSPhilippe Mathieu-Daudé case OPC_DIV_U_df: 962a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 963a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 964a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_b(cpu_env, twd, tws, twt); 965a2b0a27dSPhilippe Mathieu-Daudé break; 966a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 967a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_h(cpu_env, twd, tws, twt); 968a2b0a27dSPhilippe Mathieu-Daudé break; 969a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 970a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_w(cpu_env, twd, tws, twt); 971a2b0a27dSPhilippe Mathieu-Daudé break; 972a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 973a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_d(cpu_env, twd, tws, twt); 974a2b0a27dSPhilippe Mathieu-Daudé break; 975a2b0a27dSPhilippe Mathieu-Daudé } 976a2b0a27dSPhilippe Mathieu-Daudé break; 977a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_A_df: 978a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 979a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 980a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_b(cpu_env, twd, tws, twt); 981a2b0a27dSPhilippe Mathieu-Daudé break; 982a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 983a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_h(cpu_env, twd, tws, twt); 984a2b0a27dSPhilippe Mathieu-Daudé break; 985a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 986a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_w(cpu_env, twd, tws, twt); 987a2b0a27dSPhilippe Mathieu-Daudé break; 988a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 989a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_d(cpu_env, twd, tws, twt); 990a2b0a27dSPhilippe Mathieu-Daudé break; 991a2b0a27dSPhilippe Mathieu-Daudé } 992a2b0a27dSPhilippe Mathieu-Daudé break; 993a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_S_df: 994a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 995a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 996a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_b(cpu_env, twd, tws, twt); 997a2b0a27dSPhilippe Mathieu-Daudé break; 998a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 999a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_h(cpu_env, twd, tws, twt); 1000a2b0a27dSPhilippe Mathieu-Daudé break; 1001a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1002a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_w(cpu_env, twd, tws, twt); 1003a2b0a27dSPhilippe Mathieu-Daudé break; 1004a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1005a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_d(cpu_env, twd, tws, twt); 1006a2b0a27dSPhilippe Mathieu-Daudé break; 1007a2b0a27dSPhilippe Mathieu-Daudé } 1008a2b0a27dSPhilippe Mathieu-Daudé break; 1009a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_U_df: 1010a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1011a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1012a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_b(cpu_env, twd, tws, twt); 1013a2b0a27dSPhilippe Mathieu-Daudé break; 1014a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1015a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_h(cpu_env, twd, tws, twt); 1016a2b0a27dSPhilippe Mathieu-Daudé break; 1017a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1018a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_w(cpu_env, twd, tws, twt); 1019a2b0a27dSPhilippe Mathieu-Daudé break; 1020a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1021a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_d(cpu_env, twd, tws, twt); 1022a2b0a27dSPhilippe Mathieu-Daudé break; 1023a2b0a27dSPhilippe Mathieu-Daudé } 1024a2b0a27dSPhilippe Mathieu-Daudé break; 1025a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_A_df: 1026a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1027a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1028a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_b(cpu_env, twd, tws, twt); 1029a2b0a27dSPhilippe Mathieu-Daudé break; 1030a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1031a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_h(cpu_env, twd, tws, twt); 1032a2b0a27dSPhilippe Mathieu-Daudé break; 1033a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1034a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_w(cpu_env, twd, tws, twt); 1035a2b0a27dSPhilippe Mathieu-Daudé break; 1036a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1037a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_d(cpu_env, twd, tws, twt); 1038a2b0a27dSPhilippe Mathieu-Daudé break; 1039a2b0a27dSPhilippe Mathieu-Daudé } 1040a2b0a27dSPhilippe Mathieu-Daudé break; 1041a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_S_df: 1042a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1043a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1044a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_b(cpu_env, twd, tws, twt); 1045a2b0a27dSPhilippe Mathieu-Daudé break; 1046a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1047a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_h(cpu_env, twd, tws, twt); 1048a2b0a27dSPhilippe Mathieu-Daudé break; 1049a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1050a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_w(cpu_env, twd, tws, twt); 1051a2b0a27dSPhilippe Mathieu-Daudé break; 1052a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1053a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_d(cpu_env, twd, tws, twt); 1054a2b0a27dSPhilippe Mathieu-Daudé break; 1055a2b0a27dSPhilippe Mathieu-Daudé } 1056a2b0a27dSPhilippe Mathieu-Daudé break; 1057a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_U_df: 1058a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1059a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1060a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_b(cpu_env, twd, tws, twt); 1061a2b0a27dSPhilippe Mathieu-Daudé break; 1062a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1063a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_h(cpu_env, twd, tws, twt); 1064a2b0a27dSPhilippe Mathieu-Daudé break; 1065a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1066a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_w(cpu_env, twd, tws, twt); 1067a2b0a27dSPhilippe Mathieu-Daudé break; 1068a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1069a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_d(cpu_env, twd, tws, twt); 1070a2b0a27dSPhilippe Mathieu-Daudé break; 1071a2b0a27dSPhilippe Mathieu-Daudé } 1072a2b0a27dSPhilippe Mathieu-Daudé break; 1073a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOD_S_df: 1074a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1075a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1076a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_b(cpu_env, twd, tws, twt); 1077a2b0a27dSPhilippe Mathieu-Daudé break; 1078a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1079a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_h(cpu_env, twd, tws, twt); 1080a2b0a27dSPhilippe Mathieu-Daudé break; 1081a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1082a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_w(cpu_env, twd, tws, twt); 1083a2b0a27dSPhilippe Mathieu-Daudé break; 1084a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1085a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_d(cpu_env, twd, tws, twt); 1086a2b0a27dSPhilippe Mathieu-Daudé break; 1087a2b0a27dSPhilippe Mathieu-Daudé } 1088a2b0a27dSPhilippe Mathieu-Daudé break; 1089a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOD_U_df: 1090a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1091a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1092a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_b(cpu_env, twd, tws, twt); 1093a2b0a27dSPhilippe Mathieu-Daudé break; 1094a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1095a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_h(cpu_env, twd, tws, twt); 1096a2b0a27dSPhilippe Mathieu-Daudé break; 1097a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1098a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_w(cpu_env, twd, tws, twt); 1099a2b0a27dSPhilippe Mathieu-Daudé break; 1100a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1101a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_d(cpu_env, twd, tws, twt); 1102a2b0a27dSPhilippe Mathieu-Daudé break; 1103a2b0a27dSPhilippe Mathieu-Daudé } 1104a2b0a27dSPhilippe Mathieu-Daudé break; 1105a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADDV_df: 1106a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1107a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1108a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_b(cpu_env, twd, tws, twt); 1109a2b0a27dSPhilippe Mathieu-Daudé break; 1110a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1111a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_h(cpu_env, twd, tws, twt); 1112a2b0a27dSPhilippe Mathieu-Daudé break; 1113a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1114a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_w(cpu_env, twd, tws, twt); 1115a2b0a27dSPhilippe Mathieu-Daudé break; 1116a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1117a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_d(cpu_env, twd, tws, twt); 1118a2b0a27dSPhilippe Mathieu-Daudé break; 1119a2b0a27dSPhilippe Mathieu-Daudé } 1120a2b0a27dSPhilippe Mathieu-Daudé break; 1121a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUBV_df: 1122a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1123a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1124a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_b(cpu_env, twd, tws, twt); 1125a2b0a27dSPhilippe Mathieu-Daudé break; 1126a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1127a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_h(cpu_env, twd, tws, twt); 1128a2b0a27dSPhilippe Mathieu-Daudé break; 1129a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1130a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_w(cpu_env, twd, tws, twt); 1131a2b0a27dSPhilippe Mathieu-Daudé break; 1132a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1133a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_d(cpu_env, twd, tws, twt); 1134a2b0a27dSPhilippe Mathieu-Daudé break; 1135a2b0a27dSPhilippe Mathieu-Daudé } 1136a2b0a27dSPhilippe Mathieu-Daudé break; 1137a2b0a27dSPhilippe Mathieu-Daudé case OPC_ASUB_S_df: 1138a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1139a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1140a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_b(cpu_env, twd, tws, twt); 1141a2b0a27dSPhilippe Mathieu-Daudé break; 1142a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1143a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_h(cpu_env, twd, tws, twt); 1144a2b0a27dSPhilippe Mathieu-Daudé break; 1145a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1146a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_w(cpu_env, twd, tws, twt); 1147a2b0a27dSPhilippe Mathieu-Daudé break; 1148a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1149a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_d(cpu_env, twd, tws, twt); 1150a2b0a27dSPhilippe Mathieu-Daudé break; 1151a2b0a27dSPhilippe Mathieu-Daudé } 1152a2b0a27dSPhilippe Mathieu-Daudé break; 1153a2b0a27dSPhilippe Mathieu-Daudé case OPC_ASUB_U_df: 1154a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1155a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1156a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_b(cpu_env, twd, tws, twt); 1157a2b0a27dSPhilippe Mathieu-Daudé break; 1158a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1159a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_h(cpu_env, twd, tws, twt); 1160a2b0a27dSPhilippe Mathieu-Daudé break; 1161a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1162a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_w(cpu_env, twd, tws, twt); 1163a2b0a27dSPhilippe Mathieu-Daudé break; 1164a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1165a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_d(cpu_env, twd, tws, twt); 1166a2b0a27dSPhilippe Mathieu-Daudé break; 1167a2b0a27dSPhilippe Mathieu-Daudé } 1168a2b0a27dSPhilippe Mathieu-Daudé break; 1169a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVEV_df: 1170a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1171a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1172a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_b(cpu_env, twd, tws, twt); 1173a2b0a27dSPhilippe Mathieu-Daudé break; 1174a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1175a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_h(cpu_env, twd, tws, twt); 1176a2b0a27dSPhilippe Mathieu-Daudé break; 1177a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1178a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_w(cpu_env, twd, tws, twt); 1179a2b0a27dSPhilippe Mathieu-Daudé break; 1180a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1181a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_d(cpu_env, twd, tws, twt); 1182a2b0a27dSPhilippe Mathieu-Daudé break; 1183a2b0a27dSPhilippe Mathieu-Daudé } 1184a2b0a27dSPhilippe Mathieu-Daudé break; 1185a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVOD_df: 1186a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1187a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1188a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_b(cpu_env, twd, tws, twt); 1189a2b0a27dSPhilippe Mathieu-Daudé break; 1190a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1191a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_h(cpu_env, twd, tws, twt); 1192a2b0a27dSPhilippe Mathieu-Daudé break; 1193a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1194a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_w(cpu_env, twd, tws, twt); 1195a2b0a27dSPhilippe Mathieu-Daudé break; 1196a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1197a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_d(cpu_env, twd, tws, twt); 1198a2b0a27dSPhilippe Mathieu-Daudé break; 1199a2b0a27dSPhilippe Mathieu-Daudé } 1200a2b0a27dSPhilippe Mathieu-Daudé break; 1201a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVL_df: 1202a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1203a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1204a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_b(cpu_env, twd, tws, twt); 1205a2b0a27dSPhilippe Mathieu-Daudé break; 1206a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1207a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_h(cpu_env, twd, tws, twt); 1208a2b0a27dSPhilippe Mathieu-Daudé break; 1209a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1210a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_w(cpu_env, twd, tws, twt); 1211a2b0a27dSPhilippe Mathieu-Daudé break; 1212a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1213a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_d(cpu_env, twd, tws, twt); 1214a2b0a27dSPhilippe Mathieu-Daudé break; 1215a2b0a27dSPhilippe Mathieu-Daudé } 1216a2b0a27dSPhilippe Mathieu-Daudé break; 1217a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVR_df: 1218a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1219a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1220a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_b(cpu_env, twd, tws, twt); 1221a2b0a27dSPhilippe Mathieu-Daudé break; 1222a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1223a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_h(cpu_env, twd, tws, twt); 1224a2b0a27dSPhilippe Mathieu-Daudé break; 1225a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1226a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_w(cpu_env, twd, tws, twt); 1227a2b0a27dSPhilippe Mathieu-Daudé break; 1228a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1229a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_d(cpu_env, twd, tws, twt); 1230a2b0a27dSPhilippe Mathieu-Daudé break; 1231a2b0a27dSPhilippe Mathieu-Daudé } 1232a2b0a27dSPhilippe Mathieu-Daudé break; 1233a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCKEV_df: 1234a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1235a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1236a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_b(cpu_env, twd, tws, twt); 1237a2b0a27dSPhilippe Mathieu-Daudé break; 1238a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1239a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_h(cpu_env, twd, tws, twt); 1240a2b0a27dSPhilippe Mathieu-Daudé break; 1241a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1242a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_w(cpu_env, twd, tws, twt); 1243a2b0a27dSPhilippe Mathieu-Daudé break; 1244a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1245a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_d(cpu_env, twd, tws, twt); 1246a2b0a27dSPhilippe Mathieu-Daudé break; 1247a2b0a27dSPhilippe Mathieu-Daudé } 1248a2b0a27dSPhilippe Mathieu-Daudé break; 1249a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCKOD_df: 1250a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1251a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1252a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_b(cpu_env, twd, tws, twt); 1253a2b0a27dSPhilippe Mathieu-Daudé break; 1254a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1255a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_h(cpu_env, twd, tws, twt); 1256a2b0a27dSPhilippe Mathieu-Daudé break; 1257a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1258a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_w(cpu_env, twd, tws, twt); 1259a2b0a27dSPhilippe Mathieu-Daudé break; 1260a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1261a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_d(cpu_env, twd, tws, twt); 1262a2b0a27dSPhilippe Mathieu-Daudé break; 1263a2b0a27dSPhilippe Mathieu-Daudé } 1264a2b0a27dSPhilippe Mathieu-Daudé break; 1265a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLL_df: 1266a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1267a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1268a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_b(cpu_env, twd, tws, twt); 1269a2b0a27dSPhilippe Mathieu-Daudé break; 1270a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1271a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_h(cpu_env, twd, tws, twt); 1272a2b0a27dSPhilippe Mathieu-Daudé break; 1273a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1274a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_w(cpu_env, twd, tws, twt); 1275a2b0a27dSPhilippe Mathieu-Daudé break; 1276a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1277a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_d(cpu_env, twd, tws, twt); 1278a2b0a27dSPhilippe Mathieu-Daudé break; 1279a2b0a27dSPhilippe Mathieu-Daudé } 1280a2b0a27dSPhilippe Mathieu-Daudé break; 1281a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRA_df: 1282a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1283a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1284a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_b(cpu_env, twd, tws, twt); 1285a2b0a27dSPhilippe Mathieu-Daudé break; 1286a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1287a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_h(cpu_env, twd, tws, twt); 1288a2b0a27dSPhilippe Mathieu-Daudé break; 1289a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1290a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_w(cpu_env, twd, tws, twt); 1291a2b0a27dSPhilippe Mathieu-Daudé break; 1292a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1293a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_d(cpu_env, twd, tws, twt); 1294a2b0a27dSPhilippe Mathieu-Daudé break; 1295a2b0a27dSPhilippe Mathieu-Daudé } 1296a2b0a27dSPhilippe Mathieu-Daudé break; 1297a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRAR_df: 1298a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1299a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1300a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_b(cpu_env, twd, tws, twt); 1301a2b0a27dSPhilippe Mathieu-Daudé break; 1302a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1303a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_h(cpu_env, twd, tws, twt); 1304a2b0a27dSPhilippe Mathieu-Daudé break; 1305a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1306a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_w(cpu_env, twd, tws, twt); 1307a2b0a27dSPhilippe Mathieu-Daudé break; 1308a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1309a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_d(cpu_env, twd, tws, twt); 1310a2b0a27dSPhilippe Mathieu-Daudé break; 1311a2b0a27dSPhilippe Mathieu-Daudé } 1312a2b0a27dSPhilippe Mathieu-Daudé break; 1313a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRL_df: 1314a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1315a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1316a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_b(cpu_env, twd, tws, twt); 1317a2b0a27dSPhilippe Mathieu-Daudé break; 1318a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1319a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_h(cpu_env, twd, tws, twt); 1320a2b0a27dSPhilippe Mathieu-Daudé break; 1321a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1322a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_w(cpu_env, twd, tws, twt); 1323a2b0a27dSPhilippe Mathieu-Daudé break; 1324a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1325a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_d(cpu_env, twd, tws, twt); 1326a2b0a27dSPhilippe Mathieu-Daudé break; 1327a2b0a27dSPhilippe Mathieu-Daudé } 1328a2b0a27dSPhilippe Mathieu-Daudé break; 1329a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLR_df: 1330a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1331a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1332a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_b(cpu_env, twd, tws, twt); 1333a2b0a27dSPhilippe Mathieu-Daudé break; 1334a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1335a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_h(cpu_env, twd, tws, twt); 1336a2b0a27dSPhilippe Mathieu-Daudé break; 1337a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1338a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_w(cpu_env, twd, tws, twt); 1339a2b0a27dSPhilippe Mathieu-Daudé break; 1340a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1341a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_d(cpu_env, twd, tws, twt); 1342a2b0a27dSPhilippe Mathieu-Daudé break; 1343a2b0a27dSPhilippe Mathieu-Daudé } 1344a2b0a27dSPhilippe Mathieu-Daudé break; 1345a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBS_S_df: 1346a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1347a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1348a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_b(cpu_env, twd, tws, twt); 1349a2b0a27dSPhilippe Mathieu-Daudé break; 1350a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1351a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_h(cpu_env, twd, tws, twt); 1352a2b0a27dSPhilippe Mathieu-Daudé break; 1353a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1354a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_w(cpu_env, twd, tws, twt); 1355a2b0a27dSPhilippe Mathieu-Daudé break; 1356a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1357a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_d(cpu_env, twd, tws, twt); 1358a2b0a27dSPhilippe Mathieu-Daudé break; 1359a2b0a27dSPhilippe Mathieu-Daudé } 1360a2b0a27dSPhilippe Mathieu-Daudé break; 1361a2b0a27dSPhilippe Mathieu-Daudé case OPC_MULV_df: 1362a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1363a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1364a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_b(cpu_env, twd, tws, twt); 1365a2b0a27dSPhilippe Mathieu-Daudé break; 1366a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1367a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_h(cpu_env, twd, tws, twt); 1368a2b0a27dSPhilippe Mathieu-Daudé break; 1369a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1370a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_w(cpu_env, twd, tws, twt); 1371a2b0a27dSPhilippe Mathieu-Daudé break; 1372a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1373a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_d(cpu_env, twd, tws, twt); 1374a2b0a27dSPhilippe Mathieu-Daudé break; 1375a2b0a27dSPhilippe Mathieu-Daudé } 1376a2b0a27dSPhilippe Mathieu-Daudé break; 1377a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLD_df: 1378a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sld_df(cpu_env, tdf, twd, tws, twt); 1379a2b0a27dSPhilippe Mathieu-Daudé break; 1380a2b0a27dSPhilippe Mathieu-Daudé case OPC_VSHF_df: 1381a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_vshf_df(cpu_env, tdf, twd, tws, twt); 1382a2b0a27dSPhilippe Mathieu-Daudé break; 1383a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBV_df: 1384a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1385a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1386a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_b(cpu_env, twd, tws, twt); 1387a2b0a27dSPhilippe Mathieu-Daudé break; 1388a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1389a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_h(cpu_env, twd, tws, twt); 1390a2b0a27dSPhilippe Mathieu-Daudé break; 1391a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1392a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_w(cpu_env, twd, tws, twt); 1393a2b0a27dSPhilippe Mathieu-Daudé break; 1394a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1395a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_d(cpu_env, twd, tws, twt); 1396a2b0a27dSPhilippe Mathieu-Daudé break; 1397a2b0a27dSPhilippe Mathieu-Daudé } 1398a2b0a27dSPhilippe Mathieu-Daudé break; 1399a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBS_U_df: 1400a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1401a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1402a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_b(cpu_env, twd, tws, twt); 1403a2b0a27dSPhilippe Mathieu-Daudé break; 1404a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1405a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_h(cpu_env, twd, tws, twt); 1406a2b0a27dSPhilippe Mathieu-Daudé break; 1407a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1408a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_w(cpu_env, twd, tws, twt); 1409a2b0a27dSPhilippe Mathieu-Daudé break; 1410a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1411a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_d(cpu_env, twd, tws, twt); 1412a2b0a27dSPhilippe Mathieu-Daudé break; 1413a2b0a27dSPhilippe Mathieu-Daudé } 1414a2b0a27dSPhilippe Mathieu-Daudé break; 1415a2b0a27dSPhilippe Mathieu-Daudé case OPC_SPLAT_df: 1416a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_splat_df(cpu_env, tdf, twd, tws, twt); 1417a2b0a27dSPhilippe Mathieu-Daudé break; 1418a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBSUS_U_df: 1419a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1420a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1421a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_b(cpu_env, twd, tws, twt); 1422a2b0a27dSPhilippe Mathieu-Daudé break; 1423a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1424a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_h(cpu_env, twd, tws, twt); 1425a2b0a27dSPhilippe Mathieu-Daudé break; 1426a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1427a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_w(cpu_env, twd, tws, twt); 1428a2b0a27dSPhilippe Mathieu-Daudé break; 1429a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1430a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_d(cpu_env, twd, tws, twt); 1431a2b0a27dSPhilippe Mathieu-Daudé break; 1432a2b0a27dSPhilippe Mathieu-Daudé } 1433a2b0a27dSPhilippe Mathieu-Daudé break; 1434a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBSUU_S_df: 1435a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1436a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1437a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_b(cpu_env, twd, tws, twt); 1438a2b0a27dSPhilippe Mathieu-Daudé break; 1439a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1440a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_h(cpu_env, twd, tws, twt); 1441a2b0a27dSPhilippe Mathieu-Daudé break; 1442a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1443a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_w(cpu_env, twd, tws, twt); 1444a2b0a27dSPhilippe Mathieu-Daudé break; 1445a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1446a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_d(cpu_env, twd, tws, twt); 1447a2b0a27dSPhilippe Mathieu-Daudé break; 1448a2b0a27dSPhilippe Mathieu-Daudé } 1449a2b0a27dSPhilippe Mathieu-Daudé break; 1450a2b0a27dSPhilippe Mathieu-Daudé 1451a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_S_df: 1452a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_U_df: 1453a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_S_df: 1454a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_U_df: 1455a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_S_df: 1456a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_S_df: 1457a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_U_df: 1458a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_U_df: 1459a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_S_df: 1460a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_U_df: 1461a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_BYTE) { 1462a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1463a2b0a27dSPhilippe Mathieu-Daudé break; 1464a2b0a27dSPhilippe Mathieu-Daudé } 1465a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3R(ctx->opcode)) { 1466a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_S_df: 1467a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1468a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1469a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_h(cpu_env, twd, tws, twt); 1470a2b0a27dSPhilippe Mathieu-Daudé break; 1471a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1472a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_w(cpu_env, twd, tws, twt); 1473a2b0a27dSPhilippe Mathieu-Daudé break; 1474a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1475a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_d(cpu_env, twd, tws, twt); 1476a2b0a27dSPhilippe Mathieu-Daudé break; 1477a2b0a27dSPhilippe Mathieu-Daudé } 1478a2b0a27dSPhilippe Mathieu-Daudé break; 1479a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_U_df: 1480a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1481a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1482a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_h(cpu_env, twd, tws, twt); 1483a2b0a27dSPhilippe Mathieu-Daudé break; 1484a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1485a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_w(cpu_env, twd, tws, twt); 1486a2b0a27dSPhilippe Mathieu-Daudé break; 1487a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1488a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_d(cpu_env, twd, tws, twt); 1489a2b0a27dSPhilippe Mathieu-Daudé break; 1490a2b0a27dSPhilippe Mathieu-Daudé } 1491a2b0a27dSPhilippe Mathieu-Daudé break; 1492a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_S_df: 1493a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1494a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1495a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_h(cpu_env, twd, tws, twt); 1496a2b0a27dSPhilippe Mathieu-Daudé break; 1497a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1498a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_w(cpu_env, twd, tws, twt); 1499a2b0a27dSPhilippe Mathieu-Daudé break; 1500a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1501a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_d(cpu_env, twd, tws, twt); 1502a2b0a27dSPhilippe Mathieu-Daudé break; 1503a2b0a27dSPhilippe Mathieu-Daudé } 1504a2b0a27dSPhilippe Mathieu-Daudé break; 1505a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_U_df: 1506a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1507a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1508a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_h(cpu_env, twd, tws, twt); 1509a2b0a27dSPhilippe Mathieu-Daudé break; 1510a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1511a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_w(cpu_env, twd, tws, twt); 1512a2b0a27dSPhilippe Mathieu-Daudé break; 1513a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1514a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_d(cpu_env, twd, tws, twt); 1515a2b0a27dSPhilippe Mathieu-Daudé break; 1516a2b0a27dSPhilippe Mathieu-Daudé } 1517a2b0a27dSPhilippe Mathieu-Daudé break; 1518a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_S_df: 1519a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1520a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1521a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_h(cpu_env, twd, tws, twt); 1522a2b0a27dSPhilippe Mathieu-Daudé break; 1523a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1524a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_w(cpu_env, twd, tws, twt); 1525a2b0a27dSPhilippe Mathieu-Daudé break; 1526a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1527a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_d(cpu_env, twd, tws, twt); 1528a2b0a27dSPhilippe Mathieu-Daudé break; 1529a2b0a27dSPhilippe Mathieu-Daudé } 1530a2b0a27dSPhilippe Mathieu-Daudé break; 1531a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_U_df: 1532a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1533a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1534a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_h(cpu_env, twd, tws, twt); 1535a2b0a27dSPhilippe Mathieu-Daudé break; 1536a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1537a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_w(cpu_env, twd, tws, twt); 1538a2b0a27dSPhilippe Mathieu-Daudé break; 1539a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1540a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_d(cpu_env, twd, tws, twt); 1541a2b0a27dSPhilippe Mathieu-Daudé break; 1542a2b0a27dSPhilippe Mathieu-Daudé } 1543a2b0a27dSPhilippe Mathieu-Daudé break; 1544a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_S_df: 1545a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1546a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1547a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_h(cpu_env, twd, tws, twt); 1548a2b0a27dSPhilippe Mathieu-Daudé break; 1549a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1550a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_w(cpu_env, twd, tws, twt); 1551a2b0a27dSPhilippe Mathieu-Daudé break; 1552a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1553a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_d(cpu_env, twd, tws, twt); 1554a2b0a27dSPhilippe Mathieu-Daudé break; 1555a2b0a27dSPhilippe Mathieu-Daudé } 1556a2b0a27dSPhilippe Mathieu-Daudé break; 1557a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_U_df: 1558a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1559a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1560a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_h(cpu_env, twd, tws, twt); 1561a2b0a27dSPhilippe Mathieu-Daudé break; 1562a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1563a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_w(cpu_env, twd, tws, twt); 1564a2b0a27dSPhilippe Mathieu-Daudé break; 1565a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1566a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_d(cpu_env, twd, tws, twt); 1567a2b0a27dSPhilippe Mathieu-Daudé break; 1568a2b0a27dSPhilippe Mathieu-Daudé } 1569a2b0a27dSPhilippe Mathieu-Daudé break; 1570a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_S_df: 1571a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1572a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1573a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_h(cpu_env, twd, tws, twt); 1574a2b0a27dSPhilippe Mathieu-Daudé break; 1575a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1576a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_w(cpu_env, twd, tws, twt); 1577a2b0a27dSPhilippe Mathieu-Daudé break; 1578a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1579a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_d(cpu_env, twd, tws, twt); 1580a2b0a27dSPhilippe Mathieu-Daudé break; 1581a2b0a27dSPhilippe Mathieu-Daudé } 1582a2b0a27dSPhilippe Mathieu-Daudé break; 1583a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_U_df: 1584a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1585a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1586a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_h(cpu_env, twd, tws, twt); 1587a2b0a27dSPhilippe Mathieu-Daudé break; 1588a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1589a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_w(cpu_env, twd, tws, twt); 1590a2b0a27dSPhilippe Mathieu-Daudé break; 1591a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1592a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_d(cpu_env, twd, tws, twt); 1593a2b0a27dSPhilippe Mathieu-Daudé break; 1594a2b0a27dSPhilippe Mathieu-Daudé } 1595a2b0a27dSPhilippe Mathieu-Daudé break; 1596a2b0a27dSPhilippe Mathieu-Daudé } 1597a2b0a27dSPhilippe Mathieu-Daudé break; 1598a2b0a27dSPhilippe Mathieu-Daudé default: 1599a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1600a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1601a2b0a27dSPhilippe Mathieu-Daudé break; 1602a2b0a27dSPhilippe Mathieu-Daudé } 1603a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1604a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1605a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1606a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 1607a2b0a27dSPhilippe Mathieu-Daudé } 1608a2b0a27dSPhilippe Mathieu-Daudé 1609a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm_3e(DisasContext *ctx) 1610a2b0a27dSPhilippe Mathieu-Daudé { 1611a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_ELM_DF3E(op) (MASK_MSA_MINOR(op) | (op & (0x3FF << 16))) 1612a2b0a27dSPhilippe Mathieu-Daudé uint8_t source = (ctx->opcode >> 11) & 0x1f; 1613a2b0a27dSPhilippe Mathieu-Daudé uint8_t dest = (ctx->opcode >> 6) & 0x1f; 1614a2b0a27dSPhilippe Mathieu-Daudé TCGv telm = tcg_temp_new(); 1615a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tsr = tcg_const_i32(source); 1616a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdt = tcg_const_i32(dest); 1617a2b0a27dSPhilippe Mathieu-Daudé 1618a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM_DF3E(ctx->opcode)) { 1619a2b0a27dSPhilippe Mathieu-Daudé case OPC_CTCMSA: 1620a2b0a27dSPhilippe Mathieu-Daudé gen_load_gpr(telm, source); 1621a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ctcmsa(cpu_env, telm, tdt); 1622a2b0a27dSPhilippe Mathieu-Daudé break; 1623a2b0a27dSPhilippe Mathieu-Daudé case OPC_CFCMSA: 1624a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cfcmsa(telm, cpu_env, tsr); 1625a2b0a27dSPhilippe Mathieu-Daudé gen_store_gpr(telm, dest); 1626a2b0a27dSPhilippe Mathieu-Daudé break; 1627a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOVE_V: 1628a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_move_v(cpu_env, tdt, tsr); 1629a2b0a27dSPhilippe Mathieu-Daudé break; 1630a2b0a27dSPhilippe Mathieu-Daudé default: 1631a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1632a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1633a2b0a27dSPhilippe Mathieu-Daudé break; 1634a2b0a27dSPhilippe Mathieu-Daudé } 1635a2b0a27dSPhilippe Mathieu-Daudé 1636a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free(telm); 1637a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdt); 1638a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tsr); 1639a2b0a27dSPhilippe Mathieu-Daudé } 1640a2b0a27dSPhilippe Mathieu-Daudé 1641a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm_df(DisasContext *ctx, uint32_t df, uint32_t n) 1642a2b0a27dSPhilippe Mathieu-Daudé { 1643a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_ELM(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) 1644a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1645a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1646a2b0a27dSPhilippe Mathieu-Daudé 1647a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1648a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1649a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tn = tcg_const_i32(n); 16502b537a3dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_constant_i32(df); 1651a2b0a27dSPhilippe Mathieu-Daudé 1652a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM(ctx->opcode)) { 1653a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLDI_df: 1654a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sldi_df(cpu_env, tdf, twd, tws, tn); 1655a2b0a27dSPhilippe Mathieu-Daudé break; 1656a2b0a27dSPhilippe Mathieu-Daudé case OPC_SPLATI_df: 1657a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_splati_df(cpu_env, tdf, twd, tws, tn); 1658a2b0a27dSPhilippe Mathieu-Daudé break; 1659a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSVE_df: 1660a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insve_df(cpu_env, tdf, twd, tws, tn); 1661a2b0a27dSPhilippe Mathieu-Daudé break; 1662a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_S_df: 1663a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_U_df: 1664a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSERT_df: 1665a2b0a27dSPhilippe Mathieu-Daudé #if !defined(TARGET_MIPS64) 1666a2b0a27dSPhilippe Mathieu-Daudé /* Double format valid only for MIPS64 */ 1667a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 1668a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1669a2b0a27dSPhilippe Mathieu-Daudé break; 1670a2b0a27dSPhilippe Mathieu-Daudé } 1671a2b0a27dSPhilippe Mathieu-Daudé if ((MASK_MSA_ELM(ctx->opcode) == OPC_COPY_U_df) && 1672a2b0a27dSPhilippe Mathieu-Daudé (df == DF_WORD)) { 1673a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1674a2b0a27dSPhilippe Mathieu-Daudé break; 1675a2b0a27dSPhilippe Mathieu-Daudé } 1676a2b0a27dSPhilippe Mathieu-Daudé #endif 1677a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM(ctx->opcode)) { 1678a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_S_df: 1679a2b0a27dSPhilippe Mathieu-Daudé if (likely(wd != 0)) { 1680a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1681a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1682a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_b(cpu_env, twd, tws, tn); 1683a2b0a27dSPhilippe Mathieu-Daudé break; 1684a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1685a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_h(cpu_env, twd, tws, tn); 1686a2b0a27dSPhilippe Mathieu-Daudé break; 1687a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1688a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_w(cpu_env, twd, tws, tn); 1689a2b0a27dSPhilippe Mathieu-Daudé break; 1690a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1691a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1692a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_d(cpu_env, twd, tws, tn); 1693a2b0a27dSPhilippe Mathieu-Daudé break; 1694a2b0a27dSPhilippe Mathieu-Daudé #endif 1695a2b0a27dSPhilippe Mathieu-Daudé default: 1696a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1697a2b0a27dSPhilippe Mathieu-Daudé } 1698a2b0a27dSPhilippe Mathieu-Daudé } 1699a2b0a27dSPhilippe Mathieu-Daudé break; 1700a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_U_df: 1701a2b0a27dSPhilippe Mathieu-Daudé if (likely(wd != 0)) { 1702a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1703a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1704a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_b(cpu_env, twd, tws, tn); 1705a2b0a27dSPhilippe Mathieu-Daudé break; 1706a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1707a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_h(cpu_env, twd, tws, tn); 1708a2b0a27dSPhilippe Mathieu-Daudé break; 1709a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1710a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1711a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_w(cpu_env, twd, tws, tn); 1712a2b0a27dSPhilippe Mathieu-Daudé break; 1713a2b0a27dSPhilippe Mathieu-Daudé #endif 1714a2b0a27dSPhilippe Mathieu-Daudé default: 1715a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1716a2b0a27dSPhilippe Mathieu-Daudé } 1717a2b0a27dSPhilippe Mathieu-Daudé } 1718a2b0a27dSPhilippe Mathieu-Daudé break; 1719a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSERT_df: 1720a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1721a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1722a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_b(cpu_env, twd, tws, tn); 1723a2b0a27dSPhilippe Mathieu-Daudé break; 1724a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1725a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_h(cpu_env, twd, tws, tn); 1726a2b0a27dSPhilippe Mathieu-Daudé break; 1727a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1728a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_w(cpu_env, twd, tws, tn); 1729a2b0a27dSPhilippe Mathieu-Daudé break; 1730a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1731a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1732a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_d(cpu_env, twd, tws, tn); 1733a2b0a27dSPhilippe Mathieu-Daudé break; 1734a2b0a27dSPhilippe Mathieu-Daudé #endif 1735a2b0a27dSPhilippe Mathieu-Daudé default: 1736a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1737a2b0a27dSPhilippe Mathieu-Daudé } 1738a2b0a27dSPhilippe Mathieu-Daudé break; 1739a2b0a27dSPhilippe Mathieu-Daudé } 1740a2b0a27dSPhilippe Mathieu-Daudé break; 1741a2b0a27dSPhilippe Mathieu-Daudé default: 1742a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1743a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1744a2b0a27dSPhilippe Mathieu-Daudé } 1745a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1746a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1747a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tn); 1748a2b0a27dSPhilippe Mathieu-Daudé } 1749a2b0a27dSPhilippe Mathieu-Daudé 1750a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm(DisasContext *ctx) 1751a2b0a27dSPhilippe Mathieu-Daudé { 1752a2b0a27dSPhilippe Mathieu-Daudé uint8_t dfn = (ctx->opcode >> 16) & 0x3f; 1753a2b0a27dSPhilippe Mathieu-Daudé uint32_t df = 0, n = 0; 1754a2b0a27dSPhilippe Mathieu-Daudé 1755a2b0a27dSPhilippe Mathieu-Daudé if ((dfn & 0x30) == 0x00) { 1756a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x0f; 1757a2b0a27dSPhilippe Mathieu-Daudé df = DF_BYTE; 1758a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x38) == 0x20) { 1759a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x07; 1760a2b0a27dSPhilippe Mathieu-Daudé df = DF_HALF; 1761a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x3c) == 0x30) { 1762a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x03; 1763a2b0a27dSPhilippe Mathieu-Daudé df = DF_WORD; 1764a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x3e) == 0x38) { 1765a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x01; 1766a2b0a27dSPhilippe Mathieu-Daudé df = DF_DOUBLE; 1767a2b0a27dSPhilippe Mathieu-Daudé } else if (dfn == 0x3E) { 1768a2b0a27dSPhilippe Mathieu-Daudé /* CTCMSA, CFCMSA, MOVE.V */ 1769a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm_3e(ctx); 1770a2b0a27dSPhilippe Mathieu-Daudé return; 1771a2b0a27dSPhilippe Mathieu-Daudé } else { 1772a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1773a2b0a27dSPhilippe Mathieu-Daudé return; 1774a2b0a27dSPhilippe Mathieu-Daudé } 1775a2b0a27dSPhilippe Mathieu-Daudé 1776a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm_df(ctx, df, n); 1777a2b0a27dSPhilippe Mathieu-Daudé } 1778a2b0a27dSPhilippe Mathieu-Daudé 1779a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_3rf(DisasContext *ctx) 1780a2b0a27dSPhilippe Mathieu-Daudé { 1781a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_3RF(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) 1782a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 21) & 0x1; 1783a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 1784a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1785a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1786a2b0a27dSPhilippe Mathieu-Daudé 1787a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1788a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1789a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 17901b5c0a11SPhilippe Mathieu-Daudé TCGv_i32 tdf; 1791a2b0a27dSPhilippe Mathieu-Daudé 1792a2b0a27dSPhilippe Mathieu-Daudé /* adjust df value for floating-point instruction */ 17931b5c0a11SPhilippe Mathieu-Daudé switch (MASK_MSA_3RF(ctx->opcode)) { 17941b5c0a11SPhilippe Mathieu-Daudé case OPC_MUL_Q_df: 17951b5c0a11SPhilippe Mathieu-Daudé case OPC_MADD_Q_df: 17961b5c0a11SPhilippe Mathieu-Daudé case OPC_MSUB_Q_df: 17971b5c0a11SPhilippe Mathieu-Daudé case OPC_MULR_Q_df: 17981b5c0a11SPhilippe Mathieu-Daudé case OPC_MADDR_Q_df: 17991b5c0a11SPhilippe Mathieu-Daudé case OPC_MSUBR_Q_df: 18007e9db46dSPhilippe Mathieu-Daudé tdf = tcg_constant_i32(DF_HALF + df); 18011b5c0a11SPhilippe Mathieu-Daudé break; 18021b5c0a11SPhilippe Mathieu-Daudé default: 18037e9db46dSPhilippe Mathieu-Daudé tdf = tcg_constant_i32(DF_WORD + df); 18041b5c0a11SPhilippe Mathieu-Daudé break; 18051b5c0a11SPhilippe Mathieu-Daudé } 1806a2b0a27dSPhilippe Mathieu-Daudé 1807a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3RF(ctx->opcode)) { 1808a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCAF_df: 1809a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcaf_df(cpu_env, tdf, twd, tws, twt); 1810a2b0a27dSPhilippe Mathieu-Daudé break; 1811a2b0a27dSPhilippe Mathieu-Daudé case OPC_FADD_df: 1812a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fadd_df(cpu_env, tdf, twd, tws, twt); 1813a2b0a27dSPhilippe Mathieu-Daudé break; 1814a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUN_df: 1815a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcun_df(cpu_env, tdf, twd, tws, twt); 1816a2b0a27dSPhilippe Mathieu-Daudé break; 1817a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUB_df: 1818a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsub_df(cpu_env, tdf, twd, tws, twt); 1819a2b0a27dSPhilippe Mathieu-Daudé break; 1820a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCOR_df: 1821a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcor_df(cpu_env, tdf, twd, tws, twt); 1822a2b0a27dSPhilippe Mathieu-Daudé break; 1823a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCEQ_df: 1824a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fceq_df(cpu_env, tdf, twd, tws, twt); 1825a2b0a27dSPhilippe Mathieu-Daudé break; 1826a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMUL_df: 1827a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmul_df(cpu_env, tdf, twd, tws, twt); 1828a2b0a27dSPhilippe Mathieu-Daudé break; 1829a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUNE_df: 1830a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcune_df(cpu_env, tdf, twd, tws, twt); 1831a2b0a27dSPhilippe Mathieu-Daudé break; 1832a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUEQ_df: 1833a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcueq_df(cpu_env, tdf, twd, tws, twt); 1834a2b0a27dSPhilippe Mathieu-Daudé break; 1835a2b0a27dSPhilippe Mathieu-Daudé case OPC_FDIV_df: 1836a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fdiv_df(cpu_env, tdf, twd, tws, twt); 1837a2b0a27dSPhilippe Mathieu-Daudé break; 1838a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCNE_df: 1839a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcne_df(cpu_env, tdf, twd, tws, twt); 1840a2b0a27dSPhilippe Mathieu-Daudé break; 1841a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLT_df: 1842a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fclt_df(cpu_env, tdf, twd, tws, twt); 1843a2b0a27dSPhilippe Mathieu-Daudé break; 1844a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMADD_df: 1845a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmadd_df(cpu_env, tdf, twd, tws, twt); 1846a2b0a27dSPhilippe Mathieu-Daudé break; 1847a2b0a27dSPhilippe Mathieu-Daudé case OPC_MUL_Q_df: 1848a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mul_q_df(cpu_env, tdf, twd, tws, twt); 1849a2b0a27dSPhilippe Mathieu-Daudé break; 1850a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCULT_df: 1851a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcult_df(cpu_env, tdf, twd, tws, twt); 1852a2b0a27dSPhilippe Mathieu-Daudé break; 1853a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMSUB_df: 1854a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmsub_df(cpu_env, tdf, twd, tws, twt); 1855a2b0a27dSPhilippe Mathieu-Daudé break; 1856a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADD_Q_df: 1857a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_madd_q_df(cpu_env, tdf, twd, tws, twt); 1858a2b0a27dSPhilippe Mathieu-Daudé break; 1859a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLE_df: 1860a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcle_df(cpu_env, tdf, twd, tws, twt); 1861a2b0a27dSPhilippe Mathieu-Daudé break; 1862a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUB_Q_df: 1863a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msub_q_df(cpu_env, tdf, twd, tws, twt); 1864a2b0a27dSPhilippe Mathieu-Daudé break; 1865a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCULE_df: 1866a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcule_df(cpu_env, tdf, twd, tws, twt); 1867a2b0a27dSPhilippe Mathieu-Daudé break; 1868a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXP2_df: 1869a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexp2_df(cpu_env, tdf, twd, tws, twt); 1870a2b0a27dSPhilippe Mathieu-Daudé break; 1871a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSAF_df: 1872a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsaf_df(cpu_env, tdf, twd, tws, twt); 1873a2b0a27dSPhilippe Mathieu-Daudé break; 1874a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXDO_df: 1875a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexdo_df(cpu_env, tdf, twd, tws, twt); 1876a2b0a27dSPhilippe Mathieu-Daudé break; 1877a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUN_df: 1878a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsun_df(cpu_env, tdf, twd, tws, twt); 1879a2b0a27dSPhilippe Mathieu-Daudé break; 1880a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSOR_df: 1881a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsor_df(cpu_env, tdf, twd, tws, twt); 1882a2b0a27dSPhilippe Mathieu-Daudé break; 1883a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSEQ_df: 1884a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fseq_df(cpu_env, tdf, twd, tws, twt); 1885a2b0a27dSPhilippe Mathieu-Daudé break; 1886a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTQ_df: 1887a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftq_df(cpu_env, tdf, twd, tws, twt); 1888a2b0a27dSPhilippe Mathieu-Daudé break; 1889a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUNE_df: 1890a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsune_df(cpu_env, tdf, twd, tws, twt); 1891a2b0a27dSPhilippe Mathieu-Daudé break; 1892a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUEQ_df: 1893a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsueq_df(cpu_env, tdf, twd, tws, twt); 1894a2b0a27dSPhilippe Mathieu-Daudé break; 1895a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSNE_df: 1896a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsne_df(cpu_env, tdf, twd, tws, twt); 1897a2b0a27dSPhilippe Mathieu-Daudé break; 1898a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSLT_df: 1899a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fslt_df(cpu_env, tdf, twd, tws, twt); 1900a2b0a27dSPhilippe Mathieu-Daudé break; 1901a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMIN_df: 1902a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmin_df(cpu_env, tdf, twd, tws, twt); 1903a2b0a27dSPhilippe Mathieu-Daudé break; 1904a2b0a27dSPhilippe Mathieu-Daudé case OPC_MULR_Q_df: 1905a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulr_q_df(cpu_env, tdf, twd, tws, twt); 1906a2b0a27dSPhilippe Mathieu-Daudé break; 1907a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSULT_df: 1908a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsult_df(cpu_env, tdf, twd, tws, twt); 1909a2b0a27dSPhilippe Mathieu-Daudé break; 1910a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMIN_A_df: 1911a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmin_a_df(cpu_env, tdf, twd, tws, twt); 1912a2b0a27dSPhilippe Mathieu-Daudé break; 1913a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADDR_Q_df: 1914a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddr_q_df(cpu_env, tdf, twd, tws, twt); 1915a2b0a27dSPhilippe Mathieu-Daudé break; 1916a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSLE_df: 1917a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsle_df(cpu_env, tdf, twd, tws, twt); 1918a2b0a27dSPhilippe Mathieu-Daudé break; 1919a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMAX_df: 1920a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmax_df(cpu_env, tdf, twd, tws, twt); 1921a2b0a27dSPhilippe Mathieu-Daudé break; 1922a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUBR_Q_df: 1923a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubr_q_df(cpu_env, tdf, twd, tws, twt); 1924a2b0a27dSPhilippe Mathieu-Daudé break; 1925a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSULE_df: 1926a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsule_df(cpu_env, tdf, twd, tws, twt); 1927a2b0a27dSPhilippe Mathieu-Daudé break; 1928a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMAX_A_df: 1929a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmax_a_df(cpu_env, tdf, twd, tws, twt); 1930a2b0a27dSPhilippe Mathieu-Daudé break; 1931a2b0a27dSPhilippe Mathieu-Daudé default: 1932a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1933a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1934a2b0a27dSPhilippe Mathieu-Daudé break; 1935a2b0a27dSPhilippe Mathieu-Daudé } 1936a2b0a27dSPhilippe Mathieu-Daudé 1937a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1938a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1939a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1940a2b0a27dSPhilippe Mathieu-Daudé } 1941a2b0a27dSPhilippe Mathieu-Daudé 1942a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_2r(DisasContext *ctx) 1943a2b0a27dSPhilippe Mathieu-Daudé { 1944a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_2R(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ 1945a2b0a27dSPhilippe Mathieu-Daudé (op & (0x7 << 18))) 1946a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1947a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1948a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 16) & 0x3; 1949a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1950a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1951a2b0a27dSPhilippe Mathieu-Daudé 1952a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_2R(ctx->opcode)) { 1953a2b0a27dSPhilippe Mathieu-Daudé case OPC_FILL_df: 1954a2b0a27dSPhilippe Mathieu-Daudé #if !defined(TARGET_MIPS64) 1955a2b0a27dSPhilippe Mathieu-Daudé /* Double format valid only for MIPS64 */ 1956a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 1957a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1958a2b0a27dSPhilippe Mathieu-Daudé break; 1959a2b0a27dSPhilippe Mathieu-Daudé } 1960a2b0a27dSPhilippe Mathieu-Daudé #endif 196174341af7SPhilippe Mathieu-Daudé gen_helper_msa_fill_df(cpu_env, tcg_constant_i32(df), 196274341af7SPhilippe Mathieu-Daudé twd, tws); /* trs */ 1963a2b0a27dSPhilippe Mathieu-Daudé break; 1964a2b0a27dSPhilippe Mathieu-Daudé case OPC_NLOC_df: 1965a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1966a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1967a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_b(cpu_env, twd, tws); 1968a2b0a27dSPhilippe Mathieu-Daudé break; 1969a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1970a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_h(cpu_env, twd, tws); 1971a2b0a27dSPhilippe Mathieu-Daudé break; 1972a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1973a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_w(cpu_env, twd, tws); 1974a2b0a27dSPhilippe Mathieu-Daudé break; 1975a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1976a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_d(cpu_env, twd, tws); 1977a2b0a27dSPhilippe Mathieu-Daudé break; 1978a2b0a27dSPhilippe Mathieu-Daudé } 1979a2b0a27dSPhilippe Mathieu-Daudé break; 1980a2b0a27dSPhilippe Mathieu-Daudé case OPC_NLZC_df: 1981a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1982a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1983a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_b(cpu_env, twd, tws); 1984a2b0a27dSPhilippe Mathieu-Daudé break; 1985a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1986a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_h(cpu_env, twd, tws); 1987a2b0a27dSPhilippe Mathieu-Daudé break; 1988a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1989a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_w(cpu_env, twd, tws); 1990a2b0a27dSPhilippe Mathieu-Daudé break; 1991a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1992a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_d(cpu_env, twd, tws); 1993a2b0a27dSPhilippe Mathieu-Daudé break; 1994a2b0a27dSPhilippe Mathieu-Daudé } 1995a2b0a27dSPhilippe Mathieu-Daudé break; 1996a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCNT_df: 1997a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1998a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1999a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_b(cpu_env, twd, tws); 2000a2b0a27dSPhilippe Mathieu-Daudé break; 2001a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 2002a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_h(cpu_env, twd, tws); 2003a2b0a27dSPhilippe Mathieu-Daudé break; 2004a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 2005a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_w(cpu_env, twd, tws); 2006a2b0a27dSPhilippe Mathieu-Daudé break; 2007a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 2008a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_d(cpu_env, twd, tws); 2009a2b0a27dSPhilippe Mathieu-Daudé break; 2010a2b0a27dSPhilippe Mathieu-Daudé } 2011a2b0a27dSPhilippe Mathieu-Daudé break; 2012a2b0a27dSPhilippe Mathieu-Daudé default: 2013a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2014a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2015a2b0a27dSPhilippe Mathieu-Daudé break; 2016a2b0a27dSPhilippe Mathieu-Daudé } 2017a2b0a27dSPhilippe Mathieu-Daudé 2018a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2019a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 2020a2b0a27dSPhilippe Mathieu-Daudé } 2021a2b0a27dSPhilippe Mathieu-Daudé 2022a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_2rf(DisasContext *ctx) 2023a2b0a27dSPhilippe Mathieu-Daudé { 2024a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_2RF(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ 2025a2b0a27dSPhilippe Mathieu-Daudé (op & (0xf << 17))) 2026a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 2027a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 2028a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 16) & 0x1; 2029a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 2030a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 2031a2b0a27dSPhilippe Mathieu-Daudé /* adjust df value for floating-point instruction */ 20327e9db46dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_constant_i32(DF_WORD + df); 2033a2b0a27dSPhilippe Mathieu-Daudé 2034a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_2RF(ctx->opcode)) { 2035a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLASS_df: 2036a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fclass_df(cpu_env, tdf, twd, tws); 2037a2b0a27dSPhilippe Mathieu-Daudé break; 2038a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTRUNC_S_df: 2039a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftrunc_s_df(cpu_env, tdf, twd, tws); 2040a2b0a27dSPhilippe Mathieu-Daudé break; 2041a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTRUNC_U_df: 2042a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftrunc_u_df(cpu_env, tdf, twd, tws); 2043a2b0a27dSPhilippe Mathieu-Daudé break; 2044a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSQRT_df: 2045a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsqrt_df(cpu_env, tdf, twd, tws); 2046a2b0a27dSPhilippe Mathieu-Daudé break; 2047a2b0a27dSPhilippe Mathieu-Daudé case OPC_FRSQRT_df: 2048a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_frsqrt_df(cpu_env, tdf, twd, tws); 2049a2b0a27dSPhilippe Mathieu-Daudé break; 2050a2b0a27dSPhilippe Mathieu-Daudé case OPC_FRCP_df: 2051a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_frcp_df(cpu_env, tdf, twd, tws); 2052a2b0a27dSPhilippe Mathieu-Daudé break; 2053a2b0a27dSPhilippe Mathieu-Daudé case OPC_FRINT_df: 2054a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_frint_df(cpu_env, tdf, twd, tws); 2055a2b0a27dSPhilippe Mathieu-Daudé break; 2056a2b0a27dSPhilippe Mathieu-Daudé case OPC_FLOG2_df: 2057a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_flog2_df(cpu_env, tdf, twd, tws); 2058a2b0a27dSPhilippe Mathieu-Daudé break; 2059a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXUPL_df: 2060a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexupl_df(cpu_env, tdf, twd, tws); 2061a2b0a27dSPhilippe Mathieu-Daudé break; 2062a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXUPR_df: 2063a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexupr_df(cpu_env, tdf, twd, tws); 2064a2b0a27dSPhilippe Mathieu-Daudé break; 2065a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFQL_df: 2066a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffql_df(cpu_env, tdf, twd, tws); 2067a2b0a27dSPhilippe Mathieu-Daudé break; 2068a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFQR_df: 2069a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffqr_df(cpu_env, tdf, twd, tws); 2070a2b0a27dSPhilippe Mathieu-Daudé break; 2071a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTINT_S_df: 2072a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftint_s_df(cpu_env, tdf, twd, tws); 2073a2b0a27dSPhilippe Mathieu-Daudé break; 2074a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTINT_U_df: 2075a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftint_u_df(cpu_env, tdf, twd, tws); 2076a2b0a27dSPhilippe Mathieu-Daudé break; 2077a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFINT_S_df: 2078a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffint_s_df(cpu_env, tdf, twd, tws); 2079a2b0a27dSPhilippe Mathieu-Daudé break; 2080a2b0a27dSPhilippe Mathieu-Daudé case OPC_FFINT_U_df: 2081a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ffint_u_df(cpu_env, tdf, twd, tws); 2082a2b0a27dSPhilippe Mathieu-Daudé break; 2083a2b0a27dSPhilippe Mathieu-Daudé } 2084a2b0a27dSPhilippe Mathieu-Daudé 2085a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2086a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 2087a2b0a27dSPhilippe Mathieu-Daudé } 2088a2b0a27dSPhilippe Mathieu-Daudé 2089a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_vec_v(DisasContext *ctx) 2090a2b0a27dSPhilippe Mathieu-Daudé { 2091a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) 2092a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 2093a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 2094a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 2095a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 2096a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 2097a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 2098a2b0a27dSPhilippe Mathieu-Daudé 2099a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_VEC(ctx->opcode)) { 2100a2b0a27dSPhilippe Mathieu-Daudé case OPC_AND_V: 2101a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_and_v(cpu_env, twd, tws, twt); 2102a2b0a27dSPhilippe Mathieu-Daudé break; 2103a2b0a27dSPhilippe Mathieu-Daudé case OPC_OR_V: 2104a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_or_v(cpu_env, twd, tws, twt); 2105a2b0a27dSPhilippe Mathieu-Daudé break; 2106a2b0a27dSPhilippe Mathieu-Daudé case OPC_NOR_V: 2107a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nor_v(cpu_env, twd, tws, twt); 2108a2b0a27dSPhilippe Mathieu-Daudé break; 2109a2b0a27dSPhilippe Mathieu-Daudé case OPC_XOR_V: 2110a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_xor_v(cpu_env, twd, tws, twt); 2111a2b0a27dSPhilippe Mathieu-Daudé break; 2112a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZ_V: 2113a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmnz_v(cpu_env, twd, tws, twt); 2114a2b0a27dSPhilippe Mathieu-Daudé break; 2115a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZ_V: 2116a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmz_v(cpu_env, twd, tws, twt); 2117a2b0a27dSPhilippe Mathieu-Daudé break; 2118a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSEL_V: 2119a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bsel_v(cpu_env, twd, tws, twt); 2120a2b0a27dSPhilippe Mathieu-Daudé break; 2121a2b0a27dSPhilippe Mathieu-Daudé default: 2122a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2123a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2124a2b0a27dSPhilippe Mathieu-Daudé break; 2125a2b0a27dSPhilippe Mathieu-Daudé } 2126a2b0a27dSPhilippe Mathieu-Daudé 2127a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2128a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 2129a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 2130a2b0a27dSPhilippe Mathieu-Daudé } 2131a2b0a27dSPhilippe Mathieu-Daudé 2132a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_vec(DisasContext *ctx) 2133a2b0a27dSPhilippe Mathieu-Daudé { 2134a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_VEC(ctx->opcode)) { 2135a2b0a27dSPhilippe Mathieu-Daudé case OPC_AND_V: 2136a2b0a27dSPhilippe Mathieu-Daudé case OPC_OR_V: 2137a2b0a27dSPhilippe Mathieu-Daudé case OPC_NOR_V: 2138a2b0a27dSPhilippe Mathieu-Daudé case OPC_XOR_V: 2139a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZ_V: 2140a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZ_V: 2141a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSEL_V: 2142a2b0a27dSPhilippe Mathieu-Daudé gen_msa_vec_v(ctx); 2143a2b0a27dSPhilippe Mathieu-Daudé break; 2144a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_2R: 2145a2b0a27dSPhilippe Mathieu-Daudé gen_msa_2r(ctx); 2146a2b0a27dSPhilippe Mathieu-Daudé break; 2147a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_2RF: 2148a2b0a27dSPhilippe Mathieu-Daudé gen_msa_2rf(ctx); 2149a2b0a27dSPhilippe Mathieu-Daudé break; 2150a2b0a27dSPhilippe Mathieu-Daudé default: 2151a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2152a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2153a2b0a27dSPhilippe Mathieu-Daudé break; 2154a2b0a27dSPhilippe Mathieu-Daudé } 2155a2b0a27dSPhilippe Mathieu-Daudé } 2156a2b0a27dSPhilippe Mathieu-Daudé 2157525ea877SPhilippe Mathieu-Daudé static bool trans_MSA(DisasContext *ctx, arg_MSA *a) 2158a2b0a27dSPhilippe Mathieu-Daudé { 2159a2b0a27dSPhilippe Mathieu-Daudé uint32_t opcode = ctx->opcode; 2160a2b0a27dSPhilippe Mathieu-Daudé 2161340ee8b3SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 2162340ee8b3SPhilippe Mathieu-Daudé return true; 2163340ee8b3SPhilippe Mathieu-Daudé } 2164a2b0a27dSPhilippe Mathieu-Daudé 2165a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_MINOR(opcode)) { 2166a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I8_00: 2167a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I8_01: 2168a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I8_02: 2169a2b0a27dSPhilippe Mathieu-Daudé gen_msa_i8(ctx); 2170a2b0a27dSPhilippe Mathieu-Daudé break; 2171a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I5_06: 2172a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_I5_07: 2173a2b0a27dSPhilippe Mathieu-Daudé gen_msa_i5(ctx); 2174a2b0a27dSPhilippe Mathieu-Daudé break; 2175a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_BIT_09: 2176a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_BIT_0A: 2177a2b0a27dSPhilippe Mathieu-Daudé gen_msa_bit(ctx); 2178a2b0a27dSPhilippe Mathieu-Daudé break; 2179a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0D: 2180a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0E: 2181a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0F: 2182a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_10: 2183a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_11: 2184a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_12: 2185a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_13: 2186a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_14: 2187a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_15: 2188a2b0a27dSPhilippe Mathieu-Daudé gen_msa_3r(ctx); 2189a2b0a27dSPhilippe Mathieu-Daudé break; 2190a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_ELM: 2191a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm(ctx); 2192a2b0a27dSPhilippe Mathieu-Daudé break; 2193a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1A: 2194a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1B: 2195a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1C: 2196a2b0a27dSPhilippe Mathieu-Daudé gen_msa_3rf(ctx); 2197a2b0a27dSPhilippe Mathieu-Daudé break; 2198a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_VEC: 2199a2b0a27dSPhilippe Mathieu-Daudé gen_msa_vec(ctx); 2200a2b0a27dSPhilippe Mathieu-Daudé break; 2201a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_B: 2202a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_H: 2203a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_W: 2204a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_D: 2205a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_B: 2206a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_H: 2207a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_W: 2208a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_D: 2209a2b0a27dSPhilippe Mathieu-Daudé { 2210a2b0a27dSPhilippe Mathieu-Daudé int32_t s10 = sextract32(ctx->opcode, 16, 10); 2211a2b0a27dSPhilippe Mathieu-Daudé uint8_t rs = (ctx->opcode >> 11) & 0x1f; 2212a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 2213a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 0) & 0x3; 2214a2b0a27dSPhilippe Mathieu-Daudé 2215a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 2216a2b0a27dSPhilippe Mathieu-Daudé TCGv taddr = tcg_temp_new(); 2217a2b0a27dSPhilippe Mathieu-Daudé gen_base_offset_addr(ctx, taddr, rs, s10 << df); 2218a2b0a27dSPhilippe Mathieu-Daudé 2219a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_MINOR(opcode)) { 2220a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_B: 2221a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_b(cpu_env, twd, taddr); 2222a2b0a27dSPhilippe Mathieu-Daudé break; 2223a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_H: 2224a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_h(cpu_env, twd, taddr); 2225a2b0a27dSPhilippe Mathieu-Daudé break; 2226a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_W: 2227a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_w(cpu_env, twd, taddr); 2228a2b0a27dSPhilippe Mathieu-Daudé break; 2229a2b0a27dSPhilippe Mathieu-Daudé case OPC_LD_D: 2230a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ld_d(cpu_env, twd, taddr); 2231a2b0a27dSPhilippe Mathieu-Daudé break; 2232a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_B: 2233a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_b(cpu_env, twd, taddr); 2234a2b0a27dSPhilippe Mathieu-Daudé break; 2235a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_H: 2236a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_h(cpu_env, twd, taddr); 2237a2b0a27dSPhilippe Mathieu-Daudé break; 2238a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_W: 2239a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_w(cpu_env, twd, taddr); 2240a2b0a27dSPhilippe Mathieu-Daudé break; 2241a2b0a27dSPhilippe Mathieu-Daudé case OPC_ST_D: 2242a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_st_d(cpu_env, twd, taddr); 2243a2b0a27dSPhilippe Mathieu-Daudé break; 2244a2b0a27dSPhilippe Mathieu-Daudé } 2245a2b0a27dSPhilippe Mathieu-Daudé 2246a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 2247a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free(taddr); 2248a2b0a27dSPhilippe Mathieu-Daudé } 2249a2b0a27dSPhilippe Mathieu-Daudé break; 2250a2b0a27dSPhilippe Mathieu-Daudé default: 2251a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2252a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2253a2b0a27dSPhilippe Mathieu-Daudé break; 2254a2b0a27dSPhilippe Mathieu-Daudé } 2255a2b0a27dSPhilippe Mathieu-Daudé 2256a2b0a27dSPhilippe Mathieu-Daudé return true; 2257a2b0a27dSPhilippe Mathieu-Daudé } 2258a2b0a27dSPhilippe Mathieu-Daudé 225934fe9fa3SPhilippe Mathieu-Daudé static bool trans_LSA(DisasContext *ctx, arg_r *a) 2260a2b0a27dSPhilippe Mathieu-Daudé { 2261a2b0a27dSPhilippe Mathieu-Daudé return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); 2262a2b0a27dSPhilippe Mathieu-Daudé } 2263a2b0a27dSPhilippe Mathieu-Daudé 226434fe9fa3SPhilippe Mathieu-Daudé static bool trans_DLSA(DisasContext *ctx, arg_r *a) 2265a2b0a27dSPhilippe Mathieu-Daudé { 2266f5c6ee0cSPhilippe Mathieu-Daudé if (TARGET_LONG_BITS != 64) { 2267f5c6ee0cSPhilippe Mathieu-Daudé return false; 2268f5c6ee0cSPhilippe Mathieu-Daudé } 2269a2b0a27dSPhilippe Mathieu-Daudé return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); 2270a2b0a27dSPhilippe Mathieu-Daudé } 2271