1a2b0a27dSPhilippe Mathieu-Daudé /* 2a2b0a27dSPhilippe Mathieu-Daudé * MIPS SIMD Architecture (MSA) translation routines 3a2b0a27dSPhilippe Mathieu-Daudé * 4a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2004-2005 Jocelyn Mayer 5a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2006 Marius Groeger (FPU operations) 6a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support) 7a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2009 CodeSourcery (MIPS16 and microMIPS support) 8a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2012 Jia Liu & Dongxue Zhang (MIPS ASE DSP support) 9a2b0a27dSPhilippe Mathieu-Daudé * Copyright (c) 2020 Philippe Mathieu-Daudé 10a2b0a27dSPhilippe Mathieu-Daudé * 11a2b0a27dSPhilippe Mathieu-Daudé * SPDX-License-Identifier: LGPL-2.1-or-later 12a2b0a27dSPhilippe Mathieu-Daudé */ 13a2b0a27dSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 14a2b0a27dSPhilippe Mathieu-Daudé #include "tcg/tcg-op.h" 15a2b0a27dSPhilippe Mathieu-Daudé #include "exec/helper-gen.h" 16a2b0a27dSPhilippe Mathieu-Daudé #include "translate.h" 17a2b0a27dSPhilippe Mathieu-Daudé #include "fpu_helper.h" 18a2b0a27dSPhilippe Mathieu-Daudé #include "internal.h" 19a2b0a27dSPhilippe Mathieu-Daudé 204701d23aSPhilippe Mathieu-Daudé static int bit_m(DisasContext *ctx, int x); 214701d23aSPhilippe Mathieu-Daudé static int bit_df(DisasContext *ctx, int x); 224701d23aSPhilippe Mathieu-Daudé 23*5c5b6400SPhilippe Mathieu-Daudé static inline int plus_2(DisasContext *s, int x) 24*5c5b6400SPhilippe Mathieu-Daudé { 25*5c5b6400SPhilippe Mathieu-Daudé return x + 2; 26*5c5b6400SPhilippe Mathieu-Daudé } 27*5c5b6400SPhilippe Mathieu-Daudé 28a2b0a27dSPhilippe Mathieu-Daudé /* Include the auto-generated decoder. */ 29f5c6ee0cSPhilippe Mathieu-Daudé #include "decode-msa.c.inc" 30a2b0a27dSPhilippe Mathieu-Daudé 31a2b0a27dSPhilippe Mathieu-Daudé #define OPC_MSA (0x1E << 26) 32a2b0a27dSPhilippe Mathieu-Daudé 33a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_MINOR(op) (MASK_OP_MAJOR(op) | (op & 0x3F)) 34a2b0a27dSPhilippe Mathieu-Daudé enum { 35a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0D = 0x0D | OPC_MSA, 36a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0E = 0x0E | OPC_MSA, 37a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_0F = 0x0F | OPC_MSA, 38a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_10 = 0x10 | OPC_MSA, 39a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_11 = 0x11 | OPC_MSA, 40a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_12 = 0x12 | OPC_MSA, 41a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_13 = 0x13 | OPC_MSA, 42a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_14 = 0x14 | OPC_MSA, 43a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3R_15 = 0x15 | OPC_MSA, 44a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_ELM = 0x19 | OPC_MSA, 45a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1A = 0x1A | OPC_MSA, 46a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1B = 0x1B | OPC_MSA, 47a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_3RF_1C = 0x1C | OPC_MSA, 48a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_VEC = 0x1E | OPC_MSA, 49a2b0a27dSPhilippe Mathieu-Daudé }; 50a2b0a27dSPhilippe Mathieu-Daudé 51a2b0a27dSPhilippe Mathieu-Daudé enum { 52*5c5b6400SPhilippe Mathieu-Daudé /* VEC/2R instruction */ 53a2b0a27dSPhilippe Mathieu-Daudé OPC_AND_V = (0x00 << 21) | OPC_MSA_VEC, 54a2b0a27dSPhilippe Mathieu-Daudé OPC_OR_V = (0x01 << 21) | OPC_MSA_VEC, 55a2b0a27dSPhilippe Mathieu-Daudé OPC_NOR_V = (0x02 << 21) | OPC_MSA_VEC, 56a2b0a27dSPhilippe Mathieu-Daudé OPC_XOR_V = (0x03 << 21) | OPC_MSA_VEC, 57a2b0a27dSPhilippe Mathieu-Daudé OPC_BMNZ_V = (0x04 << 21) | OPC_MSA_VEC, 58a2b0a27dSPhilippe Mathieu-Daudé OPC_BMZ_V = (0x05 << 21) | OPC_MSA_VEC, 59a2b0a27dSPhilippe Mathieu-Daudé OPC_BSEL_V = (0x06 << 21) | OPC_MSA_VEC, 60a2b0a27dSPhilippe Mathieu-Daudé 61a2b0a27dSPhilippe Mathieu-Daudé OPC_MSA_2R = (0x18 << 21) | OPC_MSA_VEC, 62a2b0a27dSPhilippe Mathieu-Daudé 63a2b0a27dSPhilippe Mathieu-Daudé /* 2R instruction df(bits 17..16) = _b, _h, _w, _d */ 64a2b0a27dSPhilippe Mathieu-Daudé OPC_FILL_df = (0x00 << 18) | OPC_MSA_2R, 65a2b0a27dSPhilippe Mathieu-Daudé OPC_PCNT_df = (0x01 << 18) | OPC_MSA_2R, 66a2b0a27dSPhilippe Mathieu-Daudé OPC_NLOC_df = (0x02 << 18) | OPC_MSA_2R, 67a2b0a27dSPhilippe Mathieu-Daudé OPC_NLZC_df = (0x03 << 18) | OPC_MSA_2R, 68a2b0a27dSPhilippe Mathieu-Daudé 69a2b0a27dSPhilippe Mathieu-Daudé /* 3R instruction df(bits 22..21) = _b, _h, _w, d */ 70a2b0a27dSPhilippe Mathieu-Daudé OPC_SLL_df = (0x0 << 23) | OPC_MSA_3R_0D, 71a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDV_df = (0x0 << 23) | OPC_MSA_3R_0E, 72a2b0a27dSPhilippe Mathieu-Daudé OPC_CEQ_df = (0x0 << 23) | OPC_MSA_3R_0F, 73a2b0a27dSPhilippe Mathieu-Daudé OPC_ADD_A_df = (0x0 << 23) | OPC_MSA_3R_10, 74a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBS_S_df = (0x0 << 23) | OPC_MSA_3R_11, 75a2b0a27dSPhilippe Mathieu-Daudé OPC_MULV_df = (0x0 << 23) | OPC_MSA_3R_12, 76a2b0a27dSPhilippe Mathieu-Daudé OPC_DOTP_S_df = (0x0 << 23) | OPC_MSA_3R_13, 77a2b0a27dSPhilippe Mathieu-Daudé OPC_SLD_df = (0x0 << 23) | OPC_MSA_3R_14, 78a2b0a27dSPhilippe Mathieu-Daudé OPC_VSHF_df = (0x0 << 23) | OPC_MSA_3R_15, 79a2b0a27dSPhilippe Mathieu-Daudé OPC_SRA_df = (0x1 << 23) | OPC_MSA_3R_0D, 80a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBV_df = (0x1 << 23) | OPC_MSA_3R_0E, 81a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_A_df = (0x1 << 23) | OPC_MSA_3R_10, 82a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBS_U_df = (0x1 << 23) | OPC_MSA_3R_11, 83a2b0a27dSPhilippe Mathieu-Daudé OPC_MADDV_df = (0x1 << 23) | OPC_MSA_3R_12, 84a2b0a27dSPhilippe Mathieu-Daudé OPC_DOTP_U_df = (0x1 << 23) | OPC_MSA_3R_13, 85a2b0a27dSPhilippe Mathieu-Daudé OPC_SPLAT_df = (0x1 << 23) | OPC_MSA_3R_14, 86a2b0a27dSPhilippe Mathieu-Daudé OPC_SRAR_df = (0x1 << 23) | OPC_MSA_3R_15, 87a2b0a27dSPhilippe Mathieu-Daudé OPC_SRL_df = (0x2 << 23) | OPC_MSA_3R_0D, 88a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_S_df = (0x2 << 23) | OPC_MSA_3R_0E, 89a2b0a27dSPhilippe Mathieu-Daudé OPC_CLT_S_df = (0x2 << 23) | OPC_MSA_3R_0F, 90a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_S_df = (0x2 << 23) | OPC_MSA_3R_10, 91a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBSUS_U_df = (0x2 << 23) | OPC_MSA_3R_11, 92a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUBV_df = (0x2 << 23) | OPC_MSA_3R_12, 93a2b0a27dSPhilippe Mathieu-Daudé OPC_DPADD_S_df = (0x2 << 23) | OPC_MSA_3R_13, 94a2b0a27dSPhilippe Mathieu-Daudé OPC_PCKEV_df = (0x2 << 23) | OPC_MSA_3R_14, 95a2b0a27dSPhilippe Mathieu-Daudé OPC_SRLR_df = (0x2 << 23) | OPC_MSA_3R_15, 96a2b0a27dSPhilippe Mathieu-Daudé OPC_BCLR_df = (0x3 << 23) | OPC_MSA_3R_0D, 97a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_U_df = (0x3 << 23) | OPC_MSA_3R_0E, 98a2b0a27dSPhilippe Mathieu-Daudé OPC_CLT_U_df = (0x3 << 23) | OPC_MSA_3R_0F, 99a2b0a27dSPhilippe Mathieu-Daudé OPC_ADDS_U_df = (0x3 << 23) | OPC_MSA_3R_10, 100a2b0a27dSPhilippe Mathieu-Daudé OPC_SUBSUU_S_df = (0x3 << 23) | OPC_MSA_3R_11, 101a2b0a27dSPhilippe Mathieu-Daudé OPC_DPADD_U_df = (0x3 << 23) | OPC_MSA_3R_13, 102a2b0a27dSPhilippe Mathieu-Daudé OPC_PCKOD_df = (0x3 << 23) | OPC_MSA_3R_14, 103a2b0a27dSPhilippe Mathieu-Daudé OPC_BSET_df = (0x4 << 23) | OPC_MSA_3R_0D, 104a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_S_df = (0x4 << 23) | OPC_MSA_3R_0E, 105a2b0a27dSPhilippe Mathieu-Daudé OPC_CLE_S_df = (0x4 << 23) | OPC_MSA_3R_0F, 106a2b0a27dSPhilippe Mathieu-Daudé OPC_AVE_S_df = (0x4 << 23) | OPC_MSA_3R_10, 107a2b0a27dSPhilippe Mathieu-Daudé OPC_ASUB_S_df = (0x4 << 23) | OPC_MSA_3R_11, 108a2b0a27dSPhilippe Mathieu-Daudé OPC_DIV_S_df = (0x4 << 23) | OPC_MSA_3R_12, 109a2b0a27dSPhilippe Mathieu-Daudé OPC_DPSUB_S_df = (0x4 << 23) | OPC_MSA_3R_13, 110a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVL_df = (0x4 << 23) | OPC_MSA_3R_14, 111a2b0a27dSPhilippe Mathieu-Daudé OPC_HADD_S_df = (0x4 << 23) | OPC_MSA_3R_15, 112a2b0a27dSPhilippe Mathieu-Daudé OPC_BNEG_df = (0x5 << 23) | OPC_MSA_3R_0D, 113a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_U_df = (0x5 << 23) | OPC_MSA_3R_0E, 114a2b0a27dSPhilippe Mathieu-Daudé OPC_CLE_U_df = (0x5 << 23) | OPC_MSA_3R_0F, 115a2b0a27dSPhilippe Mathieu-Daudé OPC_AVE_U_df = (0x5 << 23) | OPC_MSA_3R_10, 116a2b0a27dSPhilippe Mathieu-Daudé OPC_ASUB_U_df = (0x5 << 23) | OPC_MSA_3R_11, 117a2b0a27dSPhilippe Mathieu-Daudé OPC_DIV_U_df = (0x5 << 23) | OPC_MSA_3R_12, 118a2b0a27dSPhilippe Mathieu-Daudé OPC_DPSUB_U_df = (0x5 << 23) | OPC_MSA_3R_13, 119a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVR_df = (0x5 << 23) | OPC_MSA_3R_14, 120a2b0a27dSPhilippe Mathieu-Daudé OPC_HADD_U_df = (0x5 << 23) | OPC_MSA_3R_15, 121a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSL_df = (0x6 << 23) | OPC_MSA_3R_0D, 122a2b0a27dSPhilippe Mathieu-Daudé OPC_MAX_A_df = (0x6 << 23) | OPC_MSA_3R_0E, 123a2b0a27dSPhilippe Mathieu-Daudé OPC_AVER_S_df = (0x6 << 23) | OPC_MSA_3R_10, 124a2b0a27dSPhilippe Mathieu-Daudé OPC_MOD_S_df = (0x6 << 23) | OPC_MSA_3R_12, 125a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVEV_df = (0x6 << 23) | OPC_MSA_3R_14, 126a2b0a27dSPhilippe Mathieu-Daudé OPC_HSUB_S_df = (0x6 << 23) | OPC_MSA_3R_15, 127a2b0a27dSPhilippe Mathieu-Daudé OPC_BINSR_df = (0x7 << 23) | OPC_MSA_3R_0D, 128a2b0a27dSPhilippe Mathieu-Daudé OPC_MIN_A_df = (0x7 << 23) | OPC_MSA_3R_0E, 129a2b0a27dSPhilippe Mathieu-Daudé OPC_AVER_U_df = (0x7 << 23) | OPC_MSA_3R_10, 130a2b0a27dSPhilippe Mathieu-Daudé OPC_MOD_U_df = (0x7 << 23) | OPC_MSA_3R_12, 131a2b0a27dSPhilippe Mathieu-Daudé OPC_ILVOD_df = (0x7 << 23) | OPC_MSA_3R_14, 132a2b0a27dSPhilippe Mathieu-Daudé OPC_HSUB_U_df = (0x7 << 23) | OPC_MSA_3R_15, 133a2b0a27dSPhilippe Mathieu-Daudé 134a2b0a27dSPhilippe Mathieu-Daudé /* ELM instructions df(bits 21..16) = _b, _h, _w, _d */ 135a2b0a27dSPhilippe Mathieu-Daudé OPC_SLDI_df = (0x0 << 22) | (0x00 << 16) | OPC_MSA_ELM, 136a2b0a27dSPhilippe Mathieu-Daudé OPC_CTCMSA = (0x0 << 22) | (0x3E << 16) | OPC_MSA_ELM, 137a2b0a27dSPhilippe Mathieu-Daudé OPC_SPLATI_df = (0x1 << 22) | (0x00 << 16) | OPC_MSA_ELM, 138a2b0a27dSPhilippe Mathieu-Daudé OPC_CFCMSA = (0x1 << 22) | (0x3E << 16) | OPC_MSA_ELM, 139a2b0a27dSPhilippe Mathieu-Daudé OPC_COPY_S_df = (0x2 << 22) | (0x00 << 16) | OPC_MSA_ELM, 140a2b0a27dSPhilippe Mathieu-Daudé OPC_MOVE_V = (0x2 << 22) | (0x3E << 16) | OPC_MSA_ELM, 141a2b0a27dSPhilippe Mathieu-Daudé OPC_COPY_U_df = (0x3 << 22) | (0x00 << 16) | OPC_MSA_ELM, 142a2b0a27dSPhilippe Mathieu-Daudé OPC_INSERT_df = (0x4 << 22) | (0x00 << 16) | OPC_MSA_ELM, 143a2b0a27dSPhilippe Mathieu-Daudé OPC_INSVE_df = (0x5 << 22) | (0x00 << 16) | OPC_MSA_ELM, 144a2b0a27dSPhilippe Mathieu-Daudé 145a2b0a27dSPhilippe Mathieu-Daudé /* 3RF instruction _df(bit 21) = _w, _d */ 146a2b0a27dSPhilippe Mathieu-Daudé OPC_FCAF_df = (0x0 << 22) | OPC_MSA_3RF_1A, 147a2b0a27dSPhilippe Mathieu-Daudé OPC_FADD_df = (0x0 << 22) | OPC_MSA_3RF_1B, 148a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUN_df = (0x1 << 22) | OPC_MSA_3RF_1A, 149a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUB_df = (0x1 << 22) | OPC_MSA_3RF_1B, 150a2b0a27dSPhilippe Mathieu-Daudé OPC_FCOR_df = (0x1 << 22) | OPC_MSA_3RF_1C, 151a2b0a27dSPhilippe Mathieu-Daudé OPC_FCEQ_df = (0x2 << 22) | OPC_MSA_3RF_1A, 152a2b0a27dSPhilippe Mathieu-Daudé OPC_FMUL_df = (0x2 << 22) | OPC_MSA_3RF_1B, 153a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUNE_df = (0x2 << 22) | OPC_MSA_3RF_1C, 154a2b0a27dSPhilippe Mathieu-Daudé OPC_FCUEQ_df = (0x3 << 22) | OPC_MSA_3RF_1A, 155a2b0a27dSPhilippe Mathieu-Daudé OPC_FDIV_df = (0x3 << 22) | OPC_MSA_3RF_1B, 156a2b0a27dSPhilippe Mathieu-Daudé OPC_FCNE_df = (0x3 << 22) | OPC_MSA_3RF_1C, 157a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLT_df = (0x4 << 22) | OPC_MSA_3RF_1A, 158a2b0a27dSPhilippe Mathieu-Daudé OPC_FMADD_df = (0x4 << 22) | OPC_MSA_3RF_1B, 159a2b0a27dSPhilippe Mathieu-Daudé OPC_MUL_Q_df = (0x4 << 22) | OPC_MSA_3RF_1C, 160a2b0a27dSPhilippe Mathieu-Daudé OPC_FCULT_df = (0x5 << 22) | OPC_MSA_3RF_1A, 161a2b0a27dSPhilippe Mathieu-Daudé OPC_FMSUB_df = (0x5 << 22) | OPC_MSA_3RF_1B, 162a2b0a27dSPhilippe Mathieu-Daudé OPC_MADD_Q_df = (0x5 << 22) | OPC_MSA_3RF_1C, 163a2b0a27dSPhilippe Mathieu-Daudé OPC_FCLE_df = (0x6 << 22) | OPC_MSA_3RF_1A, 164a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUB_Q_df = (0x6 << 22) | OPC_MSA_3RF_1C, 165a2b0a27dSPhilippe Mathieu-Daudé OPC_FCULE_df = (0x7 << 22) | OPC_MSA_3RF_1A, 166a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXP2_df = (0x7 << 22) | OPC_MSA_3RF_1B, 167a2b0a27dSPhilippe Mathieu-Daudé OPC_FSAF_df = (0x8 << 22) | OPC_MSA_3RF_1A, 168a2b0a27dSPhilippe Mathieu-Daudé OPC_FEXDO_df = (0x8 << 22) | OPC_MSA_3RF_1B, 169a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUN_df = (0x9 << 22) | OPC_MSA_3RF_1A, 170a2b0a27dSPhilippe Mathieu-Daudé OPC_FSOR_df = (0x9 << 22) | OPC_MSA_3RF_1C, 171a2b0a27dSPhilippe Mathieu-Daudé OPC_FSEQ_df = (0xA << 22) | OPC_MSA_3RF_1A, 172a2b0a27dSPhilippe Mathieu-Daudé OPC_FTQ_df = (0xA << 22) | OPC_MSA_3RF_1B, 173a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUNE_df = (0xA << 22) | OPC_MSA_3RF_1C, 174a2b0a27dSPhilippe Mathieu-Daudé OPC_FSUEQ_df = (0xB << 22) | OPC_MSA_3RF_1A, 175a2b0a27dSPhilippe Mathieu-Daudé OPC_FSNE_df = (0xB << 22) | OPC_MSA_3RF_1C, 176a2b0a27dSPhilippe Mathieu-Daudé OPC_FSLT_df = (0xC << 22) | OPC_MSA_3RF_1A, 177a2b0a27dSPhilippe Mathieu-Daudé OPC_FMIN_df = (0xC << 22) | OPC_MSA_3RF_1B, 178a2b0a27dSPhilippe Mathieu-Daudé OPC_MULR_Q_df = (0xC << 22) | OPC_MSA_3RF_1C, 179a2b0a27dSPhilippe Mathieu-Daudé OPC_FSULT_df = (0xD << 22) | OPC_MSA_3RF_1A, 180a2b0a27dSPhilippe Mathieu-Daudé OPC_FMIN_A_df = (0xD << 22) | OPC_MSA_3RF_1B, 181a2b0a27dSPhilippe Mathieu-Daudé OPC_MADDR_Q_df = (0xD << 22) | OPC_MSA_3RF_1C, 182a2b0a27dSPhilippe Mathieu-Daudé OPC_FSLE_df = (0xE << 22) | OPC_MSA_3RF_1A, 183a2b0a27dSPhilippe Mathieu-Daudé OPC_FMAX_df = (0xE << 22) | OPC_MSA_3RF_1B, 184a2b0a27dSPhilippe Mathieu-Daudé OPC_MSUBR_Q_df = (0xE << 22) | OPC_MSA_3RF_1C, 185a2b0a27dSPhilippe Mathieu-Daudé OPC_FSULE_df = (0xF << 22) | OPC_MSA_3RF_1A, 186a2b0a27dSPhilippe Mathieu-Daudé OPC_FMAX_A_df = (0xF << 22) | OPC_MSA_3RF_1B, 187a2b0a27dSPhilippe Mathieu-Daudé }; 188a2b0a27dSPhilippe Mathieu-Daudé 18906106772SPhilippe Mathieu-Daudé static const char msaregnames[][6] = { 190a2b0a27dSPhilippe Mathieu-Daudé "w0.d0", "w0.d1", "w1.d0", "w1.d1", 191a2b0a27dSPhilippe Mathieu-Daudé "w2.d0", "w2.d1", "w3.d0", "w3.d1", 192a2b0a27dSPhilippe Mathieu-Daudé "w4.d0", "w4.d1", "w5.d0", "w5.d1", 193a2b0a27dSPhilippe Mathieu-Daudé "w6.d0", "w6.d1", "w7.d0", "w7.d1", 194a2b0a27dSPhilippe Mathieu-Daudé "w8.d0", "w8.d1", "w9.d0", "w9.d1", 195a2b0a27dSPhilippe Mathieu-Daudé "w10.d0", "w10.d1", "w11.d0", "w11.d1", 196a2b0a27dSPhilippe Mathieu-Daudé "w12.d0", "w12.d1", "w13.d0", "w13.d1", 197a2b0a27dSPhilippe Mathieu-Daudé "w14.d0", "w14.d1", "w15.d0", "w15.d1", 198a2b0a27dSPhilippe Mathieu-Daudé "w16.d0", "w16.d1", "w17.d0", "w17.d1", 199a2b0a27dSPhilippe Mathieu-Daudé "w18.d0", "w18.d1", "w19.d0", "w19.d1", 200a2b0a27dSPhilippe Mathieu-Daudé "w20.d0", "w20.d1", "w21.d0", "w21.d1", 201a2b0a27dSPhilippe Mathieu-Daudé "w22.d0", "w22.d1", "w23.d0", "w23.d1", 202a2b0a27dSPhilippe Mathieu-Daudé "w24.d0", "w24.d1", "w25.d0", "w25.d1", 203a2b0a27dSPhilippe Mathieu-Daudé "w26.d0", "w26.d1", "w27.d0", "w27.d1", 204a2b0a27dSPhilippe Mathieu-Daudé "w28.d0", "w28.d1", "w29.d0", "w29.d1", 205a2b0a27dSPhilippe Mathieu-Daudé "w30.d0", "w30.d1", "w31.d0", "w31.d1", 206a2b0a27dSPhilippe Mathieu-Daudé }; 207a2b0a27dSPhilippe Mathieu-Daudé 2084701d23aSPhilippe Mathieu-Daudé /* Encoding of Operation Field (must be indexed by CPUMIPSMSADataFormat) */ 2094701d23aSPhilippe Mathieu-Daudé struct dfe { 2104701d23aSPhilippe Mathieu-Daudé int start; 2114701d23aSPhilippe Mathieu-Daudé int length; 2124701d23aSPhilippe Mathieu-Daudé uint32_t mask; 2134701d23aSPhilippe Mathieu-Daudé }; 2144701d23aSPhilippe Mathieu-Daudé 2154701d23aSPhilippe Mathieu-Daudé /* 2164701d23aSPhilippe Mathieu-Daudé * Extract immediate from df/{m,n} format (used by ELM & BIT instructions). 2174701d23aSPhilippe Mathieu-Daudé * Returns the immediate value, or -1 if the format does not match. 2184701d23aSPhilippe Mathieu-Daudé */ 2194701d23aSPhilippe Mathieu-Daudé static int df_extract_val(DisasContext *ctx, int x, const struct dfe *s) 2204701d23aSPhilippe Mathieu-Daudé { 2214701d23aSPhilippe Mathieu-Daudé for (unsigned i = 0; i < 4; i++) { 2224701d23aSPhilippe Mathieu-Daudé if (extract32(x, s->start, s->length) == s->mask) { 2234701d23aSPhilippe Mathieu-Daudé return extract32(x, 0, s->start); 2244701d23aSPhilippe Mathieu-Daudé } 2254701d23aSPhilippe Mathieu-Daudé } 2264701d23aSPhilippe Mathieu-Daudé return -1; 2274701d23aSPhilippe Mathieu-Daudé } 2284701d23aSPhilippe Mathieu-Daudé 2294701d23aSPhilippe Mathieu-Daudé /* 2304701d23aSPhilippe Mathieu-Daudé * Extract DataField from df/{m,n} format (used by ELM & BIT instructions). 2314701d23aSPhilippe Mathieu-Daudé * Returns the DataField, or -1 if the format does not match. 2324701d23aSPhilippe Mathieu-Daudé */ 2334701d23aSPhilippe Mathieu-Daudé static int df_extract_df(DisasContext *ctx, int x, const struct dfe *s) 2344701d23aSPhilippe Mathieu-Daudé { 2354701d23aSPhilippe Mathieu-Daudé for (unsigned i = 0; i < 4; i++) { 2364701d23aSPhilippe Mathieu-Daudé if (extract32(x, s->start, s->length) == s->mask) { 2374701d23aSPhilippe Mathieu-Daudé return i; 2384701d23aSPhilippe Mathieu-Daudé } 2394701d23aSPhilippe Mathieu-Daudé } 2404701d23aSPhilippe Mathieu-Daudé return -1; 2414701d23aSPhilippe Mathieu-Daudé } 2424701d23aSPhilippe Mathieu-Daudé 2434701d23aSPhilippe Mathieu-Daudé static const struct dfe df_bit[] = { 2444701d23aSPhilippe Mathieu-Daudé /* Table 3.28 BIT Instruction Format */ 2454701d23aSPhilippe Mathieu-Daudé [DF_BYTE] = {3, 4, 0b1110}, 2464701d23aSPhilippe Mathieu-Daudé [DF_HALF] = {4, 3, 0b110}, 2474701d23aSPhilippe Mathieu-Daudé [DF_WORD] = {5, 2, 0b10}, 2484701d23aSPhilippe Mathieu-Daudé [DF_DOUBLE] = {6, 1, 0b0} 2494701d23aSPhilippe Mathieu-Daudé }; 2504701d23aSPhilippe Mathieu-Daudé 2514701d23aSPhilippe Mathieu-Daudé static int bit_m(DisasContext *ctx, int x) 2524701d23aSPhilippe Mathieu-Daudé { 2534701d23aSPhilippe Mathieu-Daudé return df_extract_val(ctx, x, df_bit); 2544701d23aSPhilippe Mathieu-Daudé } 2554701d23aSPhilippe Mathieu-Daudé 2564701d23aSPhilippe Mathieu-Daudé static int bit_df(DisasContext *ctx, int x) 2574701d23aSPhilippe Mathieu-Daudé { 2584701d23aSPhilippe Mathieu-Daudé return df_extract_df(ctx, x, df_bit); 2594701d23aSPhilippe Mathieu-Daudé } 2604701d23aSPhilippe Mathieu-Daudé 261a2b0a27dSPhilippe Mathieu-Daudé static TCGv_i64 msa_wr_d[64]; 262a2b0a27dSPhilippe Mathieu-Daudé 263a2b0a27dSPhilippe Mathieu-Daudé void msa_translate_init(void) 264a2b0a27dSPhilippe Mathieu-Daudé { 265a2b0a27dSPhilippe Mathieu-Daudé int i; 266a2b0a27dSPhilippe Mathieu-Daudé 267a2b0a27dSPhilippe Mathieu-Daudé for (i = 0; i < 32; i++) { 268bbc213b3SPhilippe Mathieu-Daudé int off; 269a2b0a27dSPhilippe Mathieu-Daudé 270a2b0a27dSPhilippe Mathieu-Daudé /* 271a2b0a27dSPhilippe Mathieu-Daudé * The MSA vector registers are mapped on the 272a2b0a27dSPhilippe Mathieu-Daudé * scalar floating-point unit (FPU) registers. 273a2b0a27dSPhilippe Mathieu-Daudé */ 274bbc213b3SPhilippe Mathieu-Daudé off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); 275a2b0a27dSPhilippe Mathieu-Daudé msa_wr_d[i * 2] = fpu_f64[i]; 276bbc213b3SPhilippe Mathieu-Daudé 277a2b0a27dSPhilippe Mathieu-Daudé off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); 278a2b0a27dSPhilippe Mathieu-Daudé msa_wr_d[i * 2 + 1] = 279a2b0a27dSPhilippe Mathieu-Daudé tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]); 280a2b0a27dSPhilippe Mathieu-Daudé } 281a2b0a27dSPhilippe Mathieu-Daudé } 282a2b0a27dSPhilippe Mathieu-Daudé 283340ee8b3SPhilippe Mathieu-Daudé /* 284340ee8b3SPhilippe Mathieu-Daudé * Check if MSA is enabled. 285340ee8b3SPhilippe Mathieu-Daudé * This function is always called with MSA available. 286340ee8b3SPhilippe Mathieu-Daudé * If MSA is disabled, raise an exception. 287340ee8b3SPhilippe Mathieu-Daudé */ 288340ee8b3SPhilippe Mathieu-Daudé static inline bool check_msa_enabled(DisasContext *ctx) 289a2b0a27dSPhilippe Mathieu-Daudé { 290a2b0a27dSPhilippe Mathieu-Daudé if (unlikely((ctx->hflags & MIPS_HFLAG_FPU) && 291a2b0a27dSPhilippe Mathieu-Daudé !(ctx->hflags & MIPS_HFLAG_F64))) { 292a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 293340ee8b3SPhilippe Mathieu-Daudé return false; 294a2b0a27dSPhilippe Mathieu-Daudé } 295a2b0a27dSPhilippe Mathieu-Daudé 296a2b0a27dSPhilippe Mathieu-Daudé if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) { 297a2b0a27dSPhilippe Mathieu-Daudé generate_exception_end(ctx, EXCP_MSADIS); 298340ee8b3SPhilippe Mathieu-Daudé return false; 299a2b0a27dSPhilippe Mathieu-Daudé } 300340ee8b3SPhilippe Mathieu-Daudé return true; 301a2b0a27dSPhilippe Mathieu-Daudé } 302a2b0a27dSPhilippe Mathieu-Daudé 303ce121fe2SPhilippe Mathieu-Daudé typedef void gen_helper_piv(TCGv_ptr, TCGv_i32, TCGv); 3047cc351ffSPhilippe Mathieu-Daudé typedef void gen_helper_piii(TCGv_ptr, TCGv_i32, TCGv_i32, TCGv_i32); 305b8e74816SPhilippe Mathieu-Daudé typedef void gen_helper_piiii(TCGv_ptr, TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32); 306b8e74816SPhilippe Mathieu-Daudé 307ce121fe2SPhilippe Mathieu-Daudé #define TRANS_DF_x(TYPE, NAME, trans_func, gen_func) \ 308ce121fe2SPhilippe Mathieu-Daudé static gen_helper_p##TYPE * const NAME##_tab[4] = { \ 309ce121fe2SPhilippe Mathieu-Daudé gen_func##_b, gen_func##_h, gen_func##_w, gen_func##_d \ 310ce121fe2SPhilippe Mathieu-Daudé }; \ 311ce121fe2SPhilippe Mathieu-Daudé TRANS(NAME, trans_func, NAME##_tab[a->df]) 312ce121fe2SPhilippe Mathieu-Daudé 313ce121fe2SPhilippe Mathieu-Daudé #define TRANS_DF_iv(NAME, trans_func, gen_func) \ 314ce121fe2SPhilippe Mathieu-Daudé TRANS_DF_x(iv, NAME, trans_func, gen_func) 315ce121fe2SPhilippe Mathieu-Daudé 316a2b0a27dSPhilippe Mathieu-Daudé static void gen_check_zero_element(TCGv tresult, uint8_t df, uint8_t wt, 317a2b0a27dSPhilippe Mathieu-Daudé TCGCond cond) 318a2b0a27dSPhilippe Mathieu-Daudé { 319a2b0a27dSPhilippe Mathieu-Daudé /* generates tcg ops to check if any element is 0 */ 320a2b0a27dSPhilippe Mathieu-Daudé /* Note this function only works with MSA_WRLEN = 128 */ 32140f75c02SPhilippe Mathieu-Daudé uint64_t eval_zero_or_big = dup_const(df, 1); 32240f75c02SPhilippe Mathieu-Daudé uint64_t eval_big = eval_zero_or_big << ((8 << df) - 1); 323a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t0 = tcg_temp_new_i64(); 324a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t1 = tcg_temp_new_i64(); 32540f75c02SPhilippe Mathieu-Daudé 326a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_subi_i64(t0, msa_wr_d[wt << 1], eval_zero_or_big); 327a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andc_i64(t0, t0, msa_wr_d[wt << 1]); 328a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andi_i64(t0, t0, eval_big); 329a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_subi_i64(t1, msa_wr_d[(wt << 1) + 1], eval_zero_or_big); 330a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andc_i64(t1, t1, msa_wr_d[(wt << 1) + 1]); 331a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_andi_i64(t1, t1, eval_big); 332a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_or_i64(t0, t0, t1); 333a2b0a27dSPhilippe Mathieu-Daudé /* if all bits are zero then all elements are not zero */ 334a2b0a27dSPhilippe Mathieu-Daudé /* if some bit is non-zero then some element is zero */ 335a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_setcondi_i64(cond, t0, t0, 0); 336a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_trunc_i64_tl(tresult, t0); 337a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t0); 338a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t1); 339a2b0a27dSPhilippe Mathieu-Daudé } 340a2b0a27dSPhilippe Mathieu-Daudé 341d61566cfSPhilippe Mathieu-Daudé static bool gen_msa_BxZ_V(DisasContext *ctx, int wt, int sa, TCGCond cond) 342a2b0a27dSPhilippe Mathieu-Daudé { 343a2b0a27dSPhilippe Mathieu-Daudé TCGv_i64 t0; 344a2b0a27dSPhilippe Mathieu-Daudé 345340ee8b3SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 346340ee8b3SPhilippe Mathieu-Daudé return true; 347340ee8b3SPhilippe Mathieu-Daudé } 348a2b0a27dSPhilippe Mathieu-Daudé 349a2b0a27dSPhilippe Mathieu-Daudé if (ctx->hflags & MIPS_HFLAG_BMASK) { 350a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 351a2b0a27dSPhilippe Mathieu-Daudé return true; 352a2b0a27dSPhilippe Mathieu-Daudé } 353a2b0a27dSPhilippe Mathieu-Daudé t0 = tcg_temp_new_i64(); 354a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_or_i64(t0, msa_wr_d[wt << 1], msa_wr_d[(wt << 1) + 1]); 355a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_setcondi_i64(cond, t0, t0, 0); 356a2b0a27dSPhilippe Mathieu-Daudé tcg_gen_trunc_i64_tl(bcond, t0); 357a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i64(t0); 358a2b0a27dSPhilippe Mathieu-Daudé 359d61566cfSPhilippe Mathieu-Daudé ctx->btarget = ctx->base.pc_next + (sa << 2) + 4; 360a2b0a27dSPhilippe Mathieu-Daudé 361a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BC; 362a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BDS32; 363a2b0a27dSPhilippe Mathieu-Daudé 364a2b0a27dSPhilippe Mathieu-Daudé return true; 365a2b0a27dSPhilippe Mathieu-Daudé } 366a2b0a27dSPhilippe Mathieu-Daudé 367a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BZ_V(DisasContext *ctx, arg_msa_bz *a) 368a2b0a27dSPhilippe Mathieu-Daudé { 369d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ_V(ctx, a->wt, a->sa, TCG_COND_EQ); 370a2b0a27dSPhilippe Mathieu-Daudé } 371a2b0a27dSPhilippe Mathieu-Daudé 372a2b0a27dSPhilippe Mathieu-Daudé static bool trans_BNZ_V(DisasContext *ctx, arg_msa_bz *a) 373a2b0a27dSPhilippe Mathieu-Daudé { 374d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ_V(ctx, a->wt, a->sa, TCG_COND_NE); 375a2b0a27dSPhilippe Mathieu-Daudé } 376a2b0a27dSPhilippe Mathieu-Daudé 377d61566cfSPhilippe Mathieu-Daudé static bool gen_msa_BxZ(DisasContext *ctx, int df, int wt, int sa, bool if_not) 378a2b0a27dSPhilippe Mathieu-Daudé { 379340ee8b3SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 380340ee8b3SPhilippe Mathieu-Daudé return true; 381340ee8b3SPhilippe Mathieu-Daudé } 382a2b0a27dSPhilippe Mathieu-Daudé 383a2b0a27dSPhilippe Mathieu-Daudé if (ctx->hflags & MIPS_HFLAG_BMASK) { 384a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 385a2b0a27dSPhilippe Mathieu-Daudé return true; 386a2b0a27dSPhilippe Mathieu-Daudé } 387a2b0a27dSPhilippe Mathieu-Daudé 388a2b0a27dSPhilippe Mathieu-Daudé gen_check_zero_element(bcond, df, wt, if_not ? TCG_COND_EQ : TCG_COND_NE); 389a2b0a27dSPhilippe Mathieu-Daudé 390d61566cfSPhilippe Mathieu-Daudé ctx->btarget = ctx->base.pc_next + (sa << 2) + 4; 391a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BC; 392a2b0a27dSPhilippe Mathieu-Daudé ctx->hflags |= MIPS_HFLAG_BDS32; 393a2b0a27dSPhilippe Mathieu-Daudé 394a2b0a27dSPhilippe Mathieu-Daudé return true; 395a2b0a27dSPhilippe Mathieu-Daudé } 396a2b0a27dSPhilippe Mathieu-Daudé 397d61566cfSPhilippe Mathieu-Daudé static bool trans_BZ(DisasContext *ctx, arg_msa_bz *a) 398a2b0a27dSPhilippe Mathieu-Daudé { 399d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ(ctx, a->df, a->wt, a->sa, false); 400a2b0a27dSPhilippe Mathieu-Daudé } 401a2b0a27dSPhilippe Mathieu-Daudé 402d61566cfSPhilippe Mathieu-Daudé static bool trans_BNZ(DisasContext *ctx, arg_msa_bz *a) 403a2b0a27dSPhilippe Mathieu-Daudé { 404d61566cfSPhilippe Mathieu-Daudé return gen_msa_BxZ(ctx, a->df, a->wt, a->sa, true); 405a2b0a27dSPhilippe Mathieu-Daudé } 406a2b0a27dSPhilippe Mathieu-Daudé 4077cc351ffSPhilippe Mathieu-Daudé static bool trans_msa_i8(DisasContext *ctx, arg_msa_i *a, 4087cc351ffSPhilippe Mathieu-Daudé gen_helper_piii *gen_msa_i8) 409a2b0a27dSPhilippe Mathieu-Daudé { 4107cc351ffSPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 4117cc351ffSPhilippe Mathieu-Daudé return true; 412a2b0a27dSPhilippe Mathieu-Daudé } 413a2b0a27dSPhilippe Mathieu-Daudé 4147cc351ffSPhilippe Mathieu-Daudé gen_msa_i8(cpu_env, 4157cc351ffSPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 4167cc351ffSPhilippe Mathieu-Daudé tcg_constant_i32(a->ws), 4177cc351ffSPhilippe Mathieu-Daudé tcg_constant_i32(a->sa)); 4187cc351ffSPhilippe Mathieu-Daudé 4197cc351ffSPhilippe Mathieu-Daudé return true; 420a2b0a27dSPhilippe Mathieu-Daudé } 421a2b0a27dSPhilippe Mathieu-Daudé 4227cc351ffSPhilippe Mathieu-Daudé TRANS(ANDI, trans_msa_i8, gen_helper_msa_andi_b); 4237cc351ffSPhilippe Mathieu-Daudé TRANS(ORI, trans_msa_i8, gen_helper_msa_ori_b); 4247cc351ffSPhilippe Mathieu-Daudé TRANS(NORI, trans_msa_i8, gen_helper_msa_nori_b); 4257cc351ffSPhilippe Mathieu-Daudé TRANS(XORI, trans_msa_i8, gen_helper_msa_xori_b); 4267cc351ffSPhilippe Mathieu-Daudé TRANS(BMNZI, trans_msa_i8, gen_helper_msa_bmnzi_b); 4277cc351ffSPhilippe Mathieu-Daudé TRANS(BMZI, trans_msa_i8, gen_helper_msa_bmzi_b); 4287cc351ffSPhilippe Mathieu-Daudé TRANS(BSELI, trans_msa_i8, gen_helper_msa_bseli_b); 4297cc351ffSPhilippe Mathieu-Daudé 430a9e17958SPhilippe Mathieu-Daudé static bool trans_SHF(DisasContext *ctx, arg_msa_i *a) 431a9e17958SPhilippe Mathieu-Daudé { 432a9e17958SPhilippe Mathieu-Daudé if (a->df == DF_DOUBLE) { 433a9e17958SPhilippe Mathieu-Daudé return false; 434a9e17958SPhilippe Mathieu-Daudé } 435a9e17958SPhilippe Mathieu-Daudé 436a9e17958SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 437a9e17958SPhilippe Mathieu-Daudé return true; 438a9e17958SPhilippe Mathieu-Daudé } 439a9e17958SPhilippe Mathieu-Daudé 440a9e17958SPhilippe Mathieu-Daudé gen_helper_msa_shf_df(cpu_env, 441a9e17958SPhilippe Mathieu-Daudé tcg_constant_i32(a->df), 442a9e17958SPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 443a9e17958SPhilippe Mathieu-Daudé tcg_constant_i32(a->ws), 444a9e17958SPhilippe Mathieu-Daudé tcg_constant_i32(a->sa)); 445a9e17958SPhilippe Mathieu-Daudé 446a9e17958SPhilippe Mathieu-Daudé return true; 447a9e17958SPhilippe Mathieu-Daudé } 448a9e17958SPhilippe Mathieu-Daudé 449b8e74816SPhilippe Mathieu-Daudé static bool trans_msa_i5(DisasContext *ctx, arg_msa_i *a, 450b8e74816SPhilippe Mathieu-Daudé gen_helper_piiii *gen_msa_i5) 451a2b0a27dSPhilippe Mathieu-Daudé { 452b8e74816SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 453b8e74816SPhilippe Mathieu-Daudé return true; 454a2b0a27dSPhilippe Mathieu-Daudé } 455a2b0a27dSPhilippe Mathieu-Daudé 456b8e74816SPhilippe Mathieu-Daudé gen_msa_i5(cpu_env, 457b8e74816SPhilippe Mathieu-Daudé tcg_constant_i32(a->df), 458b8e74816SPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 459b8e74816SPhilippe Mathieu-Daudé tcg_constant_i32(a->ws), 460b8e74816SPhilippe Mathieu-Daudé tcg_constant_i32(a->sa)); 461b8e74816SPhilippe Mathieu-Daudé 462b8e74816SPhilippe Mathieu-Daudé return true; 463a2b0a27dSPhilippe Mathieu-Daudé } 464a2b0a27dSPhilippe Mathieu-Daudé 465b8e74816SPhilippe Mathieu-Daudé TRANS(ADDVI, trans_msa_i5, gen_helper_msa_addvi_df); 466b8e74816SPhilippe Mathieu-Daudé TRANS(SUBVI, trans_msa_i5, gen_helper_msa_subvi_df); 467b8e74816SPhilippe Mathieu-Daudé TRANS(MAXI_S, trans_msa_i5, gen_helper_msa_maxi_s_df); 468b8e74816SPhilippe Mathieu-Daudé TRANS(MAXI_U, trans_msa_i5, gen_helper_msa_maxi_u_df); 469b8e74816SPhilippe Mathieu-Daudé TRANS(MINI_S, trans_msa_i5, gen_helper_msa_mini_s_df); 470b8e74816SPhilippe Mathieu-Daudé TRANS(MINI_U, trans_msa_i5, gen_helper_msa_mini_u_df); 471b8e74816SPhilippe Mathieu-Daudé TRANS(CLTI_S, trans_msa_i5, gen_helper_msa_clti_s_df); 472b8e74816SPhilippe Mathieu-Daudé TRANS(CLTI_U, trans_msa_i5, gen_helper_msa_clti_u_df); 473b8e74816SPhilippe Mathieu-Daudé TRANS(CLEI_S, trans_msa_i5, gen_helper_msa_clei_s_df); 474b8e74816SPhilippe Mathieu-Daudé TRANS(CLEI_U, trans_msa_i5, gen_helper_msa_clei_u_df); 475b8e74816SPhilippe Mathieu-Daudé TRANS(CEQI, trans_msa_i5, gen_helper_msa_ceqi_df); 476b8e74816SPhilippe Mathieu-Daudé 47775094c33SPhilippe Mathieu-Daudé static bool trans_LDI(DisasContext *ctx, arg_msa_ldi *a) 47875094c33SPhilippe Mathieu-Daudé { 47975094c33SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 48075094c33SPhilippe Mathieu-Daudé return true; 48175094c33SPhilippe Mathieu-Daudé } 48275094c33SPhilippe Mathieu-Daudé 48375094c33SPhilippe Mathieu-Daudé gen_helper_msa_ldi_df(cpu_env, 48475094c33SPhilippe Mathieu-Daudé tcg_constant_i32(a->df), 48575094c33SPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 48675094c33SPhilippe Mathieu-Daudé tcg_constant_i32(a->sa)); 48775094c33SPhilippe Mathieu-Daudé 48875094c33SPhilippe Mathieu-Daudé return true; 48975094c33SPhilippe Mathieu-Daudé } 49075094c33SPhilippe Mathieu-Daudé 4914701d23aSPhilippe Mathieu-Daudé static bool trans_msa_bit(DisasContext *ctx, arg_msa_bit *a, 4924701d23aSPhilippe Mathieu-Daudé gen_helper_piiii *gen_msa_bit) 493a2b0a27dSPhilippe Mathieu-Daudé { 4944701d23aSPhilippe Mathieu-Daudé if (a->df < 0) { 4954701d23aSPhilippe Mathieu-Daudé return false; 496a2b0a27dSPhilippe Mathieu-Daudé } 497a2b0a27dSPhilippe Mathieu-Daudé 4984701d23aSPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 4994701d23aSPhilippe Mathieu-Daudé return true; 500a2b0a27dSPhilippe Mathieu-Daudé } 501a2b0a27dSPhilippe Mathieu-Daudé 5024701d23aSPhilippe Mathieu-Daudé gen_msa_bit(cpu_env, 5034701d23aSPhilippe Mathieu-Daudé tcg_constant_i32(a->df), 5044701d23aSPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 5054701d23aSPhilippe Mathieu-Daudé tcg_constant_i32(a->ws), 5064701d23aSPhilippe Mathieu-Daudé tcg_constant_i32(a->m)); 5074701d23aSPhilippe Mathieu-Daudé 5084701d23aSPhilippe Mathieu-Daudé return true; 509a2b0a27dSPhilippe Mathieu-Daudé } 510a2b0a27dSPhilippe Mathieu-Daudé 5114701d23aSPhilippe Mathieu-Daudé TRANS(SLLI, trans_msa_bit, gen_helper_msa_slli_df); 5124701d23aSPhilippe Mathieu-Daudé TRANS(SRAI, trans_msa_bit, gen_helper_msa_srai_df); 5134701d23aSPhilippe Mathieu-Daudé TRANS(SRLI, trans_msa_bit, gen_helper_msa_srli_df); 5144701d23aSPhilippe Mathieu-Daudé TRANS(BCLRI, trans_msa_bit, gen_helper_msa_bclri_df); 5154701d23aSPhilippe Mathieu-Daudé TRANS(BSETI, trans_msa_bit, gen_helper_msa_bseti_df); 5164701d23aSPhilippe Mathieu-Daudé TRANS(BNEGI, trans_msa_bit, gen_helper_msa_bnegi_df); 5174701d23aSPhilippe Mathieu-Daudé TRANS(BINSLI, trans_msa_bit, gen_helper_msa_binsli_df); 5184701d23aSPhilippe Mathieu-Daudé TRANS(BINSRI, trans_msa_bit, gen_helper_msa_binsri_df); 5194701d23aSPhilippe Mathieu-Daudé TRANS(SAT_S, trans_msa_bit, gen_helper_msa_sat_u_df); 5204701d23aSPhilippe Mathieu-Daudé TRANS(SAT_U, trans_msa_bit, gen_helper_msa_sat_u_df); 5214701d23aSPhilippe Mathieu-Daudé TRANS(SRARI, trans_msa_bit, gen_helper_msa_srari_df); 5224701d23aSPhilippe Mathieu-Daudé TRANS(SRLRI, trans_msa_bit, gen_helper_msa_srlri_df); 5234701d23aSPhilippe Mathieu-Daudé 524a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_3r(DisasContext *ctx) 525a2b0a27dSPhilippe Mathieu-Daudé { 526a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_3R(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) 527a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 21) & 0x3; 528a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 529a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 530a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 531a2b0a27dSPhilippe Mathieu-Daudé 532a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_const_i32(df); 533a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 534a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 535a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 536a2b0a27dSPhilippe Mathieu-Daudé 537a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3R(ctx->opcode)) { 538a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSL_df: 539a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 540a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 541a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_b(cpu_env, twd, tws, twt); 542a2b0a27dSPhilippe Mathieu-Daudé break; 543a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 544a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_h(cpu_env, twd, tws, twt); 545a2b0a27dSPhilippe Mathieu-Daudé break; 546a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 547a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_w(cpu_env, twd, tws, twt); 548a2b0a27dSPhilippe Mathieu-Daudé break; 549a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 550a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsl_d(cpu_env, twd, tws, twt); 551a2b0a27dSPhilippe Mathieu-Daudé break; 552a2b0a27dSPhilippe Mathieu-Daudé } 553a2b0a27dSPhilippe Mathieu-Daudé break; 554a2b0a27dSPhilippe Mathieu-Daudé case OPC_BINSR_df: 555a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 556a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 557a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_b(cpu_env, twd, tws, twt); 558a2b0a27dSPhilippe Mathieu-Daudé break; 559a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 560a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_h(cpu_env, twd, tws, twt); 561a2b0a27dSPhilippe Mathieu-Daudé break; 562a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 563a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_w(cpu_env, twd, tws, twt); 564a2b0a27dSPhilippe Mathieu-Daudé break; 565a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 566a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_binsr_d(cpu_env, twd, tws, twt); 567a2b0a27dSPhilippe Mathieu-Daudé break; 568a2b0a27dSPhilippe Mathieu-Daudé } 569a2b0a27dSPhilippe Mathieu-Daudé break; 570a2b0a27dSPhilippe Mathieu-Daudé case OPC_BCLR_df: 571a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 572a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 573a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_b(cpu_env, twd, tws, twt); 574a2b0a27dSPhilippe Mathieu-Daudé break; 575a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 576a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_h(cpu_env, twd, tws, twt); 577a2b0a27dSPhilippe Mathieu-Daudé break; 578a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 579a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_w(cpu_env, twd, tws, twt); 580a2b0a27dSPhilippe Mathieu-Daudé break; 581a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 582a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bclr_d(cpu_env, twd, tws, twt); 583a2b0a27dSPhilippe Mathieu-Daudé break; 584a2b0a27dSPhilippe Mathieu-Daudé } 585a2b0a27dSPhilippe Mathieu-Daudé break; 586a2b0a27dSPhilippe Mathieu-Daudé case OPC_BNEG_df: 587a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 588a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 589a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_b(cpu_env, twd, tws, twt); 590a2b0a27dSPhilippe Mathieu-Daudé break; 591a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 592a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_h(cpu_env, twd, tws, twt); 593a2b0a27dSPhilippe Mathieu-Daudé break; 594a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 595a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_w(cpu_env, twd, tws, twt); 596a2b0a27dSPhilippe Mathieu-Daudé break; 597a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 598a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bneg_d(cpu_env, twd, tws, twt); 599a2b0a27dSPhilippe Mathieu-Daudé break; 600a2b0a27dSPhilippe Mathieu-Daudé } 601a2b0a27dSPhilippe Mathieu-Daudé break; 602a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSET_df: 603a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 604a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 605a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_b(cpu_env, twd, tws, twt); 606a2b0a27dSPhilippe Mathieu-Daudé break; 607a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 608a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_h(cpu_env, twd, tws, twt); 609a2b0a27dSPhilippe Mathieu-Daudé break; 610a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 611a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_w(cpu_env, twd, tws, twt); 612a2b0a27dSPhilippe Mathieu-Daudé break; 613a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 614a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bset_d(cpu_env, twd, tws, twt); 615a2b0a27dSPhilippe Mathieu-Daudé break; 616a2b0a27dSPhilippe Mathieu-Daudé } 617a2b0a27dSPhilippe Mathieu-Daudé break; 618a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADD_A_df: 619a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 620a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 621a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_b(cpu_env, twd, tws, twt); 622a2b0a27dSPhilippe Mathieu-Daudé break; 623a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 624a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_h(cpu_env, twd, tws, twt); 625a2b0a27dSPhilippe Mathieu-Daudé break; 626a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 627a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_w(cpu_env, twd, tws, twt); 628a2b0a27dSPhilippe Mathieu-Daudé break; 629a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 630a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_add_a_d(cpu_env, twd, tws, twt); 631a2b0a27dSPhilippe Mathieu-Daudé break; 632a2b0a27dSPhilippe Mathieu-Daudé } 633a2b0a27dSPhilippe Mathieu-Daudé break; 634a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_A_df: 635a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 636a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 637a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_b(cpu_env, twd, tws, twt); 638a2b0a27dSPhilippe Mathieu-Daudé break; 639a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 640a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_h(cpu_env, twd, tws, twt); 641a2b0a27dSPhilippe Mathieu-Daudé break; 642a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 643a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_w(cpu_env, twd, tws, twt); 644a2b0a27dSPhilippe Mathieu-Daudé break; 645a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 646a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_a_d(cpu_env, twd, tws, twt); 647a2b0a27dSPhilippe Mathieu-Daudé break; 648a2b0a27dSPhilippe Mathieu-Daudé } 649a2b0a27dSPhilippe Mathieu-Daudé break; 650a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_S_df: 651a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 652a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 653a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_b(cpu_env, twd, tws, twt); 654a2b0a27dSPhilippe Mathieu-Daudé break; 655a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 656a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_h(cpu_env, twd, tws, twt); 657a2b0a27dSPhilippe Mathieu-Daudé break; 658a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 659a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_w(cpu_env, twd, tws, twt); 660a2b0a27dSPhilippe Mathieu-Daudé break; 661a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 662a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_s_d(cpu_env, twd, tws, twt); 663a2b0a27dSPhilippe Mathieu-Daudé break; 664a2b0a27dSPhilippe Mathieu-Daudé } 665a2b0a27dSPhilippe Mathieu-Daudé break; 666a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDS_U_df: 667a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 668a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 669a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_b(cpu_env, twd, tws, twt); 670a2b0a27dSPhilippe Mathieu-Daudé break; 671a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 672a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_h(cpu_env, twd, tws, twt); 673a2b0a27dSPhilippe Mathieu-Daudé break; 674a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 675a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_w(cpu_env, twd, tws, twt); 676a2b0a27dSPhilippe Mathieu-Daudé break; 677a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 678a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_adds_u_d(cpu_env, twd, tws, twt); 679a2b0a27dSPhilippe Mathieu-Daudé break; 680a2b0a27dSPhilippe Mathieu-Daudé } 681a2b0a27dSPhilippe Mathieu-Daudé break; 682a2b0a27dSPhilippe Mathieu-Daudé case OPC_ADDV_df: 683a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 684a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 685a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_b(cpu_env, twd, tws, twt); 686a2b0a27dSPhilippe Mathieu-Daudé break; 687a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 688a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_h(cpu_env, twd, tws, twt); 689a2b0a27dSPhilippe Mathieu-Daudé break; 690a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 691a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_w(cpu_env, twd, tws, twt); 692a2b0a27dSPhilippe Mathieu-Daudé break; 693a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 694a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_addv_d(cpu_env, twd, tws, twt); 695a2b0a27dSPhilippe Mathieu-Daudé break; 696a2b0a27dSPhilippe Mathieu-Daudé } 697a2b0a27dSPhilippe Mathieu-Daudé break; 698a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVE_S_df: 699a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 700a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 701a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_b(cpu_env, twd, tws, twt); 702a2b0a27dSPhilippe Mathieu-Daudé break; 703a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 704a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_h(cpu_env, twd, tws, twt); 705a2b0a27dSPhilippe Mathieu-Daudé break; 706a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 707a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_w(cpu_env, twd, tws, twt); 708a2b0a27dSPhilippe Mathieu-Daudé break; 709a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 710a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_s_d(cpu_env, twd, tws, twt); 711a2b0a27dSPhilippe Mathieu-Daudé break; 712a2b0a27dSPhilippe Mathieu-Daudé } 713a2b0a27dSPhilippe Mathieu-Daudé break; 714a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVE_U_df: 715a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 716a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 717a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_b(cpu_env, twd, tws, twt); 718a2b0a27dSPhilippe Mathieu-Daudé break; 719a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 720a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_h(cpu_env, twd, tws, twt); 721a2b0a27dSPhilippe Mathieu-Daudé break; 722a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 723a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_w(cpu_env, twd, tws, twt); 724a2b0a27dSPhilippe Mathieu-Daudé break; 725a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 726a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ave_u_d(cpu_env, twd, tws, twt); 727a2b0a27dSPhilippe Mathieu-Daudé break; 728a2b0a27dSPhilippe Mathieu-Daudé } 729a2b0a27dSPhilippe Mathieu-Daudé break; 730a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVER_S_df: 731a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 732a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 733a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_b(cpu_env, twd, tws, twt); 734a2b0a27dSPhilippe Mathieu-Daudé break; 735a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 736a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_h(cpu_env, twd, tws, twt); 737a2b0a27dSPhilippe Mathieu-Daudé break; 738a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 739a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_w(cpu_env, twd, tws, twt); 740a2b0a27dSPhilippe Mathieu-Daudé break; 741a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 742a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_s_d(cpu_env, twd, tws, twt); 743a2b0a27dSPhilippe Mathieu-Daudé break; 744a2b0a27dSPhilippe Mathieu-Daudé } 745a2b0a27dSPhilippe Mathieu-Daudé break; 746a2b0a27dSPhilippe Mathieu-Daudé case OPC_AVER_U_df: 747a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 748a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 749a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_b(cpu_env, twd, tws, twt); 750a2b0a27dSPhilippe Mathieu-Daudé break; 751a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 752a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_h(cpu_env, twd, tws, twt); 753a2b0a27dSPhilippe Mathieu-Daudé break; 754a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 755a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_w(cpu_env, twd, tws, twt); 756a2b0a27dSPhilippe Mathieu-Daudé break; 757a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 758a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_aver_u_d(cpu_env, twd, tws, twt); 759a2b0a27dSPhilippe Mathieu-Daudé break; 760a2b0a27dSPhilippe Mathieu-Daudé } 761a2b0a27dSPhilippe Mathieu-Daudé break; 762a2b0a27dSPhilippe Mathieu-Daudé case OPC_CEQ_df: 763a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 764a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 765a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_b(cpu_env, twd, tws, twt); 766a2b0a27dSPhilippe Mathieu-Daudé break; 767a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 768a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_h(cpu_env, twd, tws, twt); 769a2b0a27dSPhilippe Mathieu-Daudé break; 770a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 771a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_w(cpu_env, twd, tws, twt); 772a2b0a27dSPhilippe Mathieu-Daudé break; 773a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 774a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ceq_d(cpu_env, twd, tws, twt); 775a2b0a27dSPhilippe Mathieu-Daudé break; 776a2b0a27dSPhilippe Mathieu-Daudé } 777a2b0a27dSPhilippe Mathieu-Daudé break; 778a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLE_S_df: 779a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 780a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 781a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_b(cpu_env, twd, tws, twt); 782a2b0a27dSPhilippe Mathieu-Daudé break; 783a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 784a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_h(cpu_env, twd, tws, twt); 785a2b0a27dSPhilippe Mathieu-Daudé break; 786a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 787a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_w(cpu_env, twd, tws, twt); 788a2b0a27dSPhilippe Mathieu-Daudé break; 789a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 790a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_s_d(cpu_env, twd, tws, twt); 791a2b0a27dSPhilippe Mathieu-Daudé break; 792a2b0a27dSPhilippe Mathieu-Daudé } 793a2b0a27dSPhilippe Mathieu-Daudé break; 794a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLE_U_df: 795a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 796a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 797a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_b(cpu_env, twd, tws, twt); 798a2b0a27dSPhilippe Mathieu-Daudé break; 799a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 800a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_h(cpu_env, twd, tws, twt); 801a2b0a27dSPhilippe Mathieu-Daudé break; 802a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 803a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_w(cpu_env, twd, tws, twt); 804a2b0a27dSPhilippe Mathieu-Daudé break; 805a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 806a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cle_u_d(cpu_env, twd, tws, twt); 807a2b0a27dSPhilippe Mathieu-Daudé break; 808a2b0a27dSPhilippe Mathieu-Daudé } 809a2b0a27dSPhilippe Mathieu-Daudé break; 810a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLT_S_df: 811a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 812a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 813a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_b(cpu_env, twd, tws, twt); 814a2b0a27dSPhilippe Mathieu-Daudé break; 815a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 816a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_h(cpu_env, twd, tws, twt); 817a2b0a27dSPhilippe Mathieu-Daudé break; 818a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 819a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_w(cpu_env, twd, tws, twt); 820a2b0a27dSPhilippe Mathieu-Daudé break; 821a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 822a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_s_d(cpu_env, twd, tws, twt); 823a2b0a27dSPhilippe Mathieu-Daudé break; 824a2b0a27dSPhilippe Mathieu-Daudé } 825a2b0a27dSPhilippe Mathieu-Daudé break; 826a2b0a27dSPhilippe Mathieu-Daudé case OPC_CLT_U_df: 827a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 828a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 829a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_b(cpu_env, twd, tws, twt); 830a2b0a27dSPhilippe Mathieu-Daudé break; 831a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 832a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_h(cpu_env, twd, tws, twt); 833a2b0a27dSPhilippe Mathieu-Daudé break; 834a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 835a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_w(cpu_env, twd, tws, twt); 836a2b0a27dSPhilippe Mathieu-Daudé break; 837a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 838a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_clt_u_d(cpu_env, twd, tws, twt); 839a2b0a27dSPhilippe Mathieu-Daudé break; 840a2b0a27dSPhilippe Mathieu-Daudé } 841a2b0a27dSPhilippe Mathieu-Daudé break; 842a2b0a27dSPhilippe Mathieu-Daudé case OPC_DIV_S_df: 843a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 844a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 845a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_b(cpu_env, twd, tws, twt); 846a2b0a27dSPhilippe Mathieu-Daudé break; 847a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 848a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_h(cpu_env, twd, tws, twt); 849a2b0a27dSPhilippe Mathieu-Daudé break; 850a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 851a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_w(cpu_env, twd, tws, twt); 852a2b0a27dSPhilippe Mathieu-Daudé break; 853a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 854a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_s_d(cpu_env, twd, tws, twt); 855a2b0a27dSPhilippe Mathieu-Daudé break; 856a2b0a27dSPhilippe Mathieu-Daudé } 857a2b0a27dSPhilippe Mathieu-Daudé break; 858a2b0a27dSPhilippe Mathieu-Daudé case OPC_DIV_U_df: 859a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 860a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 861a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_b(cpu_env, twd, tws, twt); 862a2b0a27dSPhilippe Mathieu-Daudé break; 863a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 864a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_h(cpu_env, twd, tws, twt); 865a2b0a27dSPhilippe Mathieu-Daudé break; 866a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 867a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_w(cpu_env, twd, tws, twt); 868a2b0a27dSPhilippe Mathieu-Daudé break; 869a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 870a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_div_u_d(cpu_env, twd, tws, twt); 871a2b0a27dSPhilippe Mathieu-Daudé break; 872a2b0a27dSPhilippe Mathieu-Daudé } 873a2b0a27dSPhilippe Mathieu-Daudé break; 874a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_A_df: 875a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 876a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 877a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_b(cpu_env, twd, tws, twt); 878a2b0a27dSPhilippe Mathieu-Daudé break; 879a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 880a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_h(cpu_env, twd, tws, twt); 881a2b0a27dSPhilippe Mathieu-Daudé break; 882a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 883a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_w(cpu_env, twd, tws, twt); 884a2b0a27dSPhilippe Mathieu-Daudé break; 885a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 886a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_a_d(cpu_env, twd, tws, twt); 887a2b0a27dSPhilippe Mathieu-Daudé break; 888a2b0a27dSPhilippe Mathieu-Daudé } 889a2b0a27dSPhilippe Mathieu-Daudé break; 890a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_S_df: 891a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 892a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 893a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_b(cpu_env, twd, tws, twt); 894a2b0a27dSPhilippe Mathieu-Daudé break; 895a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 896a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_h(cpu_env, twd, tws, twt); 897a2b0a27dSPhilippe Mathieu-Daudé break; 898a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 899a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_w(cpu_env, twd, tws, twt); 900a2b0a27dSPhilippe Mathieu-Daudé break; 901a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 902a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_s_d(cpu_env, twd, tws, twt); 903a2b0a27dSPhilippe Mathieu-Daudé break; 904a2b0a27dSPhilippe Mathieu-Daudé } 905a2b0a27dSPhilippe Mathieu-Daudé break; 906a2b0a27dSPhilippe Mathieu-Daudé case OPC_MAX_U_df: 907a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 908a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 909a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_b(cpu_env, twd, tws, twt); 910a2b0a27dSPhilippe Mathieu-Daudé break; 911a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 912a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_h(cpu_env, twd, tws, twt); 913a2b0a27dSPhilippe Mathieu-Daudé break; 914a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 915a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_w(cpu_env, twd, tws, twt); 916a2b0a27dSPhilippe Mathieu-Daudé break; 917a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 918a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_max_u_d(cpu_env, twd, tws, twt); 919a2b0a27dSPhilippe Mathieu-Daudé break; 920a2b0a27dSPhilippe Mathieu-Daudé } 921a2b0a27dSPhilippe Mathieu-Daudé break; 922a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_A_df: 923a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 924a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 925a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_b(cpu_env, twd, tws, twt); 926a2b0a27dSPhilippe Mathieu-Daudé break; 927a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 928a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_h(cpu_env, twd, tws, twt); 929a2b0a27dSPhilippe Mathieu-Daudé break; 930a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 931a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_w(cpu_env, twd, tws, twt); 932a2b0a27dSPhilippe Mathieu-Daudé break; 933a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 934a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_a_d(cpu_env, twd, tws, twt); 935a2b0a27dSPhilippe Mathieu-Daudé break; 936a2b0a27dSPhilippe Mathieu-Daudé } 937a2b0a27dSPhilippe Mathieu-Daudé break; 938a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_S_df: 939a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 940a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 941a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_b(cpu_env, twd, tws, twt); 942a2b0a27dSPhilippe Mathieu-Daudé break; 943a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 944a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_h(cpu_env, twd, tws, twt); 945a2b0a27dSPhilippe Mathieu-Daudé break; 946a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 947a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_w(cpu_env, twd, tws, twt); 948a2b0a27dSPhilippe Mathieu-Daudé break; 949a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 950a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_s_d(cpu_env, twd, tws, twt); 951a2b0a27dSPhilippe Mathieu-Daudé break; 952a2b0a27dSPhilippe Mathieu-Daudé } 953a2b0a27dSPhilippe Mathieu-Daudé break; 954a2b0a27dSPhilippe Mathieu-Daudé case OPC_MIN_U_df: 955a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 956a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 957a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_b(cpu_env, twd, tws, twt); 958a2b0a27dSPhilippe Mathieu-Daudé break; 959a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 960a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_h(cpu_env, twd, tws, twt); 961a2b0a27dSPhilippe Mathieu-Daudé break; 962a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 963a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_w(cpu_env, twd, tws, twt); 964a2b0a27dSPhilippe Mathieu-Daudé break; 965a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 966a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_min_u_d(cpu_env, twd, tws, twt); 967a2b0a27dSPhilippe Mathieu-Daudé break; 968a2b0a27dSPhilippe Mathieu-Daudé } 969a2b0a27dSPhilippe Mathieu-Daudé break; 970a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOD_S_df: 971a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 972a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 973a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_b(cpu_env, twd, tws, twt); 974a2b0a27dSPhilippe Mathieu-Daudé break; 975a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 976a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_h(cpu_env, twd, tws, twt); 977a2b0a27dSPhilippe Mathieu-Daudé break; 978a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 979a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_w(cpu_env, twd, tws, twt); 980a2b0a27dSPhilippe Mathieu-Daudé break; 981a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 982a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_s_d(cpu_env, twd, tws, twt); 983a2b0a27dSPhilippe Mathieu-Daudé break; 984a2b0a27dSPhilippe Mathieu-Daudé } 985a2b0a27dSPhilippe Mathieu-Daudé break; 986a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOD_U_df: 987a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 988a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 989a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_b(cpu_env, twd, tws, twt); 990a2b0a27dSPhilippe Mathieu-Daudé break; 991a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 992a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_h(cpu_env, twd, tws, twt); 993a2b0a27dSPhilippe Mathieu-Daudé break; 994a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 995a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_w(cpu_env, twd, tws, twt); 996a2b0a27dSPhilippe Mathieu-Daudé break; 997a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 998a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mod_u_d(cpu_env, twd, tws, twt); 999a2b0a27dSPhilippe Mathieu-Daudé break; 1000a2b0a27dSPhilippe Mathieu-Daudé } 1001a2b0a27dSPhilippe Mathieu-Daudé break; 1002a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADDV_df: 1003a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1004a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1005a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_b(cpu_env, twd, tws, twt); 1006a2b0a27dSPhilippe Mathieu-Daudé break; 1007a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1008a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_h(cpu_env, twd, tws, twt); 1009a2b0a27dSPhilippe Mathieu-Daudé break; 1010a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1011a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_w(cpu_env, twd, tws, twt); 1012a2b0a27dSPhilippe Mathieu-Daudé break; 1013a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1014a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddv_d(cpu_env, twd, tws, twt); 1015a2b0a27dSPhilippe Mathieu-Daudé break; 1016a2b0a27dSPhilippe Mathieu-Daudé } 1017a2b0a27dSPhilippe Mathieu-Daudé break; 1018a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUBV_df: 1019a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1020a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1021a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_b(cpu_env, twd, tws, twt); 1022a2b0a27dSPhilippe Mathieu-Daudé break; 1023a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1024a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_h(cpu_env, twd, tws, twt); 1025a2b0a27dSPhilippe Mathieu-Daudé break; 1026a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1027a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_w(cpu_env, twd, tws, twt); 1028a2b0a27dSPhilippe Mathieu-Daudé break; 1029a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1030a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubv_d(cpu_env, twd, tws, twt); 1031a2b0a27dSPhilippe Mathieu-Daudé break; 1032a2b0a27dSPhilippe Mathieu-Daudé } 1033a2b0a27dSPhilippe Mathieu-Daudé break; 1034a2b0a27dSPhilippe Mathieu-Daudé case OPC_ASUB_S_df: 1035a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1036a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1037a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_b(cpu_env, twd, tws, twt); 1038a2b0a27dSPhilippe Mathieu-Daudé break; 1039a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1040a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_h(cpu_env, twd, tws, twt); 1041a2b0a27dSPhilippe Mathieu-Daudé break; 1042a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1043a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_w(cpu_env, twd, tws, twt); 1044a2b0a27dSPhilippe Mathieu-Daudé break; 1045a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1046a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_s_d(cpu_env, twd, tws, twt); 1047a2b0a27dSPhilippe Mathieu-Daudé break; 1048a2b0a27dSPhilippe Mathieu-Daudé } 1049a2b0a27dSPhilippe Mathieu-Daudé break; 1050a2b0a27dSPhilippe Mathieu-Daudé case OPC_ASUB_U_df: 1051a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1052a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1053a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_b(cpu_env, twd, tws, twt); 1054a2b0a27dSPhilippe Mathieu-Daudé break; 1055a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1056a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_h(cpu_env, twd, tws, twt); 1057a2b0a27dSPhilippe Mathieu-Daudé break; 1058a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1059a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_w(cpu_env, twd, tws, twt); 1060a2b0a27dSPhilippe Mathieu-Daudé break; 1061a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1062a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_asub_u_d(cpu_env, twd, tws, twt); 1063a2b0a27dSPhilippe Mathieu-Daudé break; 1064a2b0a27dSPhilippe Mathieu-Daudé } 1065a2b0a27dSPhilippe Mathieu-Daudé break; 1066a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVEV_df: 1067a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1068a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1069a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_b(cpu_env, twd, tws, twt); 1070a2b0a27dSPhilippe Mathieu-Daudé break; 1071a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1072a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_h(cpu_env, twd, tws, twt); 1073a2b0a27dSPhilippe Mathieu-Daudé break; 1074a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1075a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_w(cpu_env, twd, tws, twt); 1076a2b0a27dSPhilippe Mathieu-Daudé break; 1077a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1078a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvev_d(cpu_env, twd, tws, twt); 1079a2b0a27dSPhilippe Mathieu-Daudé break; 1080a2b0a27dSPhilippe Mathieu-Daudé } 1081a2b0a27dSPhilippe Mathieu-Daudé break; 1082a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVOD_df: 1083a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1084a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1085a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_b(cpu_env, twd, tws, twt); 1086a2b0a27dSPhilippe Mathieu-Daudé break; 1087a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1088a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_h(cpu_env, twd, tws, twt); 1089a2b0a27dSPhilippe Mathieu-Daudé break; 1090a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1091a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_w(cpu_env, twd, tws, twt); 1092a2b0a27dSPhilippe Mathieu-Daudé break; 1093a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1094a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvod_d(cpu_env, twd, tws, twt); 1095a2b0a27dSPhilippe Mathieu-Daudé break; 1096a2b0a27dSPhilippe Mathieu-Daudé } 1097a2b0a27dSPhilippe Mathieu-Daudé break; 1098a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVL_df: 1099a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1100a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1101a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_b(cpu_env, twd, tws, twt); 1102a2b0a27dSPhilippe Mathieu-Daudé break; 1103a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1104a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_h(cpu_env, twd, tws, twt); 1105a2b0a27dSPhilippe Mathieu-Daudé break; 1106a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1107a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_w(cpu_env, twd, tws, twt); 1108a2b0a27dSPhilippe Mathieu-Daudé break; 1109a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1110a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvl_d(cpu_env, twd, tws, twt); 1111a2b0a27dSPhilippe Mathieu-Daudé break; 1112a2b0a27dSPhilippe Mathieu-Daudé } 1113a2b0a27dSPhilippe Mathieu-Daudé break; 1114a2b0a27dSPhilippe Mathieu-Daudé case OPC_ILVR_df: 1115a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1116a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1117a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_b(cpu_env, twd, tws, twt); 1118a2b0a27dSPhilippe Mathieu-Daudé break; 1119a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1120a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_h(cpu_env, twd, tws, twt); 1121a2b0a27dSPhilippe Mathieu-Daudé break; 1122a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1123a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_w(cpu_env, twd, tws, twt); 1124a2b0a27dSPhilippe Mathieu-Daudé break; 1125a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1126a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ilvr_d(cpu_env, twd, tws, twt); 1127a2b0a27dSPhilippe Mathieu-Daudé break; 1128a2b0a27dSPhilippe Mathieu-Daudé } 1129a2b0a27dSPhilippe Mathieu-Daudé break; 1130a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCKEV_df: 1131a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1132a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1133a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_b(cpu_env, twd, tws, twt); 1134a2b0a27dSPhilippe Mathieu-Daudé break; 1135a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1136a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_h(cpu_env, twd, tws, twt); 1137a2b0a27dSPhilippe Mathieu-Daudé break; 1138a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1139a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_w(cpu_env, twd, tws, twt); 1140a2b0a27dSPhilippe Mathieu-Daudé break; 1141a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1142a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckev_d(cpu_env, twd, tws, twt); 1143a2b0a27dSPhilippe Mathieu-Daudé break; 1144a2b0a27dSPhilippe Mathieu-Daudé } 1145a2b0a27dSPhilippe Mathieu-Daudé break; 1146a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCKOD_df: 1147a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1148a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1149a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_b(cpu_env, twd, tws, twt); 1150a2b0a27dSPhilippe Mathieu-Daudé break; 1151a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1152a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_h(cpu_env, twd, tws, twt); 1153a2b0a27dSPhilippe Mathieu-Daudé break; 1154a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1155a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_w(cpu_env, twd, tws, twt); 1156a2b0a27dSPhilippe Mathieu-Daudé break; 1157a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1158a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pckod_d(cpu_env, twd, tws, twt); 1159a2b0a27dSPhilippe Mathieu-Daudé break; 1160a2b0a27dSPhilippe Mathieu-Daudé } 1161a2b0a27dSPhilippe Mathieu-Daudé break; 1162a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLL_df: 1163a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1164a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1165a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_b(cpu_env, twd, tws, twt); 1166a2b0a27dSPhilippe Mathieu-Daudé break; 1167a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1168a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_h(cpu_env, twd, tws, twt); 1169a2b0a27dSPhilippe Mathieu-Daudé break; 1170a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1171a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_w(cpu_env, twd, tws, twt); 1172a2b0a27dSPhilippe Mathieu-Daudé break; 1173a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1174a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sll_d(cpu_env, twd, tws, twt); 1175a2b0a27dSPhilippe Mathieu-Daudé break; 1176a2b0a27dSPhilippe Mathieu-Daudé } 1177a2b0a27dSPhilippe Mathieu-Daudé break; 1178a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRA_df: 1179a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1180a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1181a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_b(cpu_env, twd, tws, twt); 1182a2b0a27dSPhilippe Mathieu-Daudé break; 1183a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1184a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_h(cpu_env, twd, tws, twt); 1185a2b0a27dSPhilippe Mathieu-Daudé break; 1186a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1187a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_w(cpu_env, twd, tws, twt); 1188a2b0a27dSPhilippe Mathieu-Daudé break; 1189a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1190a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sra_d(cpu_env, twd, tws, twt); 1191a2b0a27dSPhilippe Mathieu-Daudé break; 1192a2b0a27dSPhilippe Mathieu-Daudé } 1193a2b0a27dSPhilippe Mathieu-Daudé break; 1194a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRAR_df: 1195a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1196a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1197a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_b(cpu_env, twd, tws, twt); 1198a2b0a27dSPhilippe Mathieu-Daudé break; 1199a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1200a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_h(cpu_env, twd, tws, twt); 1201a2b0a27dSPhilippe Mathieu-Daudé break; 1202a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1203a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_w(cpu_env, twd, tws, twt); 1204a2b0a27dSPhilippe Mathieu-Daudé break; 1205a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1206a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srar_d(cpu_env, twd, tws, twt); 1207a2b0a27dSPhilippe Mathieu-Daudé break; 1208a2b0a27dSPhilippe Mathieu-Daudé } 1209a2b0a27dSPhilippe Mathieu-Daudé break; 1210a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRL_df: 1211a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1212a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1213a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_b(cpu_env, twd, tws, twt); 1214a2b0a27dSPhilippe Mathieu-Daudé break; 1215a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1216a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_h(cpu_env, twd, tws, twt); 1217a2b0a27dSPhilippe Mathieu-Daudé break; 1218a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1219a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_w(cpu_env, twd, tws, twt); 1220a2b0a27dSPhilippe Mathieu-Daudé break; 1221a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1222a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srl_d(cpu_env, twd, tws, twt); 1223a2b0a27dSPhilippe Mathieu-Daudé break; 1224a2b0a27dSPhilippe Mathieu-Daudé } 1225a2b0a27dSPhilippe Mathieu-Daudé break; 1226a2b0a27dSPhilippe Mathieu-Daudé case OPC_SRLR_df: 1227a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1228a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1229a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_b(cpu_env, twd, tws, twt); 1230a2b0a27dSPhilippe Mathieu-Daudé break; 1231a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1232a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_h(cpu_env, twd, tws, twt); 1233a2b0a27dSPhilippe Mathieu-Daudé break; 1234a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1235a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_w(cpu_env, twd, tws, twt); 1236a2b0a27dSPhilippe Mathieu-Daudé break; 1237a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1238a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_srlr_d(cpu_env, twd, tws, twt); 1239a2b0a27dSPhilippe Mathieu-Daudé break; 1240a2b0a27dSPhilippe Mathieu-Daudé } 1241a2b0a27dSPhilippe Mathieu-Daudé break; 1242a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBS_S_df: 1243a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1244a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1245a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_b(cpu_env, twd, tws, twt); 1246a2b0a27dSPhilippe Mathieu-Daudé break; 1247a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1248a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_h(cpu_env, twd, tws, twt); 1249a2b0a27dSPhilippe Mathieu-Daudé break; 1250a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1251a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_w(cpu_env, twd, tws, twt); 1252a2b0a27dSPhilippe Mathieu-Daudé break; 1253a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1254a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_s_d(cpu_env, twd, tws, twt); 1255a2b0a27dSPhilippe Mathieu-Daudé break; 1256a2b0a27dSPhilippe Mathieu-Daudé } 1257a2b0a27dSPhilippe Mathieu-Daudé break; 1258a2b0a27dSPhilippe Mathieu-Daudé case OPC_MULV_df: 1259a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1260a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1261a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_b(cpu_env, twd, tws, twt); 1262a2b0a27dSPhilippe Mathieu-Daudé break; 1263a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1264a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_h(cpu_env, twd, tws, twt); 1265a2b0a27dSPhilippe Mathieu-Daudé break; 1266a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1267a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_w(cpu_env, twd, tws, twt); 1268a2b0a27dSPhilippe Mathieu-Daudé break; 1269a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1270a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulv_d(cpu_env, twd, tws, twt); 1271a2b0a27dSPhilippe Mathieu-Daudé break; 1272a2b0a27dSPhilippe Mathieu-Daudé } 1273a2b0a27dSPhilippe Mathieu-Daudé break; 1274a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLD_df: 1275a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sld_df(cpu_env, tdf, twd, tws, twt); 1276a2b0a27dSPhilippe Mathieu-Daudé break; 1277a2b0a27dSPhilippe Mathieu-Daudé case OPC_VSHF_df: 1278a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_vshf_df(cpu_env, tdf, twd, tws, twt); 1279a2b0a27dSPhilippe Mathieu-Daudé break; 1280a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBV_df: 1281a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1282a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1283a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_b(cpu_env, twd, tws, twt); 1284a2b0a27dSPhilippe Mathieu-Daudé break; 1285a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1286a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_h(cpu_env, twd, tws, twt); 1287a2b0a27dSPhilippe Mathieu-Daudé break; 1288a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1289a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_w(cpu_env, twd, tws, twt); 1290a2b0a27dSPhilippe Mathieu-Daudé break; 1291a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1292a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subv_d(cpu_env, twd, tws, twt); 1293a2b0a27dSPhilippe Mathieu-Daudé break; 1294a2b0a27dSPhilippe Mathieu-Daudé } 1295a2b0a27dSPhilippe Mathieu-Daudé break; 1296a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBS_U_df: 1297a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1298a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1299a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_b(cpu_env, twd, tws, twt); 1300a2b0a27dSPhilippe Mathieu-Daudé break; 1301a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1302a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_h(cpu_env, twd, tws, twt); 1303a2b0a27dSPhilippe Mathieu-Daudé break; 1304a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1305a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_w(cpu_env, twd, tws, twt); 1306a2b0a27dSPhilippe Mathieu-Daudé break; 1307a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1308a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subs_u_d(cpu_env, twd, tws, twt); 1309a2b0a27dSPhilippe Mathieu-Daudé break; 1310a2b0a27dSPhilippe Mathieu-Daudé } 1311a2b0a27dSPhilippe Mathieu-Daudé break; 1312a2b0a27dSPhilippe Mathieu-Daudé case OPC_SPLAT_df: 1313a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_splat_df(cpu_env, tdf, twd, tws, twt); 1314a2b0a27dSPhilippe Mathieu-Daudé break; 1315a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBSUS_U_df: 1316a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1317a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1318a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_b(cpu_env, twd, tws, twt); 1319a2b0a27dSPhilippe Mathieu-Daudé break; 1320a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1321a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_h(cpu_env, twd, tws, twt); 1322a2b0a27dSPhilippe Mathieu-Daudé break; 1323a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1324a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_w(cpu_env, twd, tws, twt); 1325a2b0a27dSPhilippe Mathieu-Daudé break; 1326a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1327a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsus_u_d(cpu_env, twd, tws, twt); 1328a2b0a27dSPhilippe Mathieu-Daudé break; 1329a2b0a27dSPhilippe Mathieu-Daudé } 1330a2b0a27dSPhilippe Mathieu-Daudé break; 1331a2b0a27dSPhilippe Mathieu-Daudé case OPC_SUBSUU_S_df: 1332a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1333a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1334a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_b(cpu_env, twd, tws, twt); 1335a2b0a27dSPhilippe Mathieu-Daudé break; 1336a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1337a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_h(cpu_env, twd, tws, twt); 1338a2b0a27dSPhilippe Mathieu-Daudé break; 1339a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1340a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_w(cpu_env, twd, tws, twt); 1341a2b0a27dSPhilippe Mathieu-Daudé break; 1342a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1343a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_subsuu_s_d(cpu_env, twd, tws, twt); 1344a2b0a27dSPhilippe Mathieu-Daudé break; 1345a2b0a27dSPhilippe Mathieu-Daudé } 1346a2b0a27dSPhilippe Mathieu-Daudé break; 1347a2b0a27dSPhilippe Mathieu-Daudé 1348a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_S_df: 1349a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_U_df: 1350a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_S_df: 1351a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_U_df: 1352a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_S_df: 1353a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_S_df: 1354a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_U_df: 1355a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_U_df: 1356a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_S_df: 1357a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_U_df: 1358a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_BYTE) { 1359a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1360a2b0a27dSPhilippe Mathieu-Daudé break; 1361a2b0a27dSPhilippe Mathieu-Daudé } 1362a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3R(ctx->opcode)) { 1363a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_S_df: 1364a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1365a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1366a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_h(cpu_env, twd, tws, twt); 1367a2b0a27dSPhilippe Mathieu-Daudé break; 1368a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1369a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_w(cpu_env, twd, tws, twt); 1370a2b0a27dSPhilippe Mathieu-Daudé break; 1371a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1372a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_s_d(cpu_env, twd, tws, twt); 1373a2b0a27dSPhilippe Mathieu-Daudé break; 1374a2b0a27dSPhilippe Mathieu-Daudé } 1375a2b0a27dSPhilippe Mathieu-Daudé break; 1376a2b0a27dSPhilippe Mathieu-Daudé case OPC_HADD_U_df: 1377a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1378a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1379a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_h(cpu_env, twd, tws, twt); 1380a2b0a27dSPhilippe Mathieu-Daudé break; 1381a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1382a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_w(cpu_env, twd, tws, twt); 1383a2b0a27dSPhilippe Mathieu-Daudé break; 1384a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1385a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hadd_u_d(cpu_env, twd, tws, twt); 1386a2b0a27dSPhilippe Mathieu-Daudé break; 1387a2b0a27dSPhilippe Mathieu-Daudé } 1388a2b0a27dSPhilippe Mathieu-Daudé break; 1389a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_S_df: 1390a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1391a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1392a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_h(cpu_env, twd, tws, twt); 1393a2b0a27dSPhilippe Mathieu-Daudé break; 1394a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1395a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_w(cpu_env, twd, tws, twt); 1396a2b0a27dSPhilippe Mathieu-Daudé break; 1397a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1398a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_s_d(cpu_env, twd, tws, twt); 1399a2b0a27dSPhilippe Mathieu-Daudé break; 1400a2b0a27dSPhilippe Mathieu-Daudé } 1401a2b0a27dSPhilippe Mathieu-Daudé break; 1402a2b0a27dSPhilippe Mathieu-Daudé case OPC_HSUB_U_df: 1403a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1404a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1405a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_h(cpu_env, twd, tws, twt); 1406a2b0a27dSPhilippe Mathieu-Daudé break; 1407a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1408a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_w(cpu_env, twd, tws, twt); 1409a2b0a27dSPhilippe Mathieu-Daudé break; 1410a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1411a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_hsub_u_d(cpu_env, twd, tws, twt); 1412a2b0a27dSPhilippe Mathieu-Daudé break; 1413a2b0a27dSPhilippe Mathieu-Daudé } 1414a2b0a27dSPhilippe Mathieu-Daudé break; 1415a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_S_df: 1416a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1417a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1418a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_h(cpu_env, twd, tws, twt); 1419a2b0a27dSPhilippe Mathieu-Daudé break; 1420a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1421a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_w(cpu_env, twd, tws, twt); 1422a2b0a27dSPhilippe Mathieu-Daudé break; 1423a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1424a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_s_d(cpu_env, twd, tws, twt); 1425a2b0a27dSPhilippe Mathieu-Daudé break; 1426a2b0a27dSPhilippe Mathieu-Daudé } 1427a2b0a27dSPhilippe Mathieu-Daudé break; 1428a2b0a27dSPhilippe Mathieu-Daudé case OPC_DOTP_U_df: 1429a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1430a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1431a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_h(cpu_env, twd, tws, twt); 1432a2b0a27dSPhilippe Mathieu-Daudé break; 1433a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1434a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_w(cpu_env, twd, tws, twt); 1435a2b0a27dSPhilippe Mathieu-Daudé break; 1436a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1437a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dotp_u_d(cpu_env, twd, tws, twt); 1438a2b0a27dSPhilippe Mathieu-Daudé break; 1439a2b0a27dSPhilippe Mathieu-Daudé } 1440a2b0a27dSPhilippe Mathieu-Daudé break; 1441a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_S_df: 1442a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1443a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1444a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_h(cpu_env, twd, tws, twt); 1445a2b0a27dSPhilippe Mathieu-Daudé break; 1446a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1447a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_w(cpu_env, twd, tws, twt); 1448a2b0a27dSPhilippe Mathieu-Daudé break; 1449a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1450a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_s_d(cpu_env, twd, tws, twt); 1451a2b0a27dSPhilippe Mathieu-Daudé break; 1452a2b0a27dSPhilippe Mathieu-Daudé } 1453a2b0a27dSPhilippe Mathieu-Daudé break; 1454a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPADD_U_df: 1455a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1456a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1457a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_h(cpu_env, twd, tws, twt); 1458a2b0a27dSPhilippe Mathieu-Daudé break; 1459a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1460a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_w(cpu_env, twd, tws, twt); 1461a2b0a27dSPhilippe Mathieu-Daudé break; 1462a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1463a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpadd_u_d(cpu_env, twd, tws, twt); 1464a2b0a27dSPhilippe Mathieu-Daudé break; 1465a2b0a27dSPhilippe Mathieu-Daudé } 1466a2b0a27dSPhilippe Mathieu-Daudé break; 1467a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_S_df: 1468a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1469a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1470a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_h(cpu_env, twd, tws, twt); 1471a2b0a27dSPhilippe Mathieu-Daudé break; 1472a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1473a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_w(cpu_env, twd, tws, twt); 1474a2b0a27dSPhilippe Mathieu-Daudé break; 1475a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1476a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_s_d(cpu_env, twd, tws, twt); 1477a2b0a27dSPhilippe Mathieu-Daudé break; 1478a2b0a27dSPhilippe Mathieu-Daudé } 1479a2b0a27dSPhilippe Mathieu-Daudé break; 1480a2b0a27dSPhilippe Mathieu-Daudé case OPC_DPSUB_U_df: 1481a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1482a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1483a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_h(cpu_env, twd, tws, twt); 1484a2b0a27dSPhilippe Mathieu-Daudé break; 1485a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1486a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_w(cpu_env, twd, tws, twt); 1487a2b0a27dSPhilippe Mathieu-Daudé break; 1488a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1489a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_dpsub_u_d(cpu_env, twd, tws, twt); 1490a2b0a27dSPhilippe Mathieu-Daudé break; 1491a2b0a27dSPhilippe Mathieu-Daudé } 1492a2b0a27dSPhilippe Mathieu-Daudé break; 1493a2b0a27dSPhilippe Mathieu-Daudé } 1494a2b0a27dSPhilippe Mathieu-Daudé break; 1495a2b0a27dSPhilippe Mathieu-Daudé default: 1496a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1497a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1498a2b0a27dSPhilippe Mathieu-Daudé break; 1499a2b0a27dSPhilippe Mathieu-Daudé } 1500a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1501a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1502a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1503a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdf); 1504a2b0a27dSPhilippe Mathieu-Daudé } 1505a2b0a27dSPhilippe Mathieu-Daudé 1506a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm_3e(DisasContext *ctx) 1507a2b0a27dSPhilippe Mathieu-Daudé { 1508a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_ELM_DF3E(op) (MASK_MSA_MINOR(op) | (op & (0x3FF << 16))) 1509a2b0a27dSPhilippe Mathieu-Daudé uint8_t source = (ctx->opcode >> 11) & 0x1f; 1510a2b0a27dSPhilippe Mathieu-Daudé uint8_t dest = (ctx->opcode >> 6) & 0x1f; 1511a2b0a27dSPhilippe Mathieu-Daudé TCGv telm = tcg_temp_new(); 1512a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tsr = tcg_const_i32(source); 1513a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tdt = tcg_const_i32(dest); 1514a2b0a27dSPhilippe Mathieu-Daudé 1515a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM_DF3E(ctx->opcode)) { 1516a2b0a27dSPhilippe Mathieu-Daudé case OPC_CTCMSA: 1517a2b0a27dSPhilippe Mathieu-Daudé gen_load_gpr(telm, source); 1518a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ctcmsa(cpu_env, telm, tdt); 1519a2b0a27dSPhilippe Mathieu-Daudé break; 1520a2b0a27dSPhilippe Mathieu-Daudé case OPC_CFCMSA: 1521a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_cfcmsa(telm, cpu_env, tsr); 1522a2b0a27dSPhilippe Mathieu-Daudé gen_store_gpr(telm, dest); 1523a2b0a27dSPhilippe Mathieu-Daudé break; 1524a2b0a27dSPhilippe Mathieu-Daudé case OPC_MOVE_V: 1525a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_move_v(cpu_env, tdt, tsr); 1526a2b0a27dSPhilippe Mathieu-Daudé break; 1527a2b0a27dSPhilippe Mathieu-Daudé default: 1528a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1529a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1530a2b0a27dSPhilippe Mathieu-Daudé break; 1531a2b0a27dSPhilippe Mathieu-Daudé } 1532a2b0a27dSPhilippe Mathieu-Daudé 1533a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free(telm); 1534a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tdt); 1535a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tsr); 1536a2b0a27dSPhilippe Mathieu-Daudé } 1537a2b0a27dSPhilippe Mathieu-Daudé 1538a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm_df(DisasContext *ctx, uint32_t df, uint32_t n) 1539a2b0a27dSPhilippe Mathieu-Daudé { 1540a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_ELM(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) 1541a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1542a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1543a2b0a27dSPhilippe Mathieu-Daudé 1544a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1545a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1546a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tn = tcg_const_i32(n); 15472b537a3dSPhilippe Mathieu-Daudé TCGv_i32 tdf = tcg_constant_i32(df); 1548a2b0a27dSPhilippe Mathieu-Daudé 1549a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM(ctx->opcode)) { 1550a2b0a27dSPhilippe Mathieu-Daudé case OPC_SLDI_df: 1551a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_sldi_df(cpu_env, tdf, twd, tws, tn); 1552a2b0a27dSPhilippe Mathieu-Daudé break; 1553a2b0a27dSPhilippe Mathieu-Daudé case OPC_SPLATI_df: 1554a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_splati_df(cpu_env, tdf, twd, tws, tn); 1555a2b0a27dSPhilippe Mathieu-Daudé break; 1556a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSVE_df: 1557a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insve_df(cpu_env, tdf, twd, tws, tn); 1558a2b0a27dSPhilippe Mathieu-Daudé break; 1559a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_S_df: 1560a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_U_df: 1561a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSERT_df: 1562a2b0a27dSPhilippe Mathieu-Daudé #if !defined(TARGET_MIPS64) 1563a2b0a27dSPhilippe Mathieu-Daudé /* Double format valid only for MIPS64 */ 1564a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 1565a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1566a2b0a27dSPhilippe Mathieu-Daudé break; 1567a2b0a27dSPhilippe Mathieu-Daudé } 1568a2b0a27dSPhilippe Mathieu-Daudé if ((MASK_MSA_ELM(ctx->opcode) == OPC_COPY_U_df) && 1569a2b0a27dSPhilippe Mathieu-Daudé (df == DF_WORD)) { 1570a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1571a2b0a27dSPhilippe Mathieu-Daudé break; 1572a2b0a27dSPhilippe Mathieu-Daudé } 1573a2b0a27dSPhilippe Mathieu-Daudé #endif 1574a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_ELM(ctx->opcode)) { 1575a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_S_df: 1576a2b0a27dSPhilippe Mathieu-Daudé if (likely(wd != 0)) { 1577a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1578a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1579a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_b(cpu_env, twd, tws, tn); 1580a2b0a27dSPhilippe Mathieu-Daudé break; 1581a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1582a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_h(cpu_env, twd, tws, tn); 1583a2b0a27dSPhilippe Mathieu-Daudé break; 1584a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1585a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_w(cpu_env, twd, tws, tn); 1586a2b0a27dSPhilippe Mathieu-Daudé break; 1587a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1588a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1589a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_s_d(cpu_env, twd, tws, tn); 1590a2b0a27dSPhilippe Mathieu-Daudé break; 1591a2b0a27dSPhilippe Mathieu-Daudé #endif 1592a2b0a27dSPhilippe Mathieu-Daudé default: 1593a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1594a2b0a27dSPhilippe Mathieu-Daudé } 1595a2b0a27dSPhilippe Mathieu-Daudé } 1596a2b0a27dSPhilippe Mathieu-Daudé break; 1597a2b0a27dSPhilippe Mathieu-Daudé case OPC_COPY_U_df: 1598a2b0a27dSPhilippe Mathieu-Daudé if (likely(wd != 0)) { 1599a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1600a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1601a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_b(cpu_env, twd, tws, tn); 1602a2b0a27dSPhilippe Mathieu-Daudé break; 1603a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1604a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_h(cpu_env, twd, tws, tn); 1605a2b0a27dSPhilippe Mathieu-Daudé break; 1606a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1607a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1608a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_copy_u_w(cpu_env, twd, tws, tn); 1609a2b0a27dSPhilippe Mathieu-Daudé break; 1610a2b0a27dSPhilippe Mathieu-Daudé #endif 1611a2b0a27dSPhilippe Mathieu-Daudé default: 1612a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1613a2b0a27dSPhilippe Mathieu-Daudé } 1614a2b0a27dSPhilippe Mathieu-Daudé } 1615a2b0a27dSPhilippe Mathieu-Daudé break; 1616a2b0a27dSPhilippe Mathieu-Daudé case OPC_INSERT_df: 1617a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1618a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1619a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_b(cpu_env, twd, tws, tn); 1620a2b0a27dSPhilippe Mathieu-Daudé break; 1621a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1622a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_h(cpu_env, twd, tws, tn); 1623a2b0a27dSPhilippe Mathieu-Daudé break; 1624a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1625a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_w(cpu_env, twd, tws, tn); 1626a2b0a27dSPhilippe Mathieu-Daudé break; 1627a2b0a27dSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64) 1628a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1629a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_insert_d(cpu_env, twd, tws, tn); 1630a2b0a27dSPhilippe Mathieu-Daudé break; 1631a2b0a27dSPhilippe Mathieu-Daudé #endif 1632a2b0a27dSPhilippe Mathieu-Daudé default: 1633a2b0a27dSPhilippe Mathieu-Daudé assert(0); 1634a2b0a27dSPhilippe Mathieu-Daudé } 1635a2b0a27dSPhilippe Mathieu-Daudé break; 1636a2b0a27dSPhilippe Mathieu-Daudé } 1637a2b0a27dSPhilippe Mathieu-Daudé break; 1638a2b0a27dSPhilippe Mathieu-Daudé default: 1639a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1640a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1641a2b0a27dSPhilippe Mathieu-Daudé } 1642a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1643a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1644a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tn); 1645a2b0a27dSPhilippe Mathieu-Daudé } 1646a2b0a27dSPhilippe Mathieu-Daudé 1647a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_elm(DisasContext *ctx) 1648a2b0a27dSPhilippe Mathieu-Daudé { 1649a2b0a27dSPhilippe Mathieu-Daudé uint8_t dfn = (ctx->opcode >> 16) & 0x3f; 1650a2b0a27dSPhilippe Mathieu-Daudé uint32_t df = 0, n = 0; 1651a2b0a27dSPhilippe Mathieu-Daudé 1652a2b0a27dSPhilippe Mathieu-Daudé if ((dfn & 0x30) == 0x00) { 1653a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x0f; 1654a2b0a27dSPhilippe Mathieu-Daudé df = DF_BYTE; 1655a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x38) == 0x20) { 1656a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x07; 1657a2b0a27dSPhilippe Mathieu-Daudé df = DF_HALF; 1658a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x3c) == 0x30) { 1659a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x03; 1660a2b0a27dSPhilippe Mathieu-Daudé df = DF_WORD; 1661a2b0a27dSPhilippe Mathieu-Daudé } else if ((dfn & 0x3e) == 0x38) { 1662a2b0a27dSPhilippe Mathieu-Daudé n = dfn & 0x01; 1663a2b0a27dSPhilippe Mathieu-Daudé df = DF_DOUBLE; 1664a2b0a27dSPhilippe Mathieu-Daudé } else if (dfn == 0x3E) { 1665a2b0a27dSPhilippe Mathieu-Daudé /* CTCMSA, CFCMSA, MOVE.V */ 1666a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm_3e(ctx); 1667a2b0a27dSPhilippe Mathieu-Daudé return; 1668a2b0a27dSPhilippe Mathieu-Daudé } else { 1669a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1670a2b0a27dSPhilippe Mathieu-Daudé return; 1671a2b0a27dSPhilippe Mathieu-Daudé } 1672a2b0a27dSPhilippe Mathieu-Daudé 1673a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm_df(ctx, df, n); 1674a2b0a27dSPhilippe Mathieu-Daudé } 1675a2b0a27dSPhilippe Mathieu-Daudé 1676a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_3rf(DisasContext *ctx) 1677a2b0a27dSPhilippe Mathieu-Daudé { 1678a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_3RF(op) (MASK_MSA_MINOR(op) | (op & (0xf << 22))) 1679a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 21) & 0x1; 1680a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 1681a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1682a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1683a2b0a27dSPhilippe Mathieu-Daudé 1684a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1685a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1686a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 16871b5c0a11SPhilippe Mathieu-Daudé TCGv_i32 tdf; 1688a2b0a27dSPhilippe Mathieu-Daudé 1689a2b0a27dSPhilippe Mathieu-Daudé /* adjust df value for floating-point instruction */ 16901b5c0a11SPhilippe Mathieu-Daudé switch (MASK_MSA_3RF(ctx->opcode)) { 16911b5c0a11SPhilippe Mathieu-Daudé case OPC_MUL_Q_df: 16921b5c0a11SPhilippe Mathieu-Daudé case OPC_MADD_Q_df: 16931b5c0a11SPhilippe Mathieu-Daudé case OPC_MSUB_Q_df: 16941b5c0a11SPhilippe Mathieu-Daudé case OPC_MULR_Q_df: 16951b5c0a11SPhilippe Mathieu-Daudé case OPC_MADDR_Q_df: 16961b5c0a11SPhilippe Mathieu-Daudé case OPC_MSUBR_Q_df: 16977e9db46dSPhilippe Mathieu-Daudé tdf = tcg_constant_i32(DF_HALF + df); 16981b5c0a11SPhilippe Mathieu-Daudé break; 16991b5c0a11SPhilippe Mathieu-Daudé default: 17007e9db46dSPhilippe Mathieu-Daudé tdf = tcg_constant_i32(DF_WORD + df); 17011b5c0a11SPhilippe Mathieu-Daudé break; 17021b5c0a11SPhilippe Mathieu-Daudé } 1703a2b0a27dSPhilippe Mathieu-Daudé 1704a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_3RF(ctx->opcode)) { 1705a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCAF_df: 1706a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcaf_df(cpu_env, tdf, twd, tws, twt); 1707a2b0a27dSPhilippe Mathieu-Daudé break; 1708a2b0a27dSPhilippe Mathieu-Daudé case OPC_FADD_df: 1709a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fadd_df(cpu_env, tdf, twd, tws, twt); 1710a2b0a27dSPhilippe Mathieu-Daudé break; 1711a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUN_df: 1712a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcun_df(cpu_env, tdf, twd, tws, twt); 1713a2b0a27dSPhilippe Mathieu-Daudé break; 1714a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUB_df: 1715a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsub_df(cpu_env, tdf, twd, tws, twt); 1716a2b0a27dSPhilippe Mathieu-Daudé break; 1717a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCOR_df: 1718a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcor_df(cpu_env, tdf, twd, tws, twt); 1719a2b0a27dSPhilippe Mathieu-Daudé break; 1720a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCEQ_df: 1721a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fceq_df(cpu_env, tdf, twd, tws, twt); 1722a2b0a27dSPhilippe Mathieu-Daudé break; 1723a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMUL_df: 1724a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmul_df(cpu_env, tdf, twd, tws, twt); 1725a2b0a27dSPhilippe Mathieu-Daudé break; 1726a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUNE_df: 1727a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcune_df(cpu_env, tdf, twd, tws, twt); 1728a2b0a27dSPhilippe Mathieu-Daudé break; 1729a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCUEQ_df: 1730a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcueq_df(cpu_env, tdf, twd, tws, twt); 1731a2b0a27dSPhilippe Mathieu-Daudé break; 1732a2b0a27dSPhilippe Mathieu-Daudé case OPC_FDIV_df: 1733a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fdiv_df(cpu_env, tdf, twd, tws, twt); 1734a2b0a27dSPhilippe Mathieu-Daudé break; 1735a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCNE_df: 1736a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcne_df(cpu_env, tdf, twd, tws, twt); 1737a2b0a27dSPhilippe Mathieu-Daudé break; 1738a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLT_df: 1739a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fclt_df(cpu_env, tdf, twd, tws, twt); 1740a2b0a27dSPhilippe Mathieu-Daudé break; 1741a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMADD_df: 1742a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmadd_df(cpu_env, tdf, twd, tws, twt); 1743a2b0a27dSPhilippe Mathieu-Daudé break; 1744a2b0a27dSPhilippe Mathieu-Daudé case OPC_MUL_Q_df: 1745a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mul_q_df(cpu_env, tdf, twd, tws, twt); 1746a2b0a27dSPhilippe Mathieu-Daudé break; 1747a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCULT_df: 1748a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcult_df(cpu_env, tdf, twd, tws, twt); 1749a2b0a27dSPhilippe Mathieu-Daudé break; 1750a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMSUB_df: 1751a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmsub_df(cpu_env, tdf, twd, tws, twt); 1752a2b0a27dSPhilippe Mathieu-Daudé break; 1753a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADD_Q_df: 1754a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_madd_q_df(cpu_env, tdf, twd, tws, twt); 1755a2b0a27dSPhilippe Mathieu-Daudé break; 1756a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCLE_df: 1757a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcle_df(cpu_env, tdf, twd, tws, twt); 1758a2b0a27dSPhilippe Mathieu-Daudé break; 1759a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUB_Q_df: 1760a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msub_q_df(cpu_env, tdf, twd, tws, twt); 1761a2b0a27dSPhilippe Mathieu-Daudé break; 1762a2b0a27dSPhilippe Mathieu-Daudé case OPC_FCULE_df: 1763a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fcule_df(cpu_env, tdf, twd, tws, twt); 1764a2b0a27dSPhilippe Mathieu-Daudé break; 1765a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXP2_df: 1766a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexp2_df(cpu_env, tdf, twd, tws, twt); 1767a2b0a27dSPhilippe Mathieu-Daudé break; 1768a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSAF_df: 1769a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsaf_df(cpu_env, tdf, twd, tws, twt); 1770a2b0a27dSPhilippe Mathieu-Daudé break; 1771a2b0a27dSPhilippe Mathieu-Daudé case OPC_FEXDO_df: 1772a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fexdo_df(cpu_env, tdf, twd, tws, twt); 1773a2b0a27dSPhilippe Mathieu-Daudé break; 1774a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUN_df: 1775a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsun_df(cpu_env, tdf, twd, tws, twt); 1776a2b0a27dSPhilippe Mathieu-Daudé break; 1777a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSOR_df: 1778a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsor_df(cpu_env, tdf, twd, tws, twt); 1779a2b0a27dSPhilippe Mathieu-Daudé break; 1780a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSEQ_df: 1781a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fseq_df(cpu_env, tdf, twd, tws, twt); 1782a2b0a27dSPhilippe Mathieu-Daudé break; 1783a2b0a27dSPhilippe Mathieu-Daudé case OPC_FTQ_df: 1784a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_ftq_df(cpu_env, tdf, twd, tws, twt); 1785a2b0a27dSPhilippe Mathieu-Daudé break; 1786a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUNE_df: 1787a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsune_df(cpu_env, tdf, twd, tws, twt); 1788a2b0a27dSPhilippe Mathieu-Daudé break; 1789a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSUEQ_df: 1790a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsueq_df(cpu_env, tdf, twd, tws, twt); 1791a2b0a27dSPhilippe Mathieu-Daudé break; 1792a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSNE_df: 1793a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsne_df(cpu_env, tdf, twd, tws, twt); 1794a2b0a27dSPhilippe Mathieu-Daudé break; 1795a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSLT_df: 1796a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fslt_df(cpu_env, tdf, twd, tws, twt); 1797a2b0a27dSPhilippe Mathieu-Daudé break; 1798a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMIN_df: 1799a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmin_df(cpu_env, tdf, twd, tws, twt); 1800a2b0a27dSPhilippe Mathieu-Daudé break; 1801a2b0a27dSPhilippe Mathieu-Daudé case OPC_MULR_Q_df: 1802a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_mulr_q_df(cpu_env, tdf, twd, tws, twt); 1803a2b0a27dSPhilippe Mathieu-Daudé break; 1804a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSULT_df: 1805a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsult_df(cpu_env, tdf, twd, tws, twt); 1806a2b0a27dSPhilippe Mathieu-Daudé break; 1807a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMIN_A_df: 1808a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmin_a_df(cpu_env, tdf, twd, tws, twt); 1809a2b0a27dSPhilippe Mathieu-Daudé break; 1810a2b0a27dSPhilippe Mathieu-Daudé case OPC_MADDR_Q_df: 1811a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_maddr_q_df(cpu_env, tdf, twd, tws, twt); 1812a2b0a27dSPhilippe Mathieu-Daudé break; 1813a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSLE_df: 1814a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsle_df(cpu_env, tdf, twd, tws, twt); 1815a2b0a27dSPhilippe Mathieu-Daudé break; 1816a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMAX_df: 1817a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmax_df(cpu_env, tdf, twd, tws, twt); 1818a2b0a27dSPhilippe Mathieu-Daudé break; 1819a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSUBR_Q_df: 1820a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_msubr_q_df(cpu_env, tdf, twd, tws, twt); 1821a2b0a27dSPhilippe Mathieu-Daudé break; 1822a2b0a27dSPhilippe Mathieu-Daudé case OPC_FSULE_df: 1823a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fsule_df(cpu_env, tdf, twd, tws, twt); 1824a2b0a27dSPhilippe Mathieu-Daudé break; 1825a2b0a27dSPhilippe Mathieu-Daudé case OPC_FMAX_A_df: 1826a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_fmax_a_df(cpu_env, tdf, twd, tws, twt); 1827a2b0a27dSPhilippe Mathieu-Daudé break; 1828a2b0a27dSPhilippe Mathieu-Daudé default: 1829a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1830a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1831a2b0a27dSPhilippe Mathieu-Daudé break; 1832a2b0a27dSPhilippe Mathieu-Daudé } 1833a2b0a27dSPhilippe Mathieu-Daudé 1834a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1835a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1836a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1837a2b0a27dSPhilippe Mathieu-Daudé } 1838a2b0a27dSPhilippe Mathieu-Daudé 1839a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_2r(DisasContext *ctx) 1840a2b0a27dSPhilippe Mathieu-Daudé { 1841a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_2R(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21)) | \ 1842a2b0a27dSPhilippe Mathieu-Daudé (op & (0x7 << 18))) 1843a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1844a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1845a2b0a27dSPhilippe Mathieu-Daudé uint8_t df = (ctx->opcode >> 16) & 0x3; 1846a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1847a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1848a2b0a27dSPhilippe Mathieu-Daudé 1849a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_2R(ctx->opcode)) { 1850a2b0a27dSPhilippe Mathieu-Daudé case OPC_FILL_df: 1851a2b0a27dSPhilippe Mathieu-Daudé #if !defined(TARGET_MIPS64) 1852a2b0a27dSPhilippe Mathieu-Daudé /* Double format valid only for MIPS64 */ 1853a2b0a27dSPhilippe Mathieu-Daudé if (df == DF_DOUBLE) { 1854a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1855a2b0a27dSPhilippe Mathieu-Daudé break; 1856a2b0a27dSPhilippe Mathieu-Daudé } 1857a2b0a27dSPhilippe Mathieu-Daudé #endif 185874341af7SPhilippe Mathieu-Daudé gen_helper_msa_fill_df(cpu_env, tcg_constant_i32(df), 185974341af7SPhilippe Mathieu-Daudé twd, tws); /* trs */ 1860a2b0a27dSPhilippe Mathieu-Daudé break; 1861a2b0a27dSPhilippe Mathieu-Daudé case OPC_NLOC_df: 1862a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1863a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1864a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_b(cpu_env, twd, tws); 1865a2b0a27dSPhilippe Mathieu-Daudé break; 1866a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1867a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_h(cpu_env, twd, tws); 1868a2b0a27dSPhilippe Mathieu-Daudé break; 1869a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1870a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_w(cpu_env, twd, tws); 1871a2b0a27dSPhilippe Mathieu-Daudé break; 1872a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1873a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nloc_d(cpu_env, twd, tws); 1874a2b0a27dSPhilippe Mathieu-Daudé break; 1875a2b0a27dSPhilippe Mathieu-Daudé } 1876a2b0a27dSPhilippe Mathieu-Daudé break; 1877a2b0a27dSPhilippe Mathieu-Daudé case OPC_NLZC_df: 1878a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1879a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1880a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_b(cpu_env, twd, tws); 1881a2b0a27dSPhilippe Mathieu-Daudé break; 1882a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1883a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_h(cpu_env, twd, tws); 1884a2b0a27dSPhilippe Mathieu-Daudé break; 1885a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1886a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_w(cpu_env, twd, tws); 1887a2b0a27dSPhilippe Mathieu-Daudé break; 1888a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1889a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nlzc_d(cpu_env, twd, tws); 1890a2b0a27dSPhilippe Mathieu-Daudé break; 1891a2b0a27dSPhilippe Mathieu-Daudé } 1892a2b0a27dSPhilippe Mathieu-Daudé break; 1893a2b0a27dSPhilippe Mathieu-Daudé case OPC_PCNT_df: 1894a2b0a27dSPhilippe Mathieu-Daudé switch (df) { 1895a2b0a27dSPhilippe Mathieu-Daudé case DF_BYTE: 1896a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_b(cpu_env, twd, tws); 1897a2b0a27dSPhilippe Mathieu-Daudé break; 1898a2b0a27dSPhilippe Mathieu-Daudé case DF_HALF: 1899a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_h(cpu_env, twd, tws); 1900a2b0a27dSPhilippe Mathieu-Daudé break; 1901a2b0a27dSPhilippe Mathieu-Daudé case DF_WORD: 1902a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_w(cpu_env, twd, tws); 1903a2b0a27dSPhilippe Mathieu-Daudé break; 1904a2b0a27dSPhilippe Mathieu-Daudé case DF_DOUBLE: 1905a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_pcnt_d(cpu_env, twd, tws); 1906a2b0a27dSPhilippe Mathieu-Daudé break; 1907a2b0a27dSPhilippe Mathieu-Daudé } 1908a2b0a27dSPhilippe Mathieu-Daudé break; 1909a2b0a27dSPhilippe Mathieu-Daudé default: 1910a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1911a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1912a2b0a27dSPhilippe Mathieu-Daudé break; 1913a2b0a27dSPhilippe Mathieu-Daudé } 1914a2b0a27dSPhilippe Mathieu-Daudé 1915a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1916a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1917a2b0a27dSPhilippe Mathieu-Daudé } 1918a2b0a27dSPhilippe Mathieu-Daudé 1919*5c5b6400SPhilippe Mathieu-Daudé static bool trans_msa_2rf(DisasContext *ctx, arg_msa_r *a, 1920*5c5b6400SPhilippe Mathieu-Daudé gen_helper_piii *gen_msa_2rf) 1921a2b0a27dSPhilippe Mathieu-Daudé { 1922*5c5b6400SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 1923*5c5b6400SPhilippe Mathieu-Daudé return true; 1924a2b0a27dSPhilippe Mathieu-Daudé } 1925a2b0a27dSPhilippe Mathieu-Daudé 1926*5c5b6400SPhilippe Mathieu-Daudé gen_msa_2rf(cpu_env, 1927*5c5b6400SPhilippe Mathieu-Daudé tcg_constant_i32(a->df), 1928*5c5b6400SPhilippe Mathieu-Daudé tcg_constant_i32(a->wd), 1929*5c5b6400SPhilippe Mathieu-Daudé tcg_constant_i32(a->ws)); 1930*5c5b6400SPhilippe Mathieu-Daudé 1931*5c5b6400SPhilippe Mathieu-Daudé return true; 1932a2b0a27dSPhilippe Mathieu-Daudé } 1933a2b0a27dSPhilippe Mathieu-Daudé 1934*5c5b6400SPhilippe Mathieu-Daudé TRANS(FCLASS, trans_msa_2rf, gen_helper_msa_fclass_df); 1935*5c5b6400SPhilippe Mathieu-Daudé TRANS(FTRUNC_S, trans_msa_2rf, gen_helper_msa_fclass_df); 1936*5c5b6400SPhilippe Mathieu-Daudé TRANS(FTRUNC_U, trans_msa_2rf, gen_helper_msa_ftrunc_s_df); 1937*5c5b6400SPhilippe Mathieu-Daudé TRANS(FSQRT, trans_msa_2rf, gen_helper_msa_fsqrt_df); 1938*5c5b6400SPhilippe Mathieu-Daudé TRANS(FRSQRT, trans_msa_2rf, gen_helper_msa_frsqrt_df); 1939*5c5b6400SPhilippe Mathieu-Daudé TRANS(FRCP, trans_msa_2rf, gen_helper_msa_frcp_df); 1940*5c5b6400SPhilippe Mathieu-Daudé TRANS(FRINT, trans_msa_2rf, gen_helper_msa_frint_df); 1941*5c5b6400SPhilippe Mathieu-Daudé TRANS(FLOG2, trans_msa_2rf, gen_helper_msa_flog2_df); 1942*5c5b6400SPhilippe Mathieu-Daudé TRANS(FEXUPL, trans_msa_2rf, gen_helper_msa_fexupl_df); 1943*5c5b6400SPhilippe Mathieu-Daudé TRANS(FEXUPR, trans_msa_2rf, gen_helper_msa_fexupr_df); 1944*5c5b6400SPhilippe Mathieu-Daudé TRANS(FFQL, trans_msa_2rf, gen_helper_msa_ffql_df); 1945*5c5b6400SPhilippe Mathieu-Daudé TRANS(FFQR, trans_msa_2rf, gen_helper_msa_ffqr_df); 1946*5c5b6400SPhilippe Mathieu-Daudé TRANS(FTINT_S, trans_msa_2rf, gen_helper_msa_ftint_s_df); 1947*5c5b6400SPhilippe Mathieu-Daudé TRANS(FTINT_U, trans_msa_2rf, gen_helper_msa_ftint_u_df); 1948*5c5b6400SPhilippe Mathieu-Daudé TRANS(FFINT_S, trans_msa_2rf, gen_helper_msa_ffint_s_df); 1949*5c5b6400SPhilippe Mathieu-Daudé TRANS(FFINT_U, trans_msa_2rf, gen_helper_msa_ffint_u_df); 1950*5c5b6400SPhilippe Mathieu-Daudé 1951a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_vec_v(DisasContext *ctx) 1952a2b0a27dSPhilippe Mathieu-Daudé { 1953a2b0a27dSPhilippe Mathieu-Daudé #define MASK_MSA_VEC(op) (MASK_MSA_MINOR(op) | (op & (0x1f << 21))) 1954a2b0a27dSPhilippe Mathieu-Daudé uint8_t wt = (ctx->opcode >> 16) & 0x1f; 1955a2b0a27dSPhilippe Mathieu-Daudé uint8_t ws = (ctx->opcode >> 11) & 0x1f; 1956a2b0a27dSPhilippe Mathieu-Daudé uint8_t wd = (ctx->opcode >> 6) & 0x1f; 1957a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twd = tcg_const_i32(wd); 1958a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 tws = tcg_const_i32(ws); 1959a2b0a27dSPhilippe Mathieu-Daudé TCGv_i32 twt = tcg_const_i32(wt); 1960a2b0a27dSPhilippe Mathieu-Daudé 1961a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_VEC(ctx->opcode)) { 1962a2b0a27dSPhilippe Mathieu-Daudé case OPC_AND_V: 1963a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_and_v(cpu_env, twd, tws, twt); 1964a2b0a27dSPhilippe Mathieu-Daudé break; 1965a2b0a27dSPhilippe Mathieu-Daudé case OPC_OR_V: 1966a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_or_v(cpu_env, twd, tws, twt); 1967a2b0a27dSPhilippe Mathieu-Daudé break; 1968a2b0a27dSPhilippe Mathieu-Daudé case OPC_NOR_V: 1969a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_nor_v(cpu_env, twd, tws, twt); 1970a2b0a27dSPhilippe Mathieu-Daudé break; 1971a2b0a27dSPhilippe Mathieu-Daudé case OPC_XOR_V: 1972a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_xor_v(cpu_env, twd, tws, twt); 1973a2b0a27dSPhilippe Mathieu-Daudé break; 1974a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZ_V: 1975a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmnz_v(cpu_env, twd, tws, twt); 1976a2b0a27dSPhilippe Mathieu-Daudé break; 1977a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZ_V: 1978a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bmz_v(cpu_env, twd, tws, twt); 1979a2b0a27dSPhilippe Mathieu-Daudé break; 1980a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSEL_V: 1981a2b0a27dSPhilippe Mathieu-Daudé gen_helper_msa_bsel_v(cpu_env, twd, tws, twt); 1982a2b0a27dSPhilippe Mathieu-Daudé break; 1983a2b0a27dSPhilippe Mathieu-Daudé default: 1984a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 1985a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 1986a2b0a27dSPhilippe Mathieu-Daudé break; 1987a2b0a27dSPhilippe Mathieu-Daudé } 1988a2b0a27dSPhilippe Mathieu-Daudé 1989a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twd); 1990a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(tws); 1991a2b0a27dSPhilippe Mathieu-Daudé tcg_temp_free_i32(twt); 1992a2b0a27dSPhilippe Mathieu-Daudé } 1993a2b0a27dSPhilippe Mathieu-Daudé 1994a2b0a27dSPhilippe Mathieu-Daudé static void gen_msa_vec(DisasContext *ctx) 1995a2b0a27dSPhilippe Mathieu-Daudé { 1996a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_VEC(ctx->opcode)) { 1997a2b0a27dSPhilippe Mathieu-Daudé case OPC_AND_V: 1998a2b0a27dSPhilippe Mathieu-Daudé case OPC_OR_V: 1999a2b0a27dSPhilippe Mathieu-Daudé case OPC_NOR_V: 2000a2b0a27dSPhilippe Mathieu-Daudé case OPC_XOR_V: 2001a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMNZ_V: 2002a2b0a27dSPhilippe Mathieu-Daudé case OPC_BMZ_V: 2003a2b0a27dSPhilippe Mathieu-Daudé case OPC_BSEL_V: 2004a2b0a27dSPhilippe Mathieu-Daudé gen_msa_vec_v(ctx); 2005a2b0a27dSPhilippe Mathieu-Daudé break; 2006a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_2R: 2007a2b0a27dSPhilippe Mathieu-Daudé gen_msa_2r(ctx); 2008a2b0a27dSPhilippe Mathieu-Daudé break; 2009a2b0a27dSPhilippe Mathieu-Daudé default: 2010a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2011a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2012a2b0a27dSPhilippe Mathieu-Daudé break; 2013a2b0a27dSPhilippe Mathieu-Daudé } 2014a2b0a27dSPhilippe Mathieu-Daudé } 2015a2b0a27dSPhilippe Mathieu-Daudé 2016525ea877SPhilippe Mathieu-Daudé static bool trans_MSA(DisasContext *ctx, arg_MSA *a) 2017a2b0a27dSPhilippe Mathieu-Daudé { 2018a2b0a27dSPhilippe Mathieu-Daudé uint32_t opcode = ctx->opcode; 2019a2b0a27dSPhilippe Mathieu-Daudé 2020340ee8b3SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 2021340ee8b3SPhilippe Mathieu-Daudé return true; 2022340ee8b3SPhilippe Mathieu-Daudé } 2023a2b0a27dSPhilippe Mathieu-Daudé 2024a2b0a27dSPhilippe Mathieu-Daudé switch (MASK_MSA_MINOR(opcode)) { 2025a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0D: 2026a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0E: 2027a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_0F: 2028a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_10: 2029a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_11: 2030a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_12: 2031a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_13: 2032a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_14: 2033a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3R_15: 2034a2b0a27dSPhilippe Mathieu-Daudé gen_msa_3r(ctx); 2035a2b0a27dSPhilippe Mathieu-Daudé break; 2036a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_ELM: 2037a2b0a27dSPhilippe Mathieu-Daudé gen_msa_elm(ctx); 2038a2b0a27dSPhilippe Mathieu-Daudé break; 2039a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1A: 2040a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1B: 2041a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_3RF_1C: 2042a2b0a27dSPhilippe Mathieu-Daudé gen_msa_3rf(ctx); 2043a2b0a27dSPhilippe Mathieu-Daudé break; 2044a2b0a27dSPhilippe Mathieu-Daudé case OPC_MSA_VEC: 2045a2b0a27dSPhilippe Mathieu-Daudé gen_msa_vec(ctx); 2046a2b0a27dSPhilippe Mathieu-Daudé break; 2047a2b0a27dSPhilippe Mathieu-Daudé default: 2048a2b0a27dSPhilippe Mathieu-Daudé MIPS_INVAL("MSA instruction"); 2049a2b0a27dSPhilippe Mathieu-Daudé gen_reserved_instruction(ctx); 2050a2b0a27dSPhilippe Mathieu-Daudé break; 2051a2b0a27dSPhilippe Mathieu-Daudé } 2052a2b0a27dSPhilippe Mathieu-Daudé 2053a2b0a27dSPhilippe Mathieu-Daudé return true; 2054a2b0a27dSPhilippe Mathieu-Daudé } 2055a2b0a27dSPhilippe Mathieu-Daudé 2056ce121fe2SPhilippe Mathieu-Daudé static bool trans_msa_ldst(DisasContext *ctx, arg_msa_i *a, 2057ce121fe2SPhilippe Mathieu-Daudé gen_helper_piv *gen_msa_ldst) 2058ce121fe2SPhilippe Mathieu-Daudé { 2059ce121fe2SPhilippe Mathieu-Daudé TCGv taddr; 2060ce121fe2SPhilippe Mathieu-Daudé 2061ce121fe2SPhilippe Mathieu-Daudé if (!check_msa_enabled(ctx)) { 2062ce121fe2SPhilippe Mathieu-Daudé return true; 2063ce121fe2SPhilippe Mathieu-Daudé } 2064ce121fe2SPhilippe Mathieu-Daudé 2065ce121fe2SPhilippe Mathieu-Daudé taddr = tcg_temp_new(); 2066ce121fe2SPhilippe Mathieu-Daudé 2067ce121fe2SPhilippe Mathieu-Daudé gen_base_offset_addr(ctx, taddr, a->ws, a->sa << a->df); 2068ce121fe2SPhilippe Mathieu-Daudé gen_msa_ldst(cpu_env, tcg_constant_i32(a->wd), taddr); 2069ce121fe2SPhilippe Mathieu-Daudé 2070ce121fe2SPhilippe Mathieu-Daudé tcg_temp_free(taddr); 2071ce121fe2SPhilippe Mathieu-Daudé 2072ce121fe2SPhilippe Mathieu-Daudé return true; 2073ce121fe2SPhilippe Mathieu-Daudé } 2074ce121fe2SPhilippe Mathieu-Daudé 2075ce121fe2SPhilippe Mathieu-Daudé TRANS_DF_iv(LD, trans_msa_ldst, gen_helper_msa_ld); 2076ce121fe2SPhilippe Mathieu-Daudé TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st); 2077ce121fe2SPhilippe Mathieu-Daudé 207834fe9fa3SPhilippe Mathieu-Daudé static bool trans_LSA(DisasContext *ctx, arg_r *a) 2079a2b0a27dSPhilippe Mathieu-Daudé { 2080a2b0a27dSPhilippe Mathieu-Daudé return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); 2081a2b0a27dSPhilippe Mathieu-Daudé } 2082a2b0a27dSPhilippe Mathieu-Daudé 208334fe9fa3SPhilippe Mathieu-Daudé static bool trans_DLSA(DisasContext *ctx, arg_r *a) 2084a2b0a27dSPhilippe Mathieu-Daudé { 2085f5c6ee0cSPhilippe Mathieu-Daudé if (TARGET_LONG_BITS != 64) { 2086f5c6ee0cSPhilippe Mathieu-Daudé return false; 2087f5c6ee0cSPhilippe Mathieu-Daudé } 2088a2b0a27dSPhilippe Mathieu-Daudé return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); 2089a2b0a27dSPhilippe Mathieu-Daudé } 2090