1/* 2 * First stage boot loader for virtio devices. The compiled output goes 3 * into the pc-bios directory of qemu. 4 * 5 * Copyright (c) 2013 Alexander Graf <agraf@suse.de> 6 * Copyright IBM Corp. 2013, 2017 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or (at 9 * your option) any later version. See the COPYING file in the top-level 10 * directory. 11 */ 12 13 .globl _start 14_start: 15 16 larl %r15, stack + 0x8000 /* Set up stack */ 17 18 /* clear bss */ 19 larl %r2, __bss_start 20 larl %r3, _end 21 slgr %r3, %r2 /* get sizeof bss */ 22 ltgr %r3,%r3 /* bss emtpy? */ 23 jz done 24 aghi %r3,-1 25 srlg %r4,%r3,8 /* how many 256 byte chunks? */ 26 ltgr %r4,%r4 27 lgr %r1,%r2 28 jz remainder 29loop: 30 xc 0(256,%r1),0(%r1) 31 la %r1,256(%r1) 32 brctg %r4,loop 33remainder: 34 larl %r2,memsetxc 35 ex %r3,0(%r2) 36done: 37 j main /* And call C */ 38 39memsetxc: 40 xc 0(1,%r1),0(%r1) 41 42 43/* 44 * void disabled_wait(void) 45 * 46 * stops the current guest cpu. 47 */ 48 .globl disabled_wait 49disabled_wait: 50 larl %r1,disabled_wait_psw 51 lpswe 0(%r1) 521: j 1b 53 54 55/* 56 * void consume_sclp_int(void) 57 * 58 * eats one sclp interrupt 59 */ 60 .globl consume_sclp_int 61consume_sclp_int: 62 /* enable service interrupts in cr0 */ 63 stctg %c0,%c0,0(%r15) 64 oi 6(%r15),0x2 65 lctlg %c0,%c0,0(%r15) 66 /* prepare external call handler */ 67 larl %r1, external_new_code 68 stg %r1, 0x1b8 69 larl %r1, external_new_mask 70 mvc 0x1b0(8),0(%r1) 71 /* load enabled wait PSW */ 72 larl %r1, enabled_wait_psw 73 lpswe 0(%r1) 74 75/* 76 * void consume_io_int(void) 77 * 78 * eats one I/O interrupt 79 */ 80 .globl consume_io_int 81consume_io_int: 82 /* enable I/O interrupts in cr6 */ 83 stctg %c6,%c6,0(%r15) 84 oi 4(%r15), 0xff 85 lctlg %c6,%c6,0(%r15) 86 /* prepare i/o call handler */ 87 larl %r1, io_new_code 88 stg %r1, 0x1f8 89 larl %r1, io_new_mask 90 mvc 0x1f0(8),0(%r1) 91 /* load enabled wait PSW */ 92 larl %r1, enabled_wait_psw 93 lpswe 0(%r1) 94 95external_new_code: 96 /* disable service interrupts in cr0 */ 97 stctg %c0,%c0,0(%r15) 98 ni 6(%r15),0xfd 99 lctlg %c0,%c0,0(%r15) 100 br %r14 101 102io_new_code: 103 /* disable I/O interrupts in cr6 */ 104 stctg %c6,%c6,0(%r15) 105 ni 4(%r15), 0x00 106 lctlg %c6,%c6,0(%r15) 107 br %r14 108 109 .align 8 110disabled_wait_psw: 111 .quad 0x0002000180000000,0x0000000000000000 112enabled_wait_psw: 113 .quad 0x0302000180000000,0x0000000000000000 114external_new_mask: 115 .quad 0x0000000180000000 116io_new_mask: 117 .quad 0x0000000180000000 118