1/* 2 * First stage boot loader for virtio devices. The compiled output goes 3 * into the pc-bios directory of qemu. 4 * 5 * Copyright (c) 2013 Alexander Graf <agraf@suse.de> 6 * Copyright IBM Corp. 2013, 2017 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or (at 9 * your option) any later version. See the COPYING file in the top-level 10 * directory. 11 */ 12 13 .globl _start 14_start: 15 16 larl %r15, stack + 0x8000 /* Set up stack */ 17 18 /* clear bss */ 19 larl %r2, __bss_start 20 larl %r3, _end 21 slgr %r3, %r2 /* get sizeof bss */ 22 ltgr %r3,%r3 /* bss emtpy? */ 23 jz done 24 aghi %r3,-1 25 srlg %r4,%r3,8 /* how many 256 byte chunks? */ 26 ltgr %r4,%r4 27 lgr %r1,%r2 28 jz remainder 29loop: 30 xc 0(256,%r1),0(%r1) 31 la %r1,256(%r1) 32 brctg %r4,loop 33remainder: 34 larl %r2,memsetxc 35 ex %r3,0(%r2) 36done: 37 j main /* And call C */ 38 39memsetxc: 40 xc 0(1,%r1),0(%r1) 41 42 43/* 44 * void disabled_wait(void) 45 * 46 * stops the current guest cpu. 47 */ 48 .globl disabled_wait 49disabled_wait: 50 larl %r1,disabled_wait_psw 51 lpswe 0(%r1) 52 53 54/* 55 * void consume_sclp_int(void) 56 * 57 * eats one sclp interrupt 58 */ 59 .globl consume_sclp_int 60consume_sclp_int: 61 /* enable service interrupts in cr0 */ 62 stctg %c0,%c0,0(%r15) 63 oi 6(%r15),0x2 64 lctlg %c0,%c0,0(%r15) 65 /* prepare external call handler */ 66 larl %r1, external_new_code 67 stg %r1, 0x1b8 68 larl %r1, external_new_mask 69 mvc 0x1b0(8),0(%r1) 70 /* load enabled wait PSW */ 71 larl %r1, enabled_wait_psw 72 lpswe 0(%r1) 73 74/* 75 * void consume_io_int(void) 76 * 77 * eats one I/O interrupt 78 */ 79 .globl consume_io_int 80consume_io_int: 81 /* enable I/O interrupts in cr6 */ 82 stctg %c6,%c6,0(%r15) 83 oi 4(%r15), 0xff 84 lctlg %c6,%c6,0(%r15) 85 /* prepare i/o call handler */ 86 larl %r1, io_new_code 87 stg %r1, 0x1f8 88 larl %r1, io_new_mask 89 mvc 0x1f0(8),0(%r1) 90 /* load enabled wait PSW */ 91 larl %r1, enabled_wait_psw 92 lpswe 0(%r1) 93 94external_new_code: 95 /* disable service interrupts in cr0 */ 96 stctg %c0,%c0,0(%r15) 97 ni 6(%r15),0xfd 98 lctlg %c0,%c0,0(%r15) 99 br %r14 100 101io_new_code: 102 /* disable I/O interrupts in cr6 */ 103 stctg %c6,%c6,0(%r15) 104 ni 4(%r15), 0x00 105 lctlg %c6,%c6,0(%r15) 106 br %r14 107 108 .align 8 109disabled_wait_psw: 110 .quad 0x0002000180000000,0x0000000000000000 111enabled_wait_psw: 112 .quad 0x0302000180000000,0x0000000000000000 113external_new_mask: 114 .quad 0x0000000180000000 115io_new_mask: 116 .quad 0x0000000180000000 117