1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 3 #include "qemu/osdep.h" 4 #include "qemu.h" 5 #include "loader.h" 6 #include "elf.h" 7 #include "target_elf.h" 8 9 10 const char *get_elf_cpu_model(uint32_t eflags) 11 { 12 return "qemu"; 13 } 14 15 #define GET_FEATURE(_feat, _hwcap) \ 16 do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0) 17 18 abi_ulong get_elf_hwcap(CPUState *cs) 19 { 20 /* 21 * Let's assume we always have esan3 and zarch. 22 * 31-bit processes can use 64-bit registers (high gprs). 23 */ 24 uint32_t hwcap = HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HIGH_GPRS; 25 26 GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE); 27 GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA); 28 GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP); 29 GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM); 30 if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) && 31 s390_has_feat(S390_FEAT_ETF3_ENH)) { 32 hwcap |= HWCAP_S390_ETF3EH; 33 } 34 GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS); 35 GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT); 36 GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2); 37 38 return hwcap; 39 } 40 41 const char *elf_hwcap_str(uint32_t bit) 42 { 43 static const char *hwcap_str[] = { 44 [HWCAP_S390_NR_ESAN3] = "esan3", 45 [HWCAP_S390_NR_ZARCH] = "zarch", 46 [HWCAP_S390_NR_STFLE] = "stfle", 47 [HWCAP_S390_NR_MSA] = "msa", 48 [HWCAP_S390_NR_LDISP] = "ldisp", 49 [HWCAP_S390_NR_EIMM] = "eimm", 50 [HWCAP_S390_NR_DFP] = "dfp", 51 [HWCAP_S390_NR_HPAGE] = "edat", 52 [HWCAP_S390_NR_ETF3EH] = "etf3eh", 53 [HWCAP_S390_NR_HIGH_GPRS] = "highgprs", 54 [HWCAP_S390_NR_TE] = "te", 55 [HWCAP_S390_NR_VXRS] = "vx", 56 [HWCAP_S390_NR_VXRS_BCD] = "vxd", 57 [HWCAP_S390_NR_VXRS_EXT] = "vxe", 58 [HWCAP_S390_NR_GS] = "gs", 59 [HWCAP_S390_NR_VXRS_EXT2] = "vxe2", 60 [HWCAP_S390_NR_VXRS_PDE] = "vxp", 61 [HWCAP_S390_NR_SORT] = "sort", 62 [HWCAP_S390_NR_DFLT] = "dflt", 63 [HWCAP_S390_NR_NNPA] = "nnpa", 64 [HWCAP_S390_NR_PCI_MIO] = "pcimio", 65 [HWCAP_S390_NR_SIE] = "sie", 66 }; 67 68 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL; 69 } 70 71 void elf_core_copy_regs(target_elf_gregset_t *r, const CPUS390XState *env) 72 { 73 r->pt.psw.mask = tswapal(env->psw.mask); 74 r->pt.psw.addr = tswapal(env->psw.addr); 75 for (int i = 0; i < 16; i++) { 76 r->pt.gprs[i] = tswapal(env->regs[i]); 77 } 78 for (int i = 0; i < 16; i++) { 79 r->pt.acrs[i] = tswap32(env->aregs[i]); 80 } 81 r->pt.orig_gpr2 = 0; 82 } 83