1 /* 2 * QEMU PowerPC N1 chiplet model 3 * 4 * Copyright (c) 2023, IBM Corporation. 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef PPC_PNV_N1_CHIPLET_H 10 #define PPC_PNV_N1_CHIPLET_H 11 12 #include "hw/ppc/pnv_nest_pervasive.h" 13 14 #define TYPE_PNV_N1_CHIPLET "pnv-N1-chiplet" 15 #define PNV_N1_CHIPLET(obj) OBJECT_CHECK(PnvN1Chiplet, (obj), TYPE_PNV_N1_CHIPLET) 16 17 typedef struct PnvPbScom { 18 uint64_t mode; 19 uint64_t hp_mode2_curr; 20 } PnvPbScom; 21 22 typedef struct PnvN1Chiplet { 23 DeviceState parent; 24 MemoryRegion xscom_pb_eq_mr; 25 MemoryRegion xscom_pb_es_mr; 26 PnvNestChipletPervasive nest_pervasive; /* common pervasive chiplet unit */ 27 #define PNV_PB_SCOM_EQ_SIZE 8 28 PnvPbScom eq[PNV_PB_SCOM_EQ_SIZE]; 29 #define PNV_PB_SCOM_ES_SIZE 4 30 PnvPbScom es[PNV_PB_SCOM_ES_SIZE]; 31 } PnvN1Chiplet; 32 #endif /*PPC_PNV_N1_CHIPLET_H */ 33