1c46cabd4SAmir Gonnen /* 2c46cabd4SAmir Gonnen * Vectored Interrupt Controller for nios2 processor 3c46cabd4SAmir Gonnen * 4c46cabd4SAmir Gonnen * Copyright (c) 2022 Neuroblade 5c46cabd4SAmir Gonnen * 6c46cabd4SAmir Gonnen * Interface: 7c46cabd4SAmir Gonnen * QOM property "cpu": link to the Nios2 CPU (must be set) 8c46cabd4SAmir Gonnen * Unnamed GPIO inputs 0..NIOS2_VIC_MAX_IRQ-1: input IRQ lines 9c46cabd4SAmir Gonnen * IRQ should be connected to nios2 IRQ0. 10c46cabd4SAmir Gonnen * 11c46cabd4SAmir Gonnen * Reference: "Embedded Peripherals IP User Guide 12c46cabd4SAmir Gonnen * for Intel® Quartus® Prime Design Suite: 21.4" 13c46cabd4SAmir Gonnen * Chapter 38 "Vectored Interrupt Controller Core" 14c46cabd4SAmir Gonnen * See: https://www.intel.com/content/www/us/en/docs/programmable/683130/21-4/vectored-interrupt-controller-core.html 15c46cabd4SAmir Gonnen * 16c46cabd4SAmir Gonnen * Permission is hereby granted, free of charge, to any person obtaining a copy 17c46cabd4SAmir Gonnen * of this software and associated documentation files (the "Software"), to deal 18c46cabd4SAmir Gonnen * in the Software without restriction, including without limitation the rights 19c46cabd4SAmir Gonnen * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 20c46cabd4SAmir Gonnen * copies of the Software, and to permit persons to whom the Software is 21c46cabd4SAmir Gonnen * furnished to do so, subject to the following conditions: 22c46cabd4SAmir Gonnen * 23c46cabd4SAmir Gonnen * The above copyright notice and this permission notice shall be included in 24c46cabd4SAmir Gonnen * all copies or substantial portions of the Software. 25c46cabd4SAmir Gonnen * 26c46cabd4SAmir Gonnen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 27c46cabd4SAmir Gonnen * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 28c46cabd4SAmir Gonnen * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 29c46cabd4SAmir Gonnen * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 30c46cabd4SAmir Gonnen * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 31c46cabd4SAmir Gonnen * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 32c46cabd4SAmir Gonnen * THE SOFTWARE. 33c46cabd4SAmir Gonnen */ 34c46cabd4SAmir Gonnen 35*9c092804SMarkus Armbruster #ifndef HW_INTC_NIOS2_VIC_H 36*9c092804SMarkus Armbruster #define HW_INTC_NIOS2_VIC_H 37c46cabd4SAmir Gonnen 38c46cabd4SAmir Gonnen #define TYPE_NIOS2_VIC "nios2-vic" 39c46cabd4SAmir Gonnen OBJECT_DECLARE_SIMPLE_TYPE(Nios2VIC, NIOS2_VIC) 40c46cabd4SAmir Gonnen 41c46cabd4SAmir Gonnen #define NIOS2_VIC_MAX_IRQ 32 42c46cabd4SAmir Gonnen 43c46cabd4SAmir Gonnen struct Nios2VIC { 44c46cabd4SAmir Gonnen /*< private >*/ 45c46cabd4SAmir Gonnen SysBusDevice parent_obj; 46c46cabd4SAmir Gonnen 47c46cabd4SAmir Gonnen /*< public >*/ 48c46cabd4SAmir Gonnen qemu_irq output_int; 49c46cabd4SAmir Gonnen 50c46cabd4SAmir Gonnen /* properties */ 51c46cabd4SAmir Gonnen CPUState *cpu; 52c46cabd4SAmir Gonnen MemoryRegion csr; 53c46cabd4SAmir Gonnen 54c46cabd4SAmir Gonnen uint32_t int_config[NIOS2_VIC_MAX_IRQ]; 55c46cabd4SAmir Gonnen uint32_t vic_config; 56c46cabd4SAmir Gonnen uint32_t int_raw_status; 57c46cabd4SAmir Gonnen uint32_t int_enable; 58c46cabd4SAmir Gonnen uint32_t sw_int; 59c46cabd4SAmir Gonnen uint32_t vic_status; 60c46cabd4SAmir Gonnen uint32_t vec_tbl_base; 61c46cabd4SAmir Gonnen uint32_t vec_tbl_addr; 62c46cabd4SAmir Gonnen }; 63c46cabd4SAmir Gonnen 64*9c092804SMarkus Armbruster #endif /* HW_INTC_NIOS2_VIC_H */ 65