xref: /openbmc/qemu/include/hw/i3c/mock-i3c-target.h (revision 1be2934580e149a42e40ebf909d6ba75272df5c2)
1 #ifndef MOCK_I3C_TARGET_H_
2 #define MOCK_I3C_TARGET_H_
3 
4 /*
5  * Mock I3C Device
6  *
7  * Copyright (c) 2025 Google LLC
8  *
9  * The mock I3C device can be thought of as a simple EEPROM. It has a buffer,
10  * and the pointer in the buffer is reset to 0 on an I3C STOP.
11  * To write to the buffer, issue a private write and send data.
12  * To read from the buffer, issue a private read.
13  *
14  * The mock target also supports sending target interrupt IBIs.
15  * To issue an IBI, set the 'ibi-magic-num' property to a non-zero number, and
16  * send that number in a private transaction. The mock target will issue an IBI
17  * after 1 second.
18  *
19  * It also supports a handful of CCCs that are typically used when probing I3C
20  * devices.
21  *
22  * SPDX-License-Identifier: GPL-2.0-or-later
23  */
24 
25 #include "qemu/osdep.h"
26 #include "qemu/timer.h"
27 #include "hw/i3c/i3c.h"
28 
29 #define TYPE_MOCK_I3C_TARGET "mock-i3c-target"
30 OBJECT_DECLARE_SIMPLE_TYPE(MockI3cTargetState, MOCK_I3C_TARGET)
31 
32 struct MockI3cTargetState {
33     I3CTarget i3c;
34 
35     /* General device state */
36     bool can_ibi;
37     QEMUTimer qtimer;
38     size_t p_buf;
39     uint8_t *buf;
40 
41     /* For Handing CCCs. */
42     bool in_ccc;
43     I3CCCC curr_ccc;
44     uint8_t ccc_byte_offset;
45 
46     struct {
47         uint32_t buf_size;
48         uint8_t ibi_magic;
49     } cfg;
50 };
51 
52 #endif
53