xref: /openbmc/qemu/hw/riscv/Kconfig (revision be3fc97a)
1config RISCV_IOMMU
2    bool
3
4config RISCV_NUMA
5    bool
6
7config IBEX
8    bool
9
10# RISC-V machines in alphabetical order
11
12config MICROCHIP_PFSOC
13    bool
14    default y
15    depends on RISCV64
16    select CADENCE_SDHCI
17    select CPU_CLUSTER
18    select DEVICE_TREE
19    select MCHP_PFSOC_DMC
20    select MCHP_PFSOC_IOSCB
21    select MCHP_PFSOC_MMUART
22    select MCHP_PFSOC_SYSREG
23    select RISCV_ACLINT
24    select SIFIVE_PDMA
25    select SIFIVE_PLIC
26    select UNIMP
27
28config OPENTITAN
29    bool
30    default y
31    depends on RISCV32
32    select IBEX
33    select SIFIVE_PLIC
34    select UNIMP
35
36config RISCV_VIRT
37    bool
38    default y
39    depends on RISCV32 || RISCV64
40    imply PCI_DEVICES
41    imply VIRTIO_VGA
42    imply TEST_DEVICES
43    imply TPM_TIS_SYSBUS
44    select DEVICE_TREE
45    select RISCV_NUMA
46    select GOLDFISH_RTC
47    select PCI
48    select PCI_EXPRESS_GENERIC_BRIDGE
49    select PFLASH_CFI01
50    select SERIAL_MM
51    select RISCV_ACLINT
52    select RISCV_APLIC
53    select RISCV_IOMMU
54    select RISCV_IMSIC
55    select SIFIVE_PLIC
56    select SIFIVE_TEST
57    select SMBIOS
58    select VIRTIO_MMIO
59    select FW_CFG_DMA
60    select PLATFORM_BUS
61    select ACPI
62    select ACPI_PCI
63
64config SHAKTI_C
65    bool
66    default y
67    depends on RISCV64
68    select RISCV_ACLINT
69    select SHAKTI_UART
70    select SIFIVE_PLIC
71    select UNIMP
72
73config SIFIVE_E
74    bool
75    default y
76    depends on RISCV32 || RISCV64
77    select RISCV_ACLINT
78    select SIFIVE_GPIO
79    select SIFIVE_PLIC
80    select SIFIVE_UART
81    select SIFIVE_E_PRCI
82    select SIFIVE_E_AON
83    select UNIMP
84
85config SIFIVE_U
86    bool
87    default y
88    depends on RISCV32 || RISCV64
89    select CADENCE
90    select CPU_CLUSTER
91    select DEVICE_TREE
92    select RISCV_ACLINT
93    select SIFIVE_GPIO
94    select SIFIVE_PDMA
95    select SIFIVE_PLIC
96    select SIFIVE_SPI
97    select SIFIVE_UART
98    select SIFIVE_U_OTP
99    select SIFIVE_U_PRCI
100    select SIFIVE_PWM
101    select SSI_M25P80
102    select SSI_SD
103    select UNIMP
104
105config SPIKE
106    bool
107    default y
108    depends on RISCV32 || RISCV64
109    select DEVICE_TREE
110    select RISCV_NUMA
111    select HTIF
112    select RISCV_ACLINT
113    select SIFIVE_PLIC
114