xref: /openbmc/qemu/hw/riscv/Kconfig (revision 542b10bd)
1config RISCV_NUMA
2    bool
3
4config IBEX
5    bool
6
7# RISC-V machines in alphabetical order
8
9config MICROCHIP_PFSOC
10    bool
11    select CADENCE_SDHCI
12    select MCHP_PFSOC_DMC
13    select MCHP_PFSOC_IOSCB
14    select MCHP_PFSOC_MMUART
15    select MCHP_PFSOC_SYSREG
16    select RISCV_ACLINT
17    select SIFIVE_PDMA
18    select SIFIVE_PLIC
19    select UNIMP
20
21config OPENTITAN
22    bool
23    select IBEX
24    select SIFIVE_PLIC
25    select UNIMP
26
27config RISCV_VIRT
28    bool
29    imply PCI_DEVICES
30    imply VIRTIO_VGA
31    imply TEST_DEVICES
32    imply TPM_TIS_SYSBUS
33    select RISCV_NUMA
34    select GOLDFISH_RTC
35    select PCI
36    select PCI_EXPRESS_GENERIC_BRIDGE
37    select PFLASH_CFI01
38    select SERIAL
39    select RISCV_ACLINT
40    select RISCV_APLIC
41    select RISCV_IMSIC
42    select SIFIVE_PLIC
43    select SIFIVE_TEST
44    select SMBIOS
45    select VIRTIO_MMIO
46    select FW_CFG_DMA
47    select PLATFORM_BUS
48    select ACPI
49    select ACPI_PCI
50
51config SHAKTI_C
52    bool
53    select RISCV_ACLINT
54    select SHAKTI_UART
55    select SIFIVE_PLIC
56    select UNIMP
57
58config SIFIVE_E
59    bool
60    select RISCV_ACLINT
61    select SIFIVE_GPIO
62    select SIFIVE_PLIC
63    select SIFIVE_UART
64    select SIFIVE_E_PRCI
65    select SIFIVE_E_AON
66    select UNIMP
67
68config SIFIVE_U
69    bool
70    select CADENCE
71    select RISCV_ACLINT
72    select SIFIVE_GPIO
73    select SIFIVE_PDMA
74    select SIFIVE_PLIC
75    select SIFIVE_SPI
76    select SIFIVE_UART
77    select SIFIVE_U_OTP
78    select SIFIVE_U_PRCI
79    select SIFIVE_PWM
80    select SSI_M25P80
81    select SSI_SD
82    select UNIMP
83
84config SPIKE
85    bool
86    select RISCV_NUMA
87    select HTIF
88    select RISCV_ACLINT
89    select SIFIVE_PLIC
90