1config RISCV_NUMA 2 bool 3 4config IBEX 5 bool 6 7# RISC-V machines in alphabetical order 8 9config MICROCHIP_PFSOC 10 bool 11 default y 12 depends on RISCV64 13 select CADENCE_SDHCI 14 select CPU_CLUSTER 15 select MCHP_PFSOC_DMC 16 select MCHP_PFSOC_IOSCB 17 select MCHP_PFSOC_MMUART 18 select MCHP_PFSOC_SYSREG 19 select RISCV_ACLINT 20 select SIFIVE_PDMA 21 select SIFIVE_PLIC 22 select UNIMP 23 24config OPENTITAN 25 bool 26 default y 27 depends on RISCV32 28 select IBEX 29 select SIFIVE_PLIC 30 select UNIMP 31 32config RISCV_VIRT 33 bool 34 default y 35 depends on RISCV32 || RISCV64 36 imply PCI_DEVICES 37 imply VIRTIO_VGA 38 imply TEST_DEVICES 39 imply TPM_TIS_SYSBUS 40 select RISCV_NUMA 41 select GOLDFISH_RTC 42 select PCI 43 select PCI_EXPRESS_GENERIC_BRIDGE 44 select PFLASH_CFI01 45 select SERIAL 46 select RISCV_ACLINT 47 select RISCV_APLIC 48 select RISCV_IMSIC 49 select SIFIVE_PLIC 50 select SIFIVE_TEST 51 select SMBIOS 52 select VIRTIO_MMIO 53 select FW_CFG_DMA 54 select PLATFORM_BUS 55 select ACPI 56 select ACPI_PCI 57 58config SHAKTI_C 59 bool 60 default y 61 depends on RISCV64 62 select RISCV_ACLINT 63 select SHAKTI_UART 64 select SIFIVE_PLIC 65 select UNIMP 66 67config SIFIVE_E 68 bool 69 default y 70 depends on RISCV32 || RISCV64 71 select RISCV_ACLINT 72 select SIFIVE_GPIO 73 select SIFIVE_PLIC 74 select SIFIVE_UART 75 select SIFIVE_E_PRCI 76 select SIFIVE_E_AON 77 select UNIMP 78 79config SIFIVE_U 80 bool 81 default y 82 depends on RISCV32 || RISCV64 83 select CADENCE 84 select CPU_CLUSTER 85 select RISCV_ACLINT 86 select SIFIVE_GPIO 87 select SIFIVE_PDMA 88 select SIFIVE_PLIC 89 select SIFIVE_SPI 90 select SIFIVE_UART 91 select SIFIVE_U_OTP 92 select SIFIVE_U_PRCI 93 select SIFIVE_PWM 94 select SSI_M25P80 95 select SSI_SD 96 select UNIMP 97 98config SPIKE 99 bool 100 default y 101 depends on RISCV32 || RISCV64 102 select RISCV_NUMA 103 select HTIF 104 select RISCV_ACLINT 105 select SIFIVE_PLIC 106