xref: /openbmc/qemu/hw/riscv/Kconfig (revision 0654c794)
1config RISCV_NUMA
2    bool
3
4config IBEX
5    bool
6
7# RISC-V machines in alphabetical order
8
9config MICROCHIP_PFSOC
10    bool
11    select CADENCE_SDHCI
12    select CPU_CLUSTER
13    select MCHP_PFSOC_DMC
14    select MCHP_PFSOC_IOSCB
15    select MCHP_PFSOC_MMUART
16    select MCHP_PFSOC_SYSREG
17    select RISCV_ACLINT
18    select SIFIVE_PDMA
19    select SIFIVE_PLIC
20    select UNIMP
21
22config OPENTITAN
23    bool
24    select IBEX
25    select SIFIVE_PLIC
26    select UNIMP
27
28config RISCV_VIRT
29    bool
30    imply PCI_DEVICES
31    imply VIRTIO_VGA
32    imply TEST_DEVICES
33    imply TPM_TIS_SYSBUS
34    select RISCV_NUMA
35    select GOLDFISH_RTC
36    select PCI
37    select PCI_EXPRESS_GENERIC_BRIDGE
38    select PFLASH_CFI01
39    select SERIAL
40    select RISCV_ACLINT
41    select RISCV_APLIC
42    select RISCV_IMSIC
43    select SIFIVE_PLIC
44    select SIFIVE_TEST
45    select SMBIOS
46    select VIRTIO_MMIO
47    select FW_CFG_DMA
48    select PLATFORM_BUS
49    select ACPI
50    select ACPI_PCI
51
52config SHAKTI_C
53    bool
54    select RISCV_ACLINT
55    select SHAKTI_UART
56    select SIFIVE_PLIC
57    select UNIMP
58
59config SIFIVE_E
60    bool
61    select RISCV_ACLINT
62    select SIFIVE_GPIO
63    select SIFIVE_PLIC
64    select SIFIVE_UART
65    select SIFIVE_E_PRCI
66    select SIFIVE_E_AON
67    select UNIMP
68
69config SIFIVE_U
70    bool
71    select CADENCE
72    select CPU_CLUSTER
73    select RISCV_ACLINT
74    select SIFIVE_GPIO
75    select SIFIVE_PDMA
76    select SIFIVE_PLIC
77    select SIFIVE_SPI
78    select SIFIVE_UART
79    select SIFIVE_U_OTP
80    select SIFIVE_U_PRCI
81    select SIFIVE_PWM
82    select SSI_M25P80
83    select SSI_SD
84    select UNIMP
85
86config SPIKE
87    bool
88    select RISCV_NUMA
89    select HTIF
90    select RISCV_ACLINT
91    select SIFIVE_PLIC
92