1d0fb9657SStefano Garzarella# See docs/devel/tracing.rst for syntax documentation. 2bfec08b5SMark Cave-Ayland 3*5af53aa5SJamin Lin# aspeed_pcie.c 4*5af53aa5SJamin Linaspeed_pcie_phy_read(uint32_t id, uint64_t addr, uint32_t value) "%d: addr 0x%" PRIx64 " value 0x%" PRIx32 5*5af53aa5SJamin Linaspeed_pcie_phy_write(uint32_t id, uint64_t addr, uint32_t value) "%d: addr 0x%" PRIx64 " value 0x%" PRIx32 6*5af53aa5SJamin Lin 7300491f9SPhilippe Mathieu-Daudé# bonito.c 8300491f9SPhilippe Mathieu-Daudébonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-bit, addr: 0x%"PRIx64", size: %u" 9300491f9SPhilippe Mathieu-Daudé 10500016e5SMarkus Armbruster# grackle.c 11b728fbbcSMark Cave-Aylandgrackle_set_irq(int irq_num, int level) "set_irq num %d level %d" 12b728fbbcSMark Cave-Ayland 13a7db759eSPhilippe Mathieu-Daudé# gt64120.c 14a7db759eSPhilippe Mathieu-Daudégt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" value:0x%08" PRIx64 15a7db759eSPhilippe Mathieu-Daudégt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" value:0x%08" PRIx64 16a7db759eSPhilippe Mathieu-Daudégt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64 17a7db759eSPhilippe Mathieu-Daudégt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64 18a7db759eSPhilippe Mathieu-Daudégt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64 19a7db759eSPhilippe Mathieu-Daudé 20dcdf98a9SBALATON Zoltan# mv64361.c 21dcdf98a9SBALATON Zoltanmv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 22dcdf98a9SBALATON Zoltanmv64361_region_enable(const char *op, int num) "Should %s region %d" 23dcdf98a9SBALATON Zoltanmv64361_reg_read(uint64_t addr, uint32_t val) "0x%"PRIx64" -> 0x%x" 24dcdf98a9SBALATON Zoltanmv64361_reg_write(uint64_t addr, uint64_t val) "0x%"PRIx64" <- 0x%"PRIx64 25dcdf98a9SBALATON Zoltan 26500016e5SMarkus Armbruster# sabre.c 27bfec08b5SMark Cave-Aylandsabre_set_request(int irq_num) "request irq %d" 28bfec08b5SMark Cave-Aylandsabre_clear_request(int irq_num) "clear request irq %d" 29bfec08b5SMark Cave-Aylandsabre_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 30bfec08b5SMark Cave-Aylandsabre_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 31bfec08b5SMark Cave-Aylandsabre_pci_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 32bfec08b5SMark Cave-Aylandsabre_pci_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 33bfec08b5SMark Cave-Aylandsabre_pci_set_irq(int irq_num, int level) "set irq_in %d level %d" 34bfec08b5SMark Cave-Aylandsabre_pci_set_obio_irq(int irq_num, int level) "set irq %d level %d" 350b0c5e90SMark Cave-Ayland 36500016e5SMarkus Armbruster# uninorth.c 370b0c5e90SMark Cave-Aylandunin_set_irq(int irq_num, int level) "setting INT %d = %d" 380b0c5e90SMark Cave-Aylandunin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32 390b0c5e90SMark Cave-Aylandunin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 400b0c5e90SMark Cave-Aylandunin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64 410662946aSMark Cave-Aylandunin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 420662946aSMark Cave-Aylandunin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 432cfc9f1aSCédric Le Goater 4455abb29eSPhilippe Mathieu-Daudé# ppc4xx_pci.c 4555abb29eSPhilippe Mathieu-Daudéppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" 4655abb29eSPhilippe Mathieu-Daudéppc4xx_pci_set_irq(int irq_num) "PCI irq %d" 4755abb29eSPhilippe Mathieu-Daudé 4822dc8a47SPhilippe Mathieu-Daudé# ppc440_pcix.c 4922dc8a47SPhilippe Mathieu-Daudéppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" 5022dc8a47SPhilippe Mathieu-Daudéppc440_pcix_set_irq(int irq_num) "PCI irq %d" 5122dc8a47SPhilippe Mathieu-Daudéppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 5222dc8a47SPhilippe Mathieu-Daudéppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64 5322dc8a47SPhilippe Mathieu-Daudéppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 5422dc8a47SPhilippe Mathieu-Daudéppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32 5522dc8a47SPhilippe Mathieu-Daudé 562cfc9f1aSCédric Le Goater# pnv_phb4.c 572cfc9f1aSCédric Le Goaterpnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 5834b0696bSCédric Le Goaterpnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64 5934b0696bSCédric Le Goaterpnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 600db9350eSMark Cave-Ayland 610db9350eSMark Cave-Ayland# dino.c 620db9350eSMark Cave-Aylanddino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" 630db9350eSMark Cave-Aylanddino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 640db9350eSMark Cave-Aylanddino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 65e029bb00SHelge Deller 66e029bb00SHelge Deller# astro.c 67e029bb00SHelge Dellerastro_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" 68e029bb00SHelge Dellerastro_chip_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 69e029bb00SHelge Dellerastro_chip_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 70e029bb00SHelge Dellerelroy_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 71e029bb00SHelge Dellerelroy_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 72e029bb00SHelge Dellerelroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 73e029bb00SHelge Dellerelroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 74e029bb00SHelge Delleriosapic_reg_write(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64 75e029bb00SHelge Delleriosapic_reg_read(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64 76