1 /* 2 * QEMU fuloong 2e mini pc support 3 * 4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 /* 14 * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) 15 * https://www.linux-mips.org/wiki/Fuloong_2E 16 * 17 * Loongson 2e manuals: 18 * https://github.com/loongson-community/docs/tree/master/2E 19 */ 20 21 #include "qemu/osdep.h" 22 #include "qemu/datadir.h" 23 #include "qemu/units.h" 24 #include "qapi/error.h" 25 #include "cpu.h" 26 #include "hw/clock.h" 27 #include "net/net.h" 28 #include "hw/boards.h" 29 #include "hw/i2c/smbus_eeprom.h" 30 #include "hw/block/flash.h" 31 #include "hw/mips/mips.h" 32 #include "hw/mips/bootloader.h" 33 #include "hw/mips/cpudevs.h" 34 #include "hw/pci/pci.h" 35 #include "hw/loader.h" 36 #include "hw/ide/pci.h" 37 #include "hw/qdev-properties.h" 38 #include "elf.h" 39 #include "hw/isa/vt82c686.h" 40 #include "sysemu/qtest.h" 41 #include "sysemu/reset.h" 42 #include "sysemu/sysemu.h" 43 #include "qemu/error-report.h" 44 45 #define ENVP_PADDR 0x2000 46 #define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR) 47 #define ENVP_NB_ENTRIES 16 48 #define ENVP_ENTRY_SIZE 256 49 50 /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */ 51 #define BIOS_SIZE (512 * KiB) 52 53 /* 54 * PMON is not part of qemu and released with BSD license, anyone 55 * who want to build a pmon binary please first git-clone the source 56 * from the git repository at: 57 * https://github.com/loongson-community/pmon 58 */ 59 #define FULOONG_BIOSNAME "pmon_2e.bin" 60 61 /* PCI SLOT in Fuloong 2e */ 62 #define FULOONG2E_VIA_SLOT 5 63 #define FULOONG2E_ATI_SLOT 6 64 #define FULOONG2E_RTL8139_SLOT 7 65 66 static struct _loaderparams { 67 int ram_size; 68 const char *kernel_filename; 69 const char *kernel_cmdline; 70 const char *initrd_filename; 71 } loaderparams; 72 73 static void G_GNUC_PRINTF(3, 4) prom_set(uint32_t *prom_buf, int index, 74 const char *string, ...) 75 { 76 va_list ap; 77 int32_t table_addr; 78 79 if (index >= ENVP_NB_ENTRIES) { 80 return; 81 } 82 83 if (string == NULL) { 84 prom_buf[index] = 0; 85 return; 86 } 87 88 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; 89 prom_buf[index] = tswap32(ENVP_VADDR + table_addr); 90 91 va_start(ap, string); 92 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); 93 va_end(ap); 94 } 95 96 static uint64_t load_kernel(MIPSCPU *cpu) 97 { 98 uint64_t kernel_entry, kernel_high, initrd_size; 99 int index = 0; 100 long kernel_size; 101 ram_addr_t initrd_offset; 102 uint32_t *prom_buf; 103 long prom_size; 104 105 kernel_size = load_elf(loaderparams.kernel_filename, NULL, 106 cpu_mips_kseg0_to_phys, NULL, 107 &kernel_entry, NULL, 108 &kernel_high, NULL, 109 0, EM_MIPS, 1, 0); 110 if (kernel_size < 0) { 111 error_report("could not load kernel '%s': %s", 112 loaderparams.kernel_filename, 113 load_elf_strerror(kernel_size)); 114 exit(1); 115 } 116 117 /* load initrd */ 118 initrd_size = 0; 119 initrd_offset = 0; 120 if (loaderparams.initrd_filename) { 121 initrd_size = get_image_size(loaderparams.initrd_filename); 122 if (initrd_size > 0) { 123 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE); 124 if (initrd_offset + initrd_size > loaderparams.ram_size) { 125 error_report("memory too small for initial ram disk '%s'", 126 loaderparams.initrd_filename); 127 exit(1); 128 } 129 initrd_size = load_image_targphys(loaderparams.initrd_filename, 130 initrd_offset, 131 loaderparams.ram_size - initrd_offset); 132 } 133 if (initrd_size == (target_ulong) -1) { 134 error_report("could not load initial ram disk '%s'", 135 loaderparams.initrd_filename); 136 exit(1); 137 } 138 } 139 140 /* Setup prom parameters. */ 141 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); 142 prom_buf = g_malloc(prom_size); 143 144 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); 145 if (initrd_size > 0) { 146 prom_set(prom_buf, index++, 147 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", 148 cpu_mips_phys_to_kseg0(NULL, initrd_offset), 149 initrd_size, loaderparams.kernel_cmdline); 150 } else { 151 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); 152 } 153 154 /* Setup minimum environment variables */ 155 prom_set(prom_buf, index++, "busclock=33000000"); 156 prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock)); 157 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB); 158 prom_set(prom_buf, index++, NULL); 159 160 rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR); 161 162 g_free(prom_buf); 163 return kernel_entry; 164 } 165 166 static void write_bootloader(CPUMIPSState *env, uint8_t *base, 167 uint64_t kernel_addr) 168 { 169 uint32_t *p; 170 171 /* Small bootloader */ 172 p = (uint32_t *)base; 173 174 /* j 0x1fc00040 */ 175 stl_p(p++, 0x0bf00010); 176 /* nop */ 177 stl_p(p++, 0x00000000); 178 179 /* Second part of the bootloader */ 180 p = (uint32_t *)(base + 0x040); 181 182 bl_gen_jump_kernel((void **)&p, 183 true, ENVP_VADDR - 64, 184 true, 2, true, ENVP_VADDR, 185 true, ENVP_VADDR + 8, 186 true, loaderparams.ram_size, 187 kernel_addr); 188 } 189 190 static void main_cpu_reset(void *opaque) 191 { 192 MIPSCPU *cpu = opaque; 193 CPUMIPSState *env = &cpu->env; 194 195 cpu_reset(CPU(cpu)); 196 /* TODO: 2E reset stuff */ 197 if (loaderparams.kernel_filename) { 198 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); 199 } 200 } 201 202 /* Network support */ 203 static void network_init(PCIBus *pci_bus) 204 { 205 int i; 206 207 for (i = 0; i < nb_nics; i++) { 208 NICInfo *nd = &nd_table[i]; 209 const char *default_devaddr = NULL; 210 211 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) { 212 /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */ 213 default_devaddr = "07"; 214 } 215 216 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr); 217 } 218 } 219 220 static void mips_fuloong2e_init(MachineState *machine) 221 { 222 const char *kernel_filename = machine->kernel_filename; 223 const char *kernel_cmdline = machine->kernel_cmdline; 224 const char *initrd_filename = machine->initrd_filename; 225 char *filename; 226 MemoryRegion *address_space_mem = get_system_memory(); 227 MemoryRegion *bios = g_new(MemoryRegion, 1); 228 long bios_size; 229 uint8_t *spd_data; 230 uint64_t kernel_entry; 231 PCIDevice *pci_dev; 232 PCIBus *pci_bus; 233 I2CBus *smbus; 234 Clock *cpuclk; 235 MIPSCPU *cpu; 236 CPUMIPSState *env; 237 DeviceState *dev; 238 239 cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); 240 clock_set_hz(cpuclk, 533080000); /* ~533 MHz */ 241 242 /* init CPUs */ 243 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); 244 env = &cpu->env; 245 246 qemu_register_reset(main_cpu_reset, cpu); 247 248 /* TODO: support more than 256M RAM as highmem */ 249 if (machine->ram_size != 256 * MiB) { 250 error_report("Invalid RAM size, should be 256MB"); 251 exit(EXIT_FAILURE); 252 } 253 memory_region_add_subregion(address_space_mem, 0, machine->ram); 254 255 /* Boot ROM */ 256 memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE, 257 &error_fatal); 258 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 259 260 /* 261 * We do not support flash operation, just loading pmon.bin as raw BIOS. 262 * Please use -L to set the BIOS path and -bios to set bios name. 263 */ 264 265 if (kernel_filename) { 266 loaderparams.ram_size = machine->ram_size; 267 loaderparams.kernel_filename = kernel_filename; 268 loaderparams.kernel_cmdline = kernel_cmdline; 269 loaderparams.initrd_filename = initrd_filename; 270 kernel_entry = load_kernel(cpu); 271 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); 272 } else { 273 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 274 machine->firmware ?: FULOONG_BIOSNAME); 275 if (filename) { 276 bios_size = load_image_targphys(filename, 0x1fc00000LL, 277 BIOS_SIZE); 278 g_free(filename); 279 } else { 280 bios_size = -1; 281 } 282 283 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 284 machine->firmware && !qtest_enabled()) { 285 error_report("Could not load MIPS bios '%s'", machine->firmware); 286 exit(1); 287 } 288 } 289 290 /* Init internal devices */ 291 cpu_mips_irq_init_cpu(cpu); 292 cpu_mips_clock_init(cpu); 293 294 /* North bridge, Bonito --> IP2 */ 295 pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); 296 297 /* South bridge -> IP5 */ 298 pci_dev = pci_new_multifunction(PCI_DEVFN(FULOONG2E_VIA_SLOT, 0), 299 TYPE_VT82C686B_ISA); 300 301 /* Set properties on individual devices before realizing the south bridge */ 302 if (machine->audiodev) { 303 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ac97")); 304 qdev_prop_set_string(dev, "audiodev", machine->audiodev); 305 } 306 307 pci_realize_and_unref(pci_dev, pci_bus, &error_abort); 308 309 object_property_add_alias(OBJECT(machine), "rtc-time", 310 object_resolve_path_component(OBJECT(pci_dev), 311 "rtc"), 312 "date"); 313 qdev_connect_gpio_out(DEVICE(pci_dev), 0, env->irq[5]); 314 315 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); 316 pci_ide_create_devs(PCI_DEVICE(dev)); 317 318 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "pm")); 319 smbus = I2C_BUS(qdev_get_child_bus(dev, "i2c")); 320 321 /* GPU */ 322 if (vga_interface_type != VGA_NONE) { 323 vga_interface_created = true; 324 pci_dev = pci_new(-1, "ati-vga"); 325 dev = DEVICE(pci_dev); 326 qdev_prop_set_uint32(dev, "vgamem_mb", 16); 327 qdev_prop_set_uint16(dev, "x-device-id", 0x5159); 328 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 329 } 330 331 /* Populate SPD eeprom data */ 332 spd_data = spd_data_generate(DDR, machine->ram_size); 333 smbus_eeprom_init_one(smbus, 0x50, spd_data); 334 335 /* Network card: RTL8139D */ 336 network_init(pci_bus); 337 } 338 339 static void mips_fuloong2e_machine_init(MachineClass *mc) 340 { 341 mc->desc = "Fuloong 2e mini pc"; 342 mc->init = mips_fuloong2e_init; 343 mc->block_default_type = IF_IDE; 344 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); 345 mc->default_ram_size = 256 * MiB; 346 mc->default_ram_id = "fuloong2e.ram"; 347 mc->minimum_page_bits = 14; 348 machine_add_audiodev_property(mc); 349 } 350 351 DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init) 352