1 /* 2 * QEMU fuloong 2e mini pc support 3 * 4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13 /* 14 * Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) 15 * https://www.linux-mips.org/wiki/Fuloong_2E 16 * 17 * Loongson 2e manuals: 18 * https://github.com/loongson-community/docs/tree/master/2E 19 */ 20 21 #include "qemu/osdep.h" 22 #include "qemu/datadir.h" 23 #include "qemu/units.h" 24 #include "qapi/error.h" 25 #include "cpu.h" 26 #include "hw/clock.h" 27 #include "net/net.h" 28 #include "hw/boards.h" 29 #include "hw/i2c/smbus_eeprom.h" 30 #include "hw/block/flash.h" 31 #include "hw/mips/mips.h" 32 #include "hw/mips/bootloader.h" 33 #include "hw/pci/pci.h" 34 #include "hw/loader.h" 35 #include "hw/ide/pci.h" 36 #include "hw/qdev-properties.h" 37 #include "elf.h" 38 #include "hw/isa/vt82c686.h" 39 #include "sysemu/qtest.h" 40 #include "sysemu/reset.h" 41 #include "sysemu/sysemu.h" 42 #include "qemu/error-report.h" 43 44 #define ENVP_PADDR 0x2000 45 #define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR) 46 #define ENVP_NB_ENTRIES 16 47 #define ENVP_ENTRY_SIZE 256 48 49 /* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */ 50 #define BIOS_SIZE (512 * KiB) 51 52 /* 53 * PMON is not part of qemu and released with BSD license, anyone 54 * who want to build a pmon binary please first git-clone the source 55 * from the git repository at: 56 * https://github.com/loongson-community/pmon 57 */ 58 #define FULOONG_BIOSNAME "pmon_2e.bin" 59 60 /* PCI SLOT in Fuloong 2e */ 61 #define FULOONG2E_VIA_SLOT 5 62 #define FULOONG2E_ATI_SLOT 6 63 #define FULOONG2E_RTL8139_SLOT 7 64 65 static struct _loaderparams { 66 int ram_size; 67 const char *kernel_filename; 68 const char *kernel_cmdline; 69 const char *initrd_filename; 70 } loaderparams; 71 72 static void G_GNUC_PRINTF(3, 4) prom_set(uint32_t *prom_buf, int index, 73 const char *string, ...) 74 { 75 va_list ap; 76 int32_t table_addr; 77 78 if (index >= ENVP_NB_ENTRIES) { 79 return; 80 } 81 82 if (string == NULL) { 83 prom_buf[index] = 0; 84 return; 85 } 86 87 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; 88 prom_buf[index] = tswap32(ENVP_VADDR + table_addr); 89 90 va_start(ap, string); 91 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); 92 va_end(ap); 93 } 94 95 static uint64_t load_kernel(MIPSCPU *cpu) 96 { 97 uint64_t kernel_entry, kernel_high, initrd_size; 98 int index = 0; 99 long kernel_size; 100 ram_addr_t initrd_offset; 101 uint32_t *prom_buf; 102 long prom_size; 103 104 kernel_size = load_elf(loaderparams.kernel_filename, NULL, 105 cpu_mips_kseg0_to_phys, NULL, 106 &kernel_entry, NULL, 107 &kernel_high, NULL, 108 0, EM_MIPS, 1, 0); 109 if (kernel_size < 0) { 110 error_report("could not load kernel '%s': %s", 111 loaderparams.kernel_filename, 112 load_elf_strerror(kernel_size)); 113 exit(1); 114 } 115 116 /* load initrd */ 117 initrd_size = 0; 118 initrd_offset = 0; 119 if (loaderparams.initrd_filename) { 120 initrd_size = get_image_size(loaderparams.initrd_filename); 121 if (initrd_size > 0) { 122 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE); 123 if (initrd_offset + initrd_size > loaderparams.ram_size) { 124 error_report("memory too small for initial ram disk '%s'", 125 loaderparams.initrd_filename); 126 exit(1); 127 } 128 initrd_size = load_image_targphys(loaderparams.initrd_filename, 129 initrd_offset, 130 loaderparams.ram_size - initrd_offset); 131 } 132 if (initrd_size == (target_ulong) -1) { 133 error_report("could not load initial ram disk '%s'", 134 loaderparams.initrd_filename); 135 exit(1); 136 } 137 } 138 139 /* Setup prom parameters. */ 140 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); 141 prom_buf = g_malloc(prom_size); 142 143 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); 144 if (initrd_size > 0) { 145 prom_set(prom_buf, index++, 146 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", 147 cpu_mips_phys_to_kseg0(NULL, initrd_offset), 148 initrd_size, loaderparams.kernel_cmdline); 149 } else { 150 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); 151 } 152 153 /* Setup minimum environment variables */ 154 prom_set(prom_buf, index++, "busclock=33000000"); 155 prom_set(prom_buf, index++, "cpuclock=%u", clock_get_hz(cpu->clock)); 156 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB); 157 prom_set(prom_buf, index++, NULL); 158 159 rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR); 160 161 g_free(prom_buf); 162 return kernel_entry; 163 } 164 165 static void write_bootloader(CPUMIPSState *env, uint8_t *base, 166 uint64_t kernel_addr) 167 { 168 uint32_t *p; 169 170 /* Small bootloader */ 171 p = (uint32_t *)base; 172 173 /* j 0x1fc00040 */ 174 stl_p(p++, 0x0bf00010); 175 /* nop */ 176 stl_p(p++, 0x00000000); 177 178 /* Second part of the bootloader */ 179 p = (uint32_t *)(base + 0x040); 180 181 bl_gen_jump_kernel((void **)&p, 182 true, ENVP_VADDR - 64, 183 true, 2, true, ENVP_VADDR, 184 true, ENVP_VADDR + 8, 185 true, loaderparams.ram_size, 186 kernel_addr); 187 } 188 189 static void main_cpu_reset(void *opaque) 190 { 191 MIPSCPU *cpu = opaque; 192 CPUMIPSState *env = &cpu->env; 193 194 cpu_reset(CPU(cpu)); 195 /* TODO: 2E reset stuff */ 196 if (loaderparams.kernel_filename) { 197 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); 198 } 199 } 200 201 /* Network support */ 202 static void network_init(PCIBus *pci_bus) 203 { 204 int i; 205 206 for (i = 0; i < nb_nics; i++) { 207 NICInfo *nd = &nd_table[i]; 208 const char *default_devaddr = NULL; 209 210 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) { 211 /* The Fuloong board has a RTL8139 card using PCI SLOT 7 */ 212 default_devaddr = "07"; 213 } 214 215 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr); 216 } 217 } 218 219 static void mips_fuloong2e_init(MachineState *machine) 220 { 221 const char *kernel_filename = machine->kernel_filename; 222 const char *kernel_cmdline = machine->kernel_cmdline; 223 const char *initrd_filename = machine->initrd_filename; 224 char *filename; 225 MemoryRegion *address_space_mem = get_system_memory(); 226 MemoryRegion *bios = g_new(MemoryRegion, 1); 227 long bios_size; 228 uint8_t *spd_data; 229 uint64_t kernel_entry; 230 PCIDevice *pci_dev; 231 PCIBus *pci_bus; 232 I2CBus *smbus; 233 Clock *cpuclk; 234 MIPSCPU *cpu; 235 CPUMIPSState *env; 236 DeviceState *dev; 237 238 cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); 239 clock_set_hz(cpuclk, 533080000); /* ~533 MHz */ 240 241 /* init CPUs */ 242 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); 243 env = &cpu->env; 244 245 qemu_register_reset(main_cpu_reset, cpu); 246 247 /* TODO: support more than 256M RAM as highmem */ 248 if (machine->ram_size != 256 * MiB) { 249 error_report("Invalid RAM size, should be 256MB"); 250 exit(EXIT_FAILURE); 251 } 252 memory_region_add_subregion(address_space_mem, 0, machine->ram); 253 254 /* Boot ROM */ 255 memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE, 256 &error_fatal); 257 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 258 259 /* 260 * We do not support flash operation, just loading pmon.bin as raw BIOS. 261 * Please use -L to set the BIOS path and -bios to set bios name. 262 */ 263 264 if (kernel_filename) { 265 loaderparams.ram_size = machine->ram_size; 266 loaderparams.kernel_filename = kernel_filename; 267 loaderparams.kernel_cmdline = kernel_cmdline; 268 loaderparams.initrd_filename = initrd_filename; 269 kernel_entry = load_kernel(cpu); 270 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); 271 } else { 272 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 273 machine->firmware ?: FULOONG_BIOSNAME); 274 if (filename) { 275 bios_size = load_image_targphys(filename, 0x1fc00000LL, 276 BIOS_SIZE); 277 g_free(filename); 278 } else { 279 bios_size = -1; 280 } 281 282 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 283 machine->firmware && !qtest_enabled()) { 284 error_report("Could not load MIPS bios '%s'", machine->firmware); 285 exit(1); 286 } 287 } 288 289 /* Init internal devices */ 290 cpu_mips_irq_init_cpu(cpu); 291 cpu_mips_clock_init(cpu); 292 293 /* North bridge, Bonito --> IP2 */ 294 pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); 295 296 /* South bridge -> IP5 */ 297 pci_dev = pci_new_multifunction(PCI_DEVFN(FULOONG2E_VIA_SLOT, 0), 298 TYPE_VT82C686B_ISA); 299 300 /* Set properties on individual devices before realizing the south bridge */ 301 if (machine->audiodev) { 302 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ac97")); 303 qdev_prop_set_string(dev, "audiodev", machine->audiodev); 304 } 305 306 pci_realize_and_unref(pci_dev, pci_bus, &error_abort); 307 308 object_property_add_alias(OBJECT(machine), "rtc-time", 309 object_resolve_path_component(OBJECT(pci_dev), 310 "rtc"), 311 "date"); 312 qdev_connect_gpio_out(DEVICE(pci_dev), 0, env->irq[5]); 313 314 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); 315 pci_ide_create_devs(PCI_DEVICE(dev)); 316 317 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "pm")); 318 smbus = I2C_BUS(qdev_get_child_bus(dev, "i2c")); 319 320 /* GPU */ 321 if (vga_interface_type != VGA_NONE) { 322 vga_interface_created = true; 323 pci_dev = pci_new(-1, "ati-vga"); 324 dev = DEVICE(pci_dev); 325 qdev_prop_set_uint32(dev, "vgamem_mb", 16); 326 qdev_prop_set_uint16(dev, "x-device-id", 0x5159); 327 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 328 } 329 330 /* Populate SPD eeprom data */ 331 spd_data = spd_data_generate(DDR, machine->ram_size); 332 smbus_eeprom_init_one(smbus, 0x50, spd_data); 333 334 /* Network card: RTL8139D */ 335 network_init(pci_bus); 336 } 337 338 static void mips_fuloong2e_machine_init(MachineClass *mc) 339 { 340 mc->desc = "Fuloong 2e mini pc"; 341 mc->init = mips_fuloong2e_init; 342 mc->block_default_type = IF_IDE; 343 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); 344 mc->default_ram_size = 256 * MiB; 345 mc->default_ram_id = "fuloong2e.ram"; 346 mc->minimum_page_bits = 14; 347 machine_add_audiodev_property(mc); 348 } 349 350 DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init) 351