1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Loongson ipi interrupt support 4 * 5 * Copyright (C) 2021 Loongson Technology Corporation Limited 6 */ 7 8 #include "qemu/osdep.h" 9 #include "hw/intc/loongson_ipi.h" 10 #include "qapi/error.h" 11 #include "target/mips/cpu.h" 12 13 static AddressSpace *get_iocsr_as(CPUState *cpu) 14 { 15 if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { 16 return &MIPS_CPU(cpu)->env.iocsr.as; 17 } 18 19 return NULL; 20 } 21 22 static const MemoryRegionOps loongson_ipi_core_ops = { 23 .read_with_attrs = loongson_ipi_core_readl, 24 .write_with_attrs = loongson_ipi_core_writel, 25 .impl.min_access_size = 4, 26 .impl.max_access_size = 4, 27 .valid.min_access_size = 4, 28 .valid.max_access_size = 8, 29 .endianness = DEVICE_LITTLE_ENDIAN, 30 }; 31 32 static void loongson_ipi_realize(DeviceState *dev, Error **errp) 33 { 34 LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev); 35 LoongsonIPIState *s = LOONGSON_IPI(dev); 36 LoongsonIPIClass *lic = LOONGSON_IPI_GET_CLASS(dev); 37 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 38 Error *local_err = NULL; 39 40 lic->parent_realize(dev, &local_err); 41 if (local_err) { 42 error_propagate(errp, local_err); 43 return; 44 } 45 46 s->ipi_mmio_mem = g_new0(MemoryRegion, sc->num_cpu); 47 for (unsigned i = 0; i < sc->num_cpu; i++) { 48 g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i); 49 50 memory_region_init_io(&s->ipi_mmio_mem[i], OBJECT(dev), 51 &loongson_ipi_core_ops, &sc->cpu[i], name, 0x48); 52 sysbus_init_mmio(sbd, &s->ipi_mmio_mem[i]); 53 } 54 } 55 56 static void loongson_ipi_unrealize(DeviceState *dev) 57 { 58 LoongsonIPIState *s = LOONGSON_IPI(dev); 59 LoongsonIPIClass *k = LOONGSON_IPI_GET_CLASS(dev); 60 61 g_free(s->ipi_mmio_mem); 62 63 k->parent_unrealize(dev); 64 } 65 66 static void loongson_ipi_class_init(ObjectClass *klass, void *data) 67 { 68 DeviceClass *dc = DEVICE_CLASS(klass); 69 LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass); 70 LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass); 71 72 device_class_set_parent_realize(dc, loongson_ipi_realize, 73 &lic->parent_realize); 74 device_class_set_parent_unrealize(dc, loongson_ipi_unrealize, 75 &lic->parent_unrealize); 76 licc->get_iocsr_as = get_iocsr_as; 77 licc->cpu_by_arch_id = cpu_by_arch_id; 78 } 79 80 static const TypeInfo loongson_ipi_types[] = { 81 { 82 .name = TYPE_LOONGSON_IPI, 83 .parent = TYPE_LOONGSON_IPI_COMMON, 84 .instance_size = sizeof(LoongsonIPIState), 85 .class_size = sizeof(LoongsonIPIClass), 86 .class_init = loongson_ipi_class_init, 87 } 88 }; 89 90 DEFINE_TYPES(loongson_ipi_types) 91