xref: /openbmc/qemu/hw/intc/loongson_ipi.c (revision 3fad6db7)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Loongson ipi interrupt support
4  *
5  * Copyright (C) 2021 Loongson Technology Corporation Limited
6  */
7 
8 #include "qemu/osdep.h"
9 #include "hw/boards.h"
10 #include "hw/sysbus.h"
11 #include "hw/intc/loongson_ipi.h"
12 #include "hw/irq.h"
13 #include "hw/qdev-properties.h"
14 #include "qapi/error.h"
15 #include "qemu/log.h"
16 #include "exec/address-spaces.h"
17 #include "exec/memory.h"
18 #include "migration/vmstate.h"
19 #include "target/mips/cpu.h"
20 #include "trace.h"
21 
get_iocsr_as(CPUState * cpu)22 static AddressSpace *get_iocsr_as(CPUState *cpu)
23 {
24     if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
25         return &MIPS_CPU(cpu)->env.iocsr.as;
26     }
27 
28     return NULL;
29 }
30 
31 static const MemoryRegionOps loongson_ipi_core_ops = {
32     .read_with_attrs = loongson_ipi_core_readl,
33     .write_with_attrs = loongson_ipi_core_writel,
34     .impl.min_access_size = 4,
35     .impl.max_access_size = 4,
36     .valid.min_access_size = 4,
37     .valid.max_access_size = 8,
38     .endianness = DEVICE_LITTLE_ENDIAN,
39 };
40 
loongson_ipi_realize(DeviceState * dev,Error ** errp)41 static void loongson_ipi_realize(DeviceState *dev, Error **errp)
42 {
43     LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev);
44     LoongsonIPIState *s = LOONGSON_IPI(dev);
45     LoongsonIPIClass *lic = LOONGSON_IPI_GET_CLASS(dev);
46     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
47     Error *local_err = NULL;
48 
49     lic->parent_realize(dev, &local_err);
50     if (local_err) {
51         error_propagate(errp, local_err);
52         return;
53     }
54 
55     s->ipi_mmio_mem = g_new0(MemoryRegion, sc->num_cpu);
56     for (unsigned i = 0; i < sc->num_cpu; i++) {
57         g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i);
58 
59         memory_region_init_io(&s->ipi_mmio_mem[i], OBJECT(dev),
60                               &loongson_ipi_core_ops, &sc->cpu[i], name, 0x48);
61         sysbus_init_mmio(sbd, &s->ipi_mmio_mem[i]);
62     }
63 }
64 
loongson_ipi_unrealize(DeviceState * dev)65 static void loongson_ipi_unrealize(DeviceState *dev)
66 {
67     LoongsonIPIState *s = LOONGSON_IPI(dev);
68     LoongsonIPIClass *k = LOONGSON_IPI_GET_CLASS(dev);
69 
70     g_free(s->ipi_mmio_mem);
71 
72     k->parent_unrealize(dev);
73 }
74 
loongson_ipi_class_init(ObjectClass * klass,void * data)75 static void loongson_ipi_class_init(ObjectClass *klass, void *data)
76 {
77     DeviceClass *dc = DEVICE_CLASS(klass);
78     LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass);
79     LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
80 
81     device_class_set_parent_realize(dc, loongson_ipi_realize,
82                                     &lic->parent_realize);
83     device_class_set_parent_unrealize(dc, loongson_ipi_unrealize,
84                                       &lic->parent_unrealize);
85     licc->get_iocsr_as = get_iocsr_as;
86     licc->cpu_by_arch_id = cpu_by_arch_id;
87 }
88 
89 static const TypeInfo loongson_ipi_types[] = {
90     {
91         .name               = TYPE_LOONGSON_IPI,
92         .parent             = TYPE_LOONGSON_IPI_COMMON,
93         .instance_size      = sizeof(LoongsonIPIState),
94         .class_size         = sizeof(LoongsonIPIClass),
95         .class_init         = loongson_ipi_class_init,
96     }
97 };
98 
99 DEFINE_TYPES(loongson_ipi_types)
100