xref: /openbmc/qemu/docs/system/arm/aspeed.rst (revision dbdf841b)
1Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
2==================================================================
3
4The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
5Aspeed evaluation boards. They are based on different releases of the
6Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
8with dual cores ARM Cortex-A7 CPUs (1.2GHz).
9
10The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
11etc.
12
13AST2400 SoC based machines :
14
15- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
16- ``quanta-q71l-bmc``      OpenBMC Quanta BMC
17- ``supermicrox11-bmc``    Supermicro X11 BMC
18
19AST2500 SoC based machines :
20
21- ``ast2500-evb``          Aspeed AST2500 Evaluation board
22- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
23- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
24- ``sonorapass-bmc``       OCP SonoraPass BMC
25- ``fp5280g2-bmc``         Inspur FP5280G2 BMC
26- ``g220a-bmc``            Bytedance G220A BMC
27- ``yosemitev2-bmc``       Facebook YosemiteV2 BMC
28- ``tiogapass-bmc``        Facebook Tiogapass BMC
29
30AST2600 SoC based machines :
31
32- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex-A7)
33- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
34- ``rainier-bmc``          IBM Rainier POWER10 BMC
35- ``fuji-bmc``             Facebook Fuji BMC
36- ``bletchley-bmc``        Facebook Bletchley BMC
37- ``fby35-bmc``            Facebook fby35 BMC
38- ``qcom-dc-scm-v1-bmc``   Qualcomm DC-SCM V1 BMC
39- ``qcom-firework-bmc``    Qualcomm Firework BMC
40
41Supported devices
42-----------------
43
44 * SMP (for the AST2600 Cortex-A7)
45 * Interrupt Controller (VIC)
46 * Timer Controller
47 * RTC Controller
48 * I2C Controller, including the new register interface of the AST2600
49 * System Control Unit (SCU)
50 * SRAM mapping
51 * X-DMA Controller (basic interface)
52 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
53 * SPI Memory Controller
54 * USB 2.0 Controller
55 * SD/MMC storage controllers
56 * SDRAM controller (dummy interface for basic settings and training)
57 * Watchdog Controller
58 * GPIO Controller (Master only)
59 * UART
60 * Ethernet controllers
61 * Front LEDs (PCA9552 on I2C bus)
62 * LPC Peripheral Controller (a subset of subdevices are supported)
63 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
64 * ADC
65 * Secure Boot Controller (AST2600)
66 * eMMC Boot Controller (dummy)
67 * PECI Controller (minimal)
68 * I3C Controller
69
70
71Missing devices
72---------------
73
74 * Coprocessor support
75 * PWM and Fan Controller
76 * Slave GPIO Controller
77 * Super I/O Controller
78 * PCI-Express 1 Controller
79 * Graphic Display Controller
80 * MCTP Controller
81 * Mailbox Controller
82 * Virtual UART
83 * eSPI Controller
84
85Boot options
86------------
87
88The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
89to load a Linux kernel or from a firmware. Images can be downloaded from the
90OpenBMC jenkins :
91
92   https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
93
94or directly from the OpenBMC GitHub release repository :
95
96   https://github.com/openbmc/openbmc/releases
97
98To boot a kernel directly from a Linux build tree:
99
100.. code-block:: bash
101
102  $ qemu-system-arm -M ast2600-evb -nographic \
103        -kernel arch/arm/boot/zImage \
104        -dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
105        -initrd rootfs.cpio
106
107The image should be attached as an MTD drive. Run :
108
109.. code-block:: bash
110
111  $ qemu-system-arm -M romulus-bmc -nic user \
112	-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
113
114Options specific to Aspeed machines are :
115
116 * ``execute-in-place`` which emulates the boot from the CE0 flash
117   device by using the FMC controller to load the instructions, and
118   not simply from RAM. This takes a little longer.
119
120 * ``fmc-model`` to change the FMC Flash model. FW needs support for
121   the chip model to boot.
122
123 * ``spi-model`` to change the SPI Flash model.
124
125 * ``bmc-console`` to change the default console device. Most of the
126   machines use the ``UART5`` device for a boot console, which is
127   mapped on ``/dev/ttyS4`` under Linux, but it is not always the
128   case.
129
130For instance, to start the ``ast2500-evb`` machine with a different
131FMC chip and a bigger (64M) SPI chip, use :
132
133.. code-block:: bash
134
135  -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
136
137To change the boot console and use device ``UART3`` (``/dev/ttyS2``
138under Linux), use :
139
140.. code-block:: bash
141
142  -M ast2500-evb,bmc-console=uart3
143
144Aspeed minibmc family boards (``ast1030-evb``)
145==================================================================
146
147The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
148boards. They are based on different releases of the
149Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
150
151The SoC comes with SRAM, SPI, I2C, etc.
152
153AST1030 SoC based machines :
154
155- ``ast1030-evb``          Aspeed AST1030 Evaluation board (Cortex-M4F)
156
157Supported devices
158-----------------
159
160 * SMP (for the AST1030 Cortex-M4F)
161 * Interrupt Controller (VIC)
162 * Timer Controller
163 * I2C Controller
164 * System Control Unit (SCU)
165 * SRAM mapping
166 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
167 * SPI Memory Controller
168 * USB 2.0 Controller
169 * Watchdog Controller
170 * GPIO Controller (Master only)
171 * UART
172 * LPC Peripheral Controller (a subset of subdevices are supported)
173 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
174 * ADC
175 * Secure Boot Controller
176 * PECI Controller (minimal)
177
178
179Missing devices
180---------------
181
182 * PWM and Fan Controller
183 * Slave GPIO Controller
184 * Mailbox Controller
185 * Virtual UART
186 * eSPI Controller
187 * I3C Controller
188
189Boot options
190------------
191
192The Aspeed machines can be started using the ``-kernel`` to load a
193Zephyr OS or from a firmware. Images can be downloaded from the
194ASPEED GitHub release repository :
195
196   https://github.com/AspeedTech-BMC/zephyr/releases
197
198To boot a kernel directly from a Zephyr build tree:
199
200.. code-block:: bash
201
202  $ qemu-system-arm -M ast1030-evb -nographic \
203        -kernel zephyr.elf
204
205Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``)
206==================================================================
207
208Facebook has a series of multi-node compute server designs named
209Yosemite. The most recent version released was
210`Yosemite v3 <https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf>`__.
211
212Yosemite v3.5 is an iteration on this design, and is very similar: there's a
213baseboard with a BMC, and 4 server slots. The new server board design termed
214"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to
215include various compute accelerators (video, inferencing, etc). At the moment,
216only the first server slot's BIC is included.
217
218Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
219can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
220for an example.
221
222In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
223runs `OpenBMC <https://github.com/facebook/openbmc>`__, and the BIC runs
224`OpenBIC <https://github.com/facebook/openbic>`__.
225
226Firmware images can be retrieved from the Github releases or built from the
227source code, see the README's for instructions on that. This image uses the
228"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC.
229Some reference images can also be found here:
230
231.. code-block:: bash
232
233    $ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
234    $ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf
235
236Since this machine has multiple SoC's, each with their own serial console, the
237recommended way to run it is to allocate a pseudoterminal for each serial
238console and let the monitor use stdio. Also, starting in a paused state is
239useful because it allows you to attach to the pseudoterminals before the boot
240process starts.
241
242.. code-block:: bash
243
244    $ qemu-system-arm -machine fby35 \
245        -drive file=fby35.mtd,format=raw,if=mtd \
246        -device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \
247        -serial pty -serial pty -serial mon:stdio \
248        -display none -S
249    $ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
250    $ screen /dev/tty1
251    $ (qemu) c		   # Start the boot process once screen is setup.
252