xref: /openbmc/qemu/docs/system/arm/aspeed.rst (revision b2580720)
1Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``)
2===================================================================================
3
4The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
5Aspeed evaluation boards. They are based on different releases of the
6Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
8with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
9with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
10
11The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
12etc.
13
14AST2400 SoC based machines :
15
16- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
17- ``quanta-q71l-bmc``      OpenBMC Quanta BMC
18- ``supermicrox11-bmc``    Supermicro X11 BMC
19
20AST2500 SoC based machines :
21
22- ``ast2500-evb``          Aspeed AST2500 Evaluation board
23- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
24- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
25- ``sonorapass-bmc``       OCP SonoraPass BMC
26- ``fp5280g2-bmc``         Inspur FP5280G2 BMC
27- ``g220a-bmc``            Bytedance G220A BMC
28- ``yosemitev2-bmc``       Facebook YosemiteV2 BMC
29- ``tiogapass-bmc``        Facebook Tiogapass BMC
30
31AST2600 SoC based machines :
32
33- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex-A7)
34- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
35- ``rainier-bmc``          IBM Rainier POWER10 BMC
36- ``fuji-bmc``             Facebook Fuji BMC
37- ``bletchley-bmc``        Facebook Bletchley BMC
38- ``fby35-bmc``            Facebook fby35 BMC
39- ``qcom-dc-scm-v1-bmc``   Qualcomm DC-SCM V1 BMC
40- ``qcom-firework-bmc``    Qualcomm Firework BMC
41
42AST2700 SoC based machines :
43
44- ``ast2700-evb``          Aspeed AST2700 Evaluation board (Cortex-A35)
45
46Supported devices
47-----------------
48
49 * SMP (for the AST2600 Cortex-A7)
50 * Interrupt Controller (VIC)
51 * Timer Controller
52 * RTC Controller
53 * I2C Controller, including the new register interface of the AST2600
54 * System Control Unit (SCU)
55 * SRAM mapping
56 * X-DMA Controller (basic interface)
57 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
58 * SPI Memory Controller
59 * USB 2.0 Controller
60 * SD/MMC storage controllers
61 * SDRAM controller (dummy interface for basic settings and training)
62 * Watchdog Controller
63 * GPIO Controller (Master only)
64 * UART
65 * Ethernet controllers
66 * Front LEDs (PCA9552 on I2C bus)
67 * LPC Peripheral Controller (a subset of subdevices are supported)
68 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
69 * ADC
70 * Secure Boot Controller (AST2600)
71 * eMMC Boot Controller (dummy)
72 * PECI Controller (minimal)
73 * I3C Controller
74 * Internal Bridge Controller (SLI dummy)
75
76
77Missing devices
78---------------
79
80 * Coprocessor support
81 * PWM and Fan Controller
82 * Slave GPIO Controller
83 * Super I/O Controller
84 * PCI-Express 1 Controller
85 * Graphic Display Controller
86 * MCTP Controller
87 * Mailbox Controller
88 * Virtual UART
89 * eSPI Controller
90
91Boot options
92------------
93
94The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
95to load a Linux kernel or from a firmware. Images can be downloaded from the
96OpenBMC jenkins :
97
98   https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
99
100or directly from the OpenBMC GitHub release repository :
101
102   https://github.com/openbmc/openbmc/releases
103
104or directly from the ASPEED Forked OpenBMC GitHub release repository :
105
106   https://github.com/AspeedTech-BMC/openbmc/releases
107
108To boot a kernel directly from a Linux build tree:
109
110.. code-block:: bash
111
112  $ qemu-system-arm -M ast2600-evb -nographic \
113        -kernel arch/arm/boot/zImage \
114        -dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
115        -initrd rootfs.cpio
116
117To boot the machine from the flash image, use an MTD drive :
118
119.. code-block:: bash
120
121  $ qemu-system-arm -M romulus-bmc -nic user \
122	-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
123
124Options specific to Aspeed machines are :
125
126 * ``execute-in-place`` which emulates the boot from the CE0 flash
127   device by using the FMC controller to load the instructions, and
128   not simply from RAM. This takes a little longer.
129
130 * ``fmc-model`` to change the default FMC Flash model. FW needs
131   support for the chip model to boot.
132
133 * ``spi-model`` to change the default SPI Flash model.
134
135 * ``bmc-console`` to change the default console device. Most of the
136   machines use the ``UART5`` device for a boot console, which is
137   mapped on ``/dev/ttyS4`` under Linux, but it is not always the
138   case.
139
140To use other flash models, for instance a different FMC chip and a
141bigger (64M) SPI for the ``ast2500-evb`` machine, run :
142
143.. code-block:: bash
144
145  -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
146
147When more flexibility is needed to define the flash devices, to use
148different flash models or define all flash devices (up to 8), the
149``-nodefaults`` QEMU option can be used to avoid creating the default
150flash devices.
151
152Flash devices should then be created from the command line and attached
153to a block device :
154
155.. code-block:: bash
156
157  $ qemu-system-arm -M ast2600-evb \
158        -blockdev node-name=fmc0,driver=file,filename=/path/to/fmc0.img \
159	-device mx66u51235f,bus=ssi.0,cs=0x0,drive=fmc0 \
160	-blockdev node-name=fmc1,driver=file,filename=/path/to/fmc1.img \
161	-device mx66u51235f,bus=ssi.0,cs=0x1,drive=fmc1 \
162	-blockdev node-name=spi1,driver=file,filename=/path/to/spi1.img \
163	-device mx66u51235f,cs=0x0,bus=ssi.1,drive=spi1 \
164	-nographic -nodefaults
165
166In that case, the machine boots fetching instructions from the FMC0
167device. It is slower to start but closer to what HW does. Using the
168machine option ``execute-in-place`` has a similar effect.
169
170To change the boot console and use device ``UART3`` (``/dev/ttyS2``
171under Linux), use :
172
173.. code-block:: bash
174
175  -M ast2500-evb,bmc-console=uart3
176
177
178Boot the AST2700 machine from the flash image, use an MTD drive :
179
180.. code-block:: bash
181
182  IMGDIR=ast2700-default
183  UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin)
184
185  $ qemu-system-aarch64 -M ast2700-evb \
186       -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \
187       -device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \
188       -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \
189       -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \
190       -device loader,cpu-num=0,addr=0x430000000 \
191       -device loader,cpu-num=1,addr=0x430000000 \
192       -device loader,cpu-num=2,addr=0x430000000 \
193       -device loader,cpu-num=3,addr=0x430000000 \
194       -smp 4 \
195       -drive file=${IMGDIR}/image-bmc,format=raw,if=mtd \
196       -nographic
197
198Aspeed minibmc family boards (``ast1030-evb``)
199==================================================================
200
201The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
202boards. They are based on different releases of the
203Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
204
205The SoC comes with SRAM, SPI, I2C, etc.
206
207AST1030 SoC based machines :
208
209- ``ast1030-evb``          Aspeed AST1030 Evaluation board (Cortex-M4F)
210
211Supported devices
212-----------------
213
214 * SMP (for the AST1030 Cortex-M4F)
215 * Interrupt Controller (VIC)
216 * Timer Controller
217 * I2C Controller
218 * System Control Unit (SCU)
219 * SRAM mapping
220 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
221 * SPI Memory Controller
222 * USB 2.0 Controller
223 * Watchdog Controller
224 * GPIO Controller (Master only)
225 * UART
226 * LPC Peripheral Controller (a subset of subdevices are supported)
227 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
228 * ADC
229 * Secure Boot Controller
230 * PECI Controller (minimal)
231
232
233Missing devices
234---------------
235
236 * PWM and Fan Controller
237 * Slave GPIO Controller
238 * Mailbox Controller
239 * Virtual UART
240 * eSPI Controller
241 * I3C Controller
242
243Boot options
244------------
245
246The Aspeed machines can be started using the ``-kernel`` to load a
247Zephyr OS or from a firmware. Images can be downloaded from the
248ASPEED GitHub release repository :
249
250   https://github.com/AspeedTech-BMC/zephyr/releases
251
252To boot a kernel directly from a Zephyr build tree:
253
254.. code-block:: bash
255
256  $ qemu-system-arm -M ast1030-evb -nographic \
257        -kernel zephyr.elf
258
259Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``)
260==================================================================
261
262Facebook has a series of multi-node compute server designs named
263Yosemite. The most recent version released was
264`Yosemite v3 <https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf>`__.
265
266Yosemite v3.5 is an iteration on this design, and is very similar: there's a
267baseboard with a BMC, and 4 server slots. The new server board design termed
268"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to
269include various compute accelerators (video, inferencing, etc). At the moment,
270only the first server slot's BIC is included.
271
272Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
273can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
274for an example.
275
276In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
277runs `OpenBMC <https://github.com/facebook/openbmc>`__, and the BIC runs
278`OpenBIC <https://github.com/facebook/openbic>`__.
279
280Firmware images can be retrieved from the Github releases or built from the
281source code, see the README's for instructions on that. This image uses the
282"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC.
283Some reference images can also be found here:
284
285.. code-block:: bash
286
287    $ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
288    $ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf
289
290Since this machine has multiple SoC's, each with their own serial console, the
291recommended way to run it is to allocate a pseudoterminal for each serial
292console and let the monitor use stdio. Also, starting in a paused state is
293useful because it allows you to attach to the pseudoterminals before the boot
294process starts.
295
296.. code-block:: bash
297
298    $ qemu-system-arm -machine fby35 \
299        -drive file=fby35.mtd,format=raw,if=mtd \
300        -device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \
301        -serial pty -serial pty -serial mon:stdio \
302        -display none -S
303    $ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
304    $ screen /dev/tty1
305    $ (qemu) c		   # Start the boot process once screen is setup.
306