xref: /openbmc/qemu/docs/system/arm/aspeed.rst (revision 8cbb4fc1)
1Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``)
2===================================================================================
3
4The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
5Aspeed evaluation boards. They are based on different releases of the
6Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
8with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
9with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
10
11The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
12etc.
13
14AST2400 SoC based machines :
15
16- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
17- ``quanta-q71l-bmc``      OpenBMC Quanta BMC
18- ``supermicrox11-bmc``    Supermicro X11 BMC
19
20AST2500 SoC based machines :
21
22- ``ast2500-evb``          Aspeed AST2500 Evaluation board
23- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
24- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
25- ``sonorapass-bmc``       OCP SonoraPass BMC
26- ``fp5280g2-bmc``         Inspur FP5280G2 BMC
27- ``g220a-bmc``            Bytedance G220A BMC
28- ``yosemitev2-bmc``       Facebook YosemiteV2 BMC
29- ``tiogapass-bmc``        Facebook Tiogapass BMC
30
31AST2600 SoC based machines :
32
33- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex-A7)
34- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
35- ``rainier-bmc``          IBM Rainier POWER10 BMC
36- ``fuji-bmc``             Facebook Fuji BMC
37- ``bletchley-bmc``        Facebook Bletchley BMC
38- ``fby35-bmc``            Facebook fby35 BMC
39- ``qcom-dc-scm-v1-bmc``   Qualcomm DC-SCM V1 BMC
40- ``qcom-firework-bmc``    Qualcomm Firework BMC
41
42AST2700 SoC based machines :
43
44- ``ast2700-evb``          Aspeed AST2700 Evaluation board (Cortex-A35)
45
46Supported devices
47-----------------
48
49 * SMP (for the AST2600 Cortex-A7)
50 * Interrupt Controller (VIC)
51 * Timer Controller
52 * RTC Controller
53 * I2C Controller, including the new register interface of the AST2600
54 * System Control Unit (SCU)
55 * SRAM mapping
56 * X-DMA Controller (basic interface)
57 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
58 * SPI Memory Controller
59 * USB 2.0 Controller
60 * SD/MMC storage controllers
61 * SDRAM controller (dummy interface for basic settings and training)
62 * Watchdog Controller
63 * GPIO Controller (Master only)
64 * UART
65 * Ethernet controllers
66 * Front LEDs (PCA9552 on I2C bus)
67 * LPC Peripheral Controller (a subset of subdevices are supported)
68 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
69 * ADC
70 * Secure Boot Controller (AST2600)
71 * eMMC Boot Controller (dummy)
72 * PECI Controller (minimal)
73 * I3C Controller
74 * Internal Bridge Controller (SLI dummy)
75
76
77Missing devices
78---------------
79
80 * Coprocessor support
81 * PWM and Fan Controller
82 * Slave GPIO Controller
83 * Super I/O Controller
84 * PCI-Express 1 Controller
85 * Graphic Display Controller
86 * MCTP Controller
87 * Mailbox Controller
88 * Virtual UART
89 * eSPI Controller
90
91Boot options
92------------
93
94The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
95to load a Linux kernel or from a firmware. Images can be downloaded from the
96OpenBMC jenkins :
97
98   https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
99
100or directly from the OpenBMC GitHub release repository :
101
102   https://github.com/openbmc/openbmc/releases
103
104or directly from the ASPEED Forked OpenBMC GitHub release repository :
105
106   https://github.com/AspeedTech-BMC/openbmc/releases
107
108To boot a kernel directly from a Linux build tree:
109
110.. code-block:: bash
111
112  $ qemu-system-arm -M ast2600-evb -nographic \
113        -kernel arch/arm/boot/zImage \
114        -dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
115        -initrd rootfs.cpio
116
117To boot the machine from the flash image, use an MTD drive :
118
119.. code-block:: bash
120
121  $ qemu-system-arm -M romulus-bmc -nic user \
122	-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
123
124Options specific to Aspeed machines are :
125
126 * ``boot-emmc`` to set or unset boot from eMMC (AST2600).
127
128 * ``execute-in-place`` which emulates the boot from the CE0 flash
129   device by using the FMC controller to load the instructions, and
130   not simply from RAM. This takes a little longer.
131
132 * ``fmc-model`` to change the default FMC Flash model. FW needs
133   support for the chip model to boot.
134
135 * ``spi-model`` to change the default SPI Flash model.
136
137 * ``bmc-console`` to change the default console device. Most of the
138   machines use the ``UART5`` device for a boot console, which is
139   mapped on ``/dev/ttyS4`` under Linux, but it is not always the
140   case.
141
142To use other flash models, for instance a different FMC chip and a
143bigger (64M) SPI for the ``ast2500-evb`` machine, run :
144
145.. code-block:: bash
146
147  -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
148
149When more flexibility is needed to define the flash devices, to use
150different flash models or define all flash devices (up to 8), the
151``-nodefaults`` QEMU option can be used to avoid creating the default
152flash devices.
153
154Flash devices should then be created from the command line and attached
155to a block device :
156
157.. code-block:: bash
158
159  $ qemu-system-arm -M ast2600-evb \
160        -blockdev node-name=fmc0,driver=file,filename=/path/to/fmc0.img \
161	-device mx66u51235f,bus=ssi.0,cs=0x0,drive=fmc0 \
162	-blockdev node-name=fmc1,driver=file,filename=/path/to/fmc1.img \
163	-device mx66u51235f,bus=ssi.0,cs=0x1,drive=fmc1 \
164	-blockdev node-name=spi1,driver=file,filename=/path/to/spi1.img \
165	-device mx66u51235f,cs=0x0,bus=ssi.1,drive=spi1 \
166	-nographic -nodefaults
167
168In that case, the machine boots fetching instructions from the FMC0
169device. It is slower to start but closer to what HW does. Using the
170machine option ``execute-in-place`` has a similar effect.
171
172To change the boot console and use device ``UART3`` (``/dev/ttyS2``
173under Linux), use :
174
175.. code-block:: bash
176
177  -M ast2500-evb,bmc-console=uart3
178
179
180Boot the AST2700 machine from the flash image, use an MTD drive :
181
182.. code-block:: bash
183
184  IMGDIR=ast2700-default
185  UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin)
186
187  $ qemu-system-aarch64 -M ast2700-evb \
188       -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \
189       -device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \
190       -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \
191       -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \
192       -device loader,cpu-num=0,addr=0x430000000 \
193       -device loader,cpu-num=1,addr=0x430000000 \
194       -device loader,cpu-num=2,addr=0x430000000 \
195       -device loader,cpu-num=3,addr=0x430000000 \
196       -smp 4 \
197       -drive file=${IMGDIR}/image-bmc,format=raw,if=mtd \
198       -nographic
199
200Aspeed minibmc family boards (``ast1030-evb``)
201==================================================================
202
203The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
204boards. They are based on different releases of the
205Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
206
207The SoC comes with SRAM, SPI, I2C, etc.
208
209AST1030 SoC based machines :
210
211- ``ast1030-evb``          Aspeed AST1030 Evaluation board (Cortex-M4F)
212
213Supported devices
214-----------------
215
216 * SMP (for the AST1030 Cortex-M4F)
217 * Interrupt Controller (VIC)
218 * Timer Controller
219 * I2C Controller
220 * System Control Unit (SCU)
221 * SRAM mapping
222 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
223 * SPI Memory Controller
224 * USB 2.0 Controller
225 * Watchdog Controller
226 * GPIO Controller (Master only)
227 * UART
228 * LPC Peripheral Controller (a subset of subdevices are supported)
229 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
230 * ADC
231 * Secure Boot Controller
232 * PECI Controller (minimal)
233
234
235Missing devices
236---------------
237
238 * PWM and Fan Controller
239 * Slave GPIO Controller
240 * Mailbox Controller
241 * Virtual UART
242 * eSPI Controller
243 * I3C Controller
244
245Boot options
246------------
247
248The Aspeed machines can be started using the ``-kernel`` to load a
249Zephyr OS or from a firmware. Images can be downloaded from the
250ASPEED GitHub release repository :
251
252   https://github.com/AspeedTech-BMC/zephyr/releases
253
254To boot a kernel directly from a Zephyr build tree:
255
256.. code-block:: bash
257
258  $ qemu-system-arm -M ast1030-evb -nographic \
259        -kernel zephyr.elf
260
261Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``)
262==================================================================
263
264Facebook has a series of multi-node compute server designs named
265Yosemite. The most recent version released was
266`Yosemite v3 <https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf>`__.
267
268Yosemite v3.5 is an iteration on this design, and is very similar: there's a
269baseboard with a BMC, and 4 server slots. The new server board design termed
270"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to
271include various compute accelerators (video, inferencing, etc). At the moment,
272only the first server slot's BIC is included.
273
274Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
275can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
276for an example.
277
278In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
279runs `OpenBMC <https://github.com/facebook/openbmc>`__, and the BIC runs
280`OpenBIC <https://github.com/facebook/openbic>`__.
281
282Firmware images can be retrieved from the Github releases or built from the
283source code, see the README's for instructions on that. This image uses the
284"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC.
285Some reference images can also be found here:
286
287.. code-block:: bash
288
289    $ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
290    $ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf
291
292Since this machine has multiple SoC's, each with their own serial console, the
293recommended way to run it is to allocate a pseudoterminal for each serial
294console and let the monitor use stdio. Also, starting in a paused state is
295useful because it allows you to attach to the pseudoterminals before the boot
296process starts.
297
298.. code-block:: bash
299
300    $ qemu-system-arm -machine fby35 \
301        -drive file=fby35.mtd,format=raw,if=mtd \
302        -device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \
303        -serial pty -serial pty -serial mon:stdio \
304        -display none -S
305    $ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
306    $ screen /dev/tty1
307    $ (qemu) c		   # Start the boot process once screen is setup.
308