xref: /openbmc/qemu/docs/system/arm/aspeed.rst (revision 8b7b9c5c)
1Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
2==================================================================
3
4The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
5Aspeed evaluation boards. They are based on different releases of the
6Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
8with dual cores ARM Cortex-A7 CPUs (1.2GHz).
9
10The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
11etc.
12
13AST2400 SoC based machines :
14
15- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
16- ``quanta-q71l-bmc``      OpenBMC Quanta BMC
17- ``supermicrox11-bmc``    Supermicro X11 BMC
18
19AST2500 SoC based machines :
20
21- ``ast2500-evb``          Aspeed AST2500 Evaluation board
22- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
23- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
24- ``sonorapass-bmc``       OCP SonoraPass BMC
25- ``fp5280g2-bmc``         Inspur FP5280G2 BMC
26- ``g220a-bmc``            Bytedance G220A BMC
27- ``yosemitev2-bmc``       Facebook YosemiteV2 BMC
28- ``tiogapass-bmc``        Facebook Tiogapass BMC
29
30AST2600 SoC based machines :
31
32- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex-A7)
33- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
34- ``rainier-bmc``          IBM Rainier POWER10 BMC
35- ``fuji-bmc``             Facebook Fuji BMC
36- ``bletchley-bmc``        Facebook Bletchley BMC
37- ``fby35-bmc``            Facebook fby35 BMC
38- ``qcom-dc-scm-v1-bmc``   Qualcomm DC-SCM V1 BMC
39- ``qcom-firework-bmc``    Qualcomm Firework BMC
40
41Supported devices
42-----------------
43
44 * SMP (for the AST2600 Cortex-A7)
45 * Interrupt Controller (VIC)
46 * Timer Controller
47 * RTC Controller
48 * I2C Controller, including the new register interface of the AST2600
49 * System Control Unit (SCU)
50 * SRAM mapping
51 * X-DMA Controller (basic interface)
52 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
53 * SPI Memory Controller
54 * USB 2.0 Controller
55 * SD/MMC storage controllers
56 * SDRAM controller (dummy interface for basic settings and training)
57 * Watchdog Controller
58 * GPIO Controller (Master only)
59 * UART
60 * Ethernet controllers
61 * Front LEDs (PCA9552 on I2C bus)
62 * LPC Peripheral Controller (a subset of subdevices are supported)
63 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
64 * ADC
65 * Secure Boot Controller (AST2600)
66 * eMMC Boot Controller (dummy)
67 * PECI Controller (minimal)
68 * I3C Controller
69
70
71Missing devices
72---------------
73
74 * Coprocessor support
75 * PWM and Fan Controller
76 * Slave GPIO Controller
77 * Super I/O Controller
78 * PCI-Express 1 Controller
79 * Graphic Display Controller
80 * MCTP Controller
81 * Mailbox Controller
82 * Virtual UART
83 * eSPI Controller
84
85Boot options
86------------
87
88The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
89to load a Linux kernel or from a firmware. Images can be downloaded from the
90OpenBMC jenkins :
91
92   https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
93
94or directly from the OpenBMC GitHub release repository :
95
96   https://github.com/openbmc/openbmc/releases
97
98To boot a kernel directly from a Linux build tree:
99
100.. code-block:: bash
101
102  $ qemu-system-arm -M ast2600-evb -nographic \
103        -kernel arch/arm/boot/zImage \
104        -dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
105        -initrd rootfs.cpio
106
107To boot the machine from the flash image, use an MTD drive :
108
109.. code-block:: bash
110
111  $ qemu-system-arm -M romulus-bmc -nic user \
112	-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
113
114Options specific to Aspeed machines are :
115
116 * ``execute-in-place`` which emulates the boot from the CE0 flash
117   device by using the FMC controller to load the instructions, and
118   not simply from RAM. This takes a little longer.
119
120 * ``fmc-model`` to change the default FMC Flash model. FW needs
121   support for the chip model to boot.
122
123 * ``spi-model`` to change the default SPI Flash model.
124
125 * ``bmc-console`` to change the default console device. Most of the
126   machines use the ``UART5`` device for a boot console, which is
127   mapped on ``/dev/ttyS4`` under Linux, but it is not always the
128   case.
129
130To use other flash models, for instance a different FMC chip and a
131bigger (64M) SPI for the ``ast2500-evb`` machine, run :
132
133.. code-block:: bash
134
135  -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
136
137When more flexibility is needed to define the flash devices, to use
138different flash models or define all flash devices (up to 8), the
139``-nodefaults`` QEMU option can be used to avoid creating the default
140flash devices.
141
142Flash devices should then be created from the command line and attached
143to a block device :
144
145.. code-block:: bash
146
147  $ qemu-system-arm -M ast2600-evb \
148        -blockdev node-name=fmc0,driver=file,filename=/path/to/fmc0.img \
149	-device mx66u51235f,bus=ssi.0,cs=0x0,drive=fmc0 \
150	-blockdev node-name=fmc1,driver=file,filename=/path/to/fmc1.img \
151	-device mx66u51235f,bus=ssi.0,cs=0x1,drive=fmc1 \
152	-blockdev node-name=spi1,driver=file,filename=/path/to/spi1.img \
153	-device mx66u51235f,cs=0x0,bus=ssi.1,drive=spi1 \
154	-nographic -nodefaults
155
156In that case, the machine boots fetching instructions from the FMC0
157device. It is slower to start but closer to what HW does. Using the
158machine option ``execute-in-place`` has a similar effect.
159
160To change the boot console and use device ``UART3`` (``/dev/ttyS2``
161under Linux), use :
162
163.. code-block:: bash
164
165  -M ast2500-evb,bmc-console=uart3
166
167Aspeed minibmc family boards (``ast1030-evb``)
168==================================================================
169
170The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
171boards. They are based on different releases of the
172Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
173
174The SoC comes with SRAM, SPI, I2C, etc.
175
176AST1030 SoC based machines :
177
178- ``ast1030-evb``          Aspeed AST1030 Evaluation board (Cortex-M4F)
179
180Supported devices
181-----------------
182
183 * SMP (for the AST1030 Cortex-M4F)
184 * Interrupt Controller (VIC)
185 * Timer Controller
186 * I2C Controller
187 * System Control Unit (SCU)
188 * SRAM mapping
189 * Static Memory Controller (SMC or FMC) - Only SPI Flash support
190 * SPI Memory Controller
191 * USB 2.0 Controller
192 * Watchdog Controller
193 * GPIO Controller (Master only)
194 * UART
195 * LPC Peripheral Controller (a subset of subdevices are supported)
196 * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
197 * ADC
198 * Secure Boot Controller
199 * PECI Controller (minimal)
200
201
202Missing devices
203---------------
204
205 * PWM and Fan Controller
206 * Slave GPIO Controller
207 * Mailbox Controller
208 * Virtual UART
209 * eSPI Controller
210 * I3C Controller
211
212Boot options
213------------
214
215The Aspeed machines can be started using the ``-kernel`` to load a
216Zephyr OS or from a firmware. Images can be downloaded from the
217ASPEED GitHub release repository :
218
219   https://github.com/AspeedTech-BMC/zephyr/releases
220
221To boot a kernel directly from a Zephyr build tree:
222
223.. code-block:: bash
224
225  $ qemu-system-arm -M ast1030-evb -nographic \
226        -kernel zephyr.elf
227
228Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``)
229==================================================================
230
231Facebook has a series of multi-node compute server designs named
232Yosemite. The most recent version released was
233`Yosemite v3 <https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf>`__.
234
235Yosemite v3.5 is an iteration on this design, and is very similar: there's a
236baseboard with a BMC, and 4 server slots. The new server board design termed
237"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to
238include various compute accelerators (video, inferencing, etc). At the moment,
239only the first server slot's BIC is included.
240
241Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
242can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
243for an example.
244
245In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
246runs `OpenBMC <https://github.com/facebook/openbmc>`__, and the BIC runs
247`OpenBIC <https://github.com/facebook/openbic>`__.
248
249Firmware images can be retrieved from the Github releases or built from the
250source code, see the README's for instructions on that. This image uses the
251"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC.
252Some reference images can also be found here:
253
254.. code-block:: bash
255
256    $ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
257    $ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf
258
259Since this machine has multiple SoC's, each with their own serial console, the
260recommended way to run it is to allocate a pseudoterminal for each serial
261console and let the monitor use stdio. Also, starting in a paused state is
262useful because it allows you to attach to the pseudoterminals before the boot
263process starts.
264
265.. code-block:: bash
266
267    $ qemu-system-arm -machine fby35 \
268        -drive file=fby35.mtd,format=raw,if=mtd \
269        -device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \
270        -serial pty -serial pty -serial mon:stdio \
271        -display none -S
272    $ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
273    $ screen /dev/tty1
274    $ (qemu) c		   # Start the boot process once screen is setup.
275