1{
2    "rails": [
3        {
4            "name": "12.0V",
5            "page": 0,
6            "is_power_supply_rail": true
7        },
8        {
9            "name": "3V3IO",
10            "page": 1,
11            "check_status_vout": true,
12            "compare_voltage_to_limit": true
13        },
14        {
15            "name": "CP03_AVDD",
16            "page": 18,
17            "check_status_vout": true,
18            "compare_voltage_to_limit": true
19        },
20        {
21            "name": "CP12_AVDD",
22            "page": 19,
23            "check_status_vout": true,
24            "compare_voltage_to_limit": true
25        },
26        {
27            "name": "CP0_VDN",
28            "page": 20,
29            "check_status_vout": true,
30            "gpio": { "line": 72 }
31        },
32        {
33            "name": "CP1_VDN",
34            "page": 21,
35            "check_status_vout": true,
36            "gpio": { "line": 73 }
37        },
38        {
39            "name": "CP2_VDN",
40            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
41            "page": 22,
42            "check_status_vout": true,
43            "gpio": { "line": 74 }
44        },
45        {
46            "name": "CP3_VDN",
47            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
48            "page": 23,
49            "check_status_vout": true,
50            "gpio": { "line": 75 }
51        },
52        {
53            "name": "CP0_VDD0",
54            "page": 2,
55            "check_status_vout": true,
56            "compare_voltage_to_limit": true
57        },
58        {
59            "name": "CP1_VDD0",
60            "page": 4,
61            "check_status_vout": true,
62            "compare_voltage_to_limit": true
63        },
64        {
65            "name": "CP2_VDD0",
66            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
67            "page": 6,
68            "check_status_vout": true,
69            "compare_voltage_to_limit": true
70        },
71        {
72            "name": "CP3_VDD0",
73            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
74            "page": 8,
75            "check_status_vout": true,
76            "compare_voltage_to_limit": true
77        },
78        {
79            "name": "CP0_VDD1",
80            "page": 3,
81            "check_status_vout": true,
82            "compare_voltage_to_limit": true
83        },
84        {
85            "name": "CP1_VDD1",
86            "page": 5,
87            "check_status_vout": true,
88            "compare_voltage_to_limit": true
89        },
90        {
91            "name": "CP2_VDD1",
92            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
93            "page": 7,
94            "check_status_vout": true,
95            "compare_voltage_to_limit": true
96        },
97        {
98            "name": "CP3_VDD1",
99            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
100            "page": 9,
101            "check_status_vout": true,
102            "compare_voltage_to_limit": true
103        },
104        {
105            "name": "CP0_VCS0",
106            "page": 10,
107            "check_status_vout": true,
108            "compare_voltage_to_limit": true
109        },
110        {
111            "name": "CP1_VCS0",
112            "page": 12,
113            "check_status_vout": true,
114            "compare_voltage_to_limit": true
115        },
116        {
117            "name": "CP2_VCS0",
118            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
119            "page": 14,
120            "check_status_vout": true,
121            "compare_voltage_to_limit": true
122        },
123        {
124            "name": "CP3_VCS0",
125            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
126            "page": 16,
127            "check_status_vout": true,
128            "compare_voltage_to_limit": true
129        },
130        {
131            "name": "CP0_VCS1",
132            "page": 11,
133            "check_status_vout": true,
134            "compare_voltage_to_limit": true
135        },
136        {
137            "name": "CP1_VCS1",
138            "page": 13,
139            "check_status_vout": true,
140            "compare_voltage_to_limit": true
141        },
142        {
143            "name": "CP2_VCS1",
144            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
145            "page": 15,
146            "check_status_vout": true,
147            "compare_voltage_to_limit": true
148        },
149        {
150            "name": "CP3_VCS1",
151            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
152            "page": 17,
153            "check_status_vout": true,
154            "compare_voltage_to_limit": true
155        },
156        {
157            "name": "CP0_VIO",
158            "page": 24,
159            "check_status_vout": true,
160            "gpio": { "line": 76 }
161        },
162        {
163            "name": "CP1_VIO",
164            "page": 25,
165            "check_status_vout": true,
166            "gpio": { "line": 77 }
167        },
168        {
169            "name": "CP2_VIO",
170            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
171            "page": 26,
172            "check_status_vout": true,
173            "gpio": { "line": 78 }
174        },
175        {
176            "name": "CP3_VIO",
177            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
178            "page": 27,
179            "check_status_vout": true,
180            "gpio": { "line": 79 }
181        },
182        {
183            "name": "CP0_VPCIE",
184            "page": 28,
185            "gpio": { "line": 59 }
186        },
187        {
188            "name": "CP1_VPCIE",
189            "page": 29,
190            "gpio": { "line": 60 }
191        },
192        {
193            "name": "CP2_VPCIE",
194            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm2/cpu0",
195            "page": 30,
196            "gpio": { "line": 61 }
197        },
198        {
199            "name": "CP3_VPCIE",
200            "presence": "/xyz/openbmc_project/inventory/system/chassis/motherboard/dcm3/cpu0",
201            "page": 31,
202            "gpio": { "line": 62 }
203        }
204    ]
205}
206