1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2021, Red Hat, Inc.
4  *
5  * Tests for Hyper-V clocksources
6  */
7 #include "test_util.h"
8 #include "kvm_util.h"
9 #include "processor.h"
10 #include "hyperv.h"
11 
12 struct ms_hyperv_tsc_page {
13 	volatile u32 tsc_sequence;
14 	u32 reserved1;
15 	volatile u64 tsc_scale;
16 	volatile s64 tsc_offset;
17 } __packed;
18 
19 /* Simplified mul_u64_u64_shr() */
mul_u64_u64_shr64(u64 a,u64 b)20 static inline u64 mul_u64_u64_shr64(u64 a, u64 b)
21 {
22 	union {
23 		u64 ll;
24 		struct {
25 			u32 low, high;
26 		} l;
27 	} rm, rn, rh, a0, b0;
28 	u64 c;
29 
30 	a0.ll = a;
31 	b0.ll = b;
32 
33 	rm.ll = (u64)a0.l.low * b0.l.high;
34 	rn.ll = (u64)a0.l.high * b0.l.low;
35 	rh.ll = (u64)a0.l.high * b0.l.high;
36 
37 	rh.l.low = c = rm.l.high + rn.l.high + rh.l.low;
38 	rh.l.high = (c >> 32) + rh.l.high;
39 
40 	return rh.ll;
41 }
42 
nop_loop(void)43 static inline void nop_loop(void)
44 {
45 	int i;
46 
47 	for (i = 0; i < 100000000; i++)
48 		asm volatile("nop");
49 }
50 
check_tsc_msr_rdtsc(void)51 static inline void check_tsc_msr_rdtsc(void)
52 {
53 	u64 tsc_freq, r1, r2, t1, t2;
54 	s64 delta_ns;
55 
56 	tsc_freq = rdmsr(HV_X64_MSR_TSC_FREQUENCY);
57 	GUEST_ASSERT(tsc_freq > 0);
58 
59 	/* For increased accuracy, take mean rdtsc() before and afrer rdmsr() */
60 	r1 = rdtsc();
61 	t1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
62 	r1 = (r1 + rdtsc()) / 2;
63 	nop_loop();
64 	r2 = rdtsc();
65 	t2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
66 	r2 = (r2 + rdtsc()) / 2;
67 
68 	GUEST_ASSERT(r2 > r1 && t2 > t1);
69 
70 	/* HV_X64_MSR_TIME_REF_COUNT is in 100ns */
71 	delta_ns = ((t2 - t1) * 100) - ((r2 - r1) * 1000000000 / tsc_freq);
72 	if (delta_ns < 0)
73 		delta_ns = -delta_ns;
74 
75 	/* 1% tolerance */
76 	GUEST_ASSERT(delta_ns * 100 < (t2 - t1) * 100);
77 }
78 
get_tscpage_ts(struct ms_hyperv_tsc_page * tsc_page)79 static inline u64 get_tscpage_ts(struct ms_hyperv_tsc_page *tsc_page)
80 {
81 	return mul_u64_u64_shr64(rdtsc(), tsc_page->tsc_scale) + tsc_page->tsc_offset;
82 }
83 
check_tsc_msr_tsc_page(struct ms_hyperv_tsc_page * tsc_page)84 static inline void check_tsc_msr_tsc_page(struct ms_hyperv_tsc_page *tsc_page)
85 {
86 	u64 r1, r2, t1, t2;
87 
88 	/* Compare TSC page clocksource with HV_X64_MSR_TIME_REF_COUNT */
89 	t1 = get_tscpage_ts(tsc_page);
90 	r1 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
91 
92 	/* 10 ms tolerance */
93 	GUEST_ASSERT(r1 >= t1 && r1 - t1 < 100000);
94 	nop_loop();
95 
96 	t2 = get_tscpage_ts(tsc_page);
97 	r2 = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
98 	GUEST_ASSERT(r2 >= t1 && r2 - t2 < 100000);
99 }
100 
guest_main(struct ms_hyperv_tsc_page * tsc_page,vm_paddr_t tsc_page_gpa)101 static void guest_main(struct ms_hyperv_tsc_page *tsc_page, vm_paddr_t tsc_page_gpa)
102 {
103 	u64 tsc_scale, tsc_offset;
104 
105 	/* Set Guest OS id to enable Hyper-V emulation */
106 	GUEST_SYNC(1);
107 	wrmsr(HV_X64_MSR_GUEST_OS_ID, HYPERV_LINUX_OS_ID);
108 	GUEST_SYNC(2);
109 
110 	check_tsc_msr_rdtsc();
111 
112 	GUEST_SYNC(3);
113 
114 	/* Set up TSC page is disabled state, check that it's clean */
115 	wrmsr(HV_X64_MSR_REFERENCE_TSC, tsc_page_gpa);
116 	GUEST_ASSERT(tsc_page->tsc_sequence == 0);
117 	GUEST_ASSERT(tsc_page->tsc_scale == 0);
118 	GUEST_ASSERT(tsc_page->tsc_offset == 0);
119 
120 	GUEST_SYNC(4);
121 
122 	/* Set up TSC page is enabled state */
123 	wrmsr(HV_X64_MSR_REFERENCE_TSC, tsc_page_gpa | 0x1);
124 	GUEST_ASSERT(tsc_page->tsc_sequence != 0);
125 
126 	GUEST_SYNC(5);
127 
128 	check_tsc_msr_tsc_page(tsc_page);
129 
130 	GUEST_SYNC(6);
131 
132 	tsc_offset = tsc_page->tsc_offset;
133 	/* Call KVM_SET_CLOCK from userspace, check that TSC page was updated */
134 
135 	GUEST_SYNC(7);
136 	/* Sanity check TSC page timestamp, it should be close to 0 */
137 	GUEST_ASSERT(get_tscpage_ts(tsc_page) < 100000);
138 
139 	GUEST_ASSERT(tsc_page->tsc_offset != tsc_offset);
140 
141 	nop_loop();
142 
143 	/*
144 	 * Enable Re-enlightenment and check that TSC page stays constant across
145 	 * KVM_SET_CLOCK.
146 	 */
147 	wrmsr(HV_X64_MSR_REENLIGHTENMENT_CONTROL, 0x1 << 16 | 0xff);
148 	wrmsr(HV_X64_MSR_TSC_EMULATION_CONTROL, 0x1);
149 	tsc_offset = tsc_page->tsc_offset;
150 	tsc_scale = tsc_page->tsc_scale;
151 	GUEST_SYNC(8);
152 	GUEST_ASSERT(tsc_page->tsc_offset == tsc_offset);
153 	GUEST_ASSERT(tsc_page->tsc_scale == tsc_scale);
154 
155 	GUEST_SYNC(9);
156 
157 	check_tsc_msr_tsc_page(tsc_page);
158 
159 	/*
160 	 * Disable re-enlightenment and TSC page, check that KVM doesn't update
161 	 * it anymore.
162 	 */
163 	wrmsr(HV_X64_MSR_REENLIGHTENMENT_CONTROL, 0);
164 	wrmsr(HV_X64_MSR_TSC_EMULATION_CONTROL, 0);
165 	wrmsr(HV_X64_MSR_REFERENCE_TSC, 0);
166 	memset(tsc_page, 0, sizeof(*tsc_page));
167 
168 	GUEST_SYNC(10);
169 	GUEST_ASSERT(tsc_page->tsc_sequence == 0);
170 	GUEST_ASSERT(tsc_page->tsc_offset == 0);
171 	GUEST_ASSERT(tsc_page->tsc_scale == 0);
172 
173 	GUEST_DONE();
174 }
175 
host_check_tsc_msr_rdtsc(struct kvm_vcpu * vcpu)176 static void host_check_tsc_msr_rdtsc(struct kvm_vcpu *vcpu)
177 {
178 	u64 tsc_freq, r1, r2, t1, t2;
179 	s64 delta_ns;
180 
181 	tsc_freq = vcpu_get_msr(vcpu, HV_X64_MSR_TSC_FREQUENCY);
182 	TEST_ASSERT(tsc_freq > 0, "TSC frequency must be nonzero");
183 
184 	/* For increased accuracy, take mean rdtsc() before and afrer ioctl */
185 	r1 = rdtsc();
186 	t1 = vcpu_get_msr(vcpu, HV_X64_MSR_TIME_REF_COUNT);
187 	r1 = (r1 + rdtsc()) / 2;
188 	nop_loop();
189 	r2 = rdtsc();
190 	t2 = vcpu_get_msr(vcpu, HV_X64_MSR_TIME_REF_COUNT);
191 	r2 = (r2 + rdtsc()) / 2;
192 
193 	TEST_ASSERT(t2 > t1, "Time reference MSR is not monotonic (%ld <= %ld)", t1, t2);
194 
195 	/* HV_X64_MSR_TIME_REF_COUNT is in 100ns */
196 	delta_ns = ((t2 - t1) * 100) - ((r2 - r1) * 1000000000 / tsc_freq);
197 	if (delta_ns < 0)
198 		delta_ns = -delta_ns;
199 
200 	/* 1% tolerance */
201 	TEST_ASSERT(delta_ns * 100 < (t2 - t1) * 100,
202 		    "Elapsed time does not match (MSR=%ld, TSC=%ld)",
203 		    (t2 - t1) * 100, (r2 - r1) * 1000000000 / tsc_freq);
204 }
205 
main(void)206 int main(void)
207 {
208 	struct kvm_vcpu *vcpu;
209 	struct kvm_vm *vm;
210 	struct ucall uc;
211 	vm_vaddr_t tsc_page_gva;
212 	int stage;
213 
214 	vm = vm_create_with_one_vcpu(&vcpu, guest_main);
215 
216 	vcpu_set_hv_cpuid(vcpu);
217 
218 	tsc_page_gva = vm_vaddr_alloc_page(vm);
219 	memset(addr_gva2hva(vm, tsc_page_gva), 0x0, getpagesize());
220 	TEST_ASSERT((addr_gva2gpa(vm, tsc_page_gva) & (getpagesize() - 1)) == 0,
221 		"TSC page has to be page aligned\n");
222 	vcpu_args_set(vcpu, 2, tsc_page_gva, addr_gva2gpa(vm, tsc_page_gva));
223 
224 	host_check_tsc_msr_rdtsc(vcpu);
225 
226 	for (stage = 1;; stage++) {
227 		vcpu_run(vcpu);
228 		TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO);
229 
230 		switch (get_ucall(vcpu, &uc)) {
231 		case UCALL_ABORT:
232 			REPORT_GUEST_ASSERT(uc);
233 			/* NOT REACHED */
234 		case UCALL_SYNC:
235 			break;
236 		case UCALL_DONE:
237 			/* Keep in sync with guest_main() */
238 			TEST_ASSERT(stage == 11, "Testing ended prematurely, stage %d\n",
239 				    stage);
240 			goto out;
241 		default:
242 			TEST_FAIL("Unknown ucall %lu", uc.cmd);
243 		}
244 
245 		TEST_ASSERT(!strcmp((const char *)uc.args[0], "hello") &&
246 			    uc.args[1] == stage,
247 			    "Stage %d: Unexpected register values vmexit, got %lx",
248 			    stage, (ulong)uc.args[1]);
249 
250 		/* Reset kvmclock triggering TSC page update */
251 		if (stage == 7 || stage == 8 || stage == 10) {
252 			struct kvm_clock_data clock = {0};
253 
254 			vm_ioctl(vm, KVM_SET_CLOCK, &clock);
255 		}
256 	}
257 
258 out:
259 	kvm_vm_free(vm);
260 }
261