xref: /openbmc/linux/sound/soc/meson/axg-toddr.c (revision af8e6bbf)
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright (c) 2018 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
5 
6 /* This driver implements the frontend capture DAI of AXG based SoCs */
7 
8 #include <linux/bitfield.h>
9 #include <linux/clk.h>
10 #include <linux/regmap.h>
11 #include <linux/module.h>
12 #include <linux/of_platform.h>
13 #include <sound/pcm_params.h>
14 #include <sound/soc.h>
15 #include <sound/soc-dai.h>
16 
17 #include "axg-fifo.h"
18 
19 #define CTRL0_TODDR_SEL_RESAMPLE	BIT(30)
20 #define CTRL0_TODDR_EXT_SIGNED		BIT(29)
21 #define CTRL0_TODDR_PP_MODE		BIT(28)
22 #define CTRL0_TODDR_SYNC_CH		BIT(27)
23 #define CTRL0_TODDR_TYPE		GENMASK(15, 13)
24 #define CTRL0_TODDR_MSB_POS		GENMASK(12, 8)
25 #define CTRL0_TODDR_LSB_POS		GENMASK(7, 3)
26 #define CTRL1_TODDR_FORCE_FINISH	BIT(25)
27 #define CTRL1_SEL_SHIFT			28
28 
29 #define TODDR_MSB_POS	31
30 
axg_toddr_pcm_new(struct snd_soc_pcm_runtime * rtd,struct snd_soc_dai * dai)31 static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd,
32 			     struct snd_soc_dai *dai)
33 {
34 	return axg_fifo_pcm_new(rtd, SNDRV_PCM_STREAM_CAPTURE);
35 }
36 
g12a_toddr_dai_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)37 static int g12a_toddr_dai_prepare(struct snd_pcm_substream *substream,
38 				  struct snd_soc_dai *dai)
39 {
40 	struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
41 
42 	/* Reset the write pointer to the FIFO_INIT_ADDR */
43 	regmap_update_bits(fifo->map, FIFO_CTRL1,
44 			   CTRL1_TODDR_FORCE_FINISH, 0);
45 	regmap_update_bits(fifo->map, FIFO_CTRL1,
46 			   CTRL1_TODDR_FORCE_FINISH, CTRL1_TODDR_FORCE_FINISH);
47 	regmap_update_bits(fifo->map, FIFO_CTRL1,
48 			   CTRL1_TODDR_FORCE_FINISH, 0);
49 
50 	return 0;
51 }
52 
axg_toddr_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)53 static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream,
54 				   struct snd_pcm_hw_params *params,
55 				   struct snd_soc_dai *dai)
56 {
57 	struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
58 	unsigned int type, width;
59 
60 	switch (params_physical_width(params)) {
61 	case 8:
62 		type = 0; /* 8 samples of 8 bits */
63 		break;
64 	case 16:
65 		type = 2; /* 4 samples of 16 bits - right justified */
66 		break;
67 	case 32:
68 		type = 4; /* 2 samples of 32 bits - right justified */
69 		break;
70 	default:
71 		return -EINVAL;
72 	}
73 
74 	width = params_width(params);
75 
76 	regmap_update_bits(fifo->map, FIFO_CTRL0,
77 			   CTRL0_TODDR_TYPE |
78 			   CTRL0_TODDR_MSB_POS |
79 			   CTRL0_TODDR_LSB_POS,
80 			   FIELD_PREP(CTRL0_TODDR_TYPE, type) |
81 			   FIELD_PREP(CTRL0_TODDR_MSB_POS, TODDR_MSB_POS) |
82 			   FIELD_PREP(CTRL0_TODDR_LSB_POS, TODDR_MSB_POS - (width - 1)));
83 
84 	return 0;
85 }
86 
axg_toddr_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)87 static int axg_toddr_dai_startup(struct snd_pcm_substream *substream,
88 				 struct snd_soc_dai *dai)
89 {
90 	struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
91 	int ret;
92 
93 	/* Enable pclk to access registers and clock the fifo ip */
94 	ret = clk_prepare_enable(fifo->pclk);
95 	if (ret)
96 		return ret;
97 
98 	/* Select orginal data - resampling not supported ATM */
99 	regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SEL_RESAMPLE, 0);
100 
101 	/* Only signed format are supported ATM */
102 	regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_EXT_SIGNED,
103 			   CTRL0_TODDR_EXT_SIGNED);
104 
105 	/* Apply single buffer mode to the interface */
106 	regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0);
107 
108 	return 0;
109 }
110 
axg_toddr_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)111 static void axg_toddr_dai_shutdown(struct snd_pcm_substream *substream,
112 				   struct snd_soc_dai *dai)
113 {
114 	struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
115 
116 	clk_disable_unprepare(fifo->pclk);
117 }
118 
119 static const struct snd_soc_dai_ops axg_toddr_ops = {
120 	.hw_params	= axg_toddr_dai_hw_params,
121 	.startup	= axg_toddr_dai_startup,
122 	.shutdown	= axg_toddr_dai_shutdown,
123 	.pcm_new	= axg_toddr_pcm_new,
124 };
125 
126 static struct snd_soc_dai_driver axg_toddr_dai_drv = {
127 	.name = "TODDR",
128 	.capture = {
129 		.stream_name	= "Capture",
130 		.channels_min	= 1,
131 		.channels_max	= AXG_FIFO_CH_MAX,
132 		.rates		= AXG_FIFO_RATES,
133 		.formats	= AXG_FIFO_FORMATS,
134 	},
135 	.ops		= &axg_toddr_ops,
136 };
137 
138 static const char * const axg_toddr_sel_texts[] = {
139 	"IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7"
140 };
141 
142 static SOC_ENUM_SINGLE_DECL(axg_toddr_sel_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT,
143 			    axg_toddr_sel_texts);
144 
145 static const struct snd_kcontrol_new axg_toddr_in_mux =
146 	SOC_DAPM_ENUM("Input Source", axg_toddr_sel_enum);
147 
148 static const struct snd_soc_dapm_widget axg_toddr_dapm_widgets[] = {
149 	SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_toddr_in_mux),
150 	SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
151 	SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
152 	SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
153 	SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
154 	SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
155 	SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
156 	SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0),
157 	SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0),
158 };
159 
160 static const struct snd_soc_dapm_route axg_toddr_dapm_routes[] = {
161 	{ "Capture", NULL, "SRC SEL" },
162 	{ "SRC SEL", "IN 0", "IN 0" },
163 	{ "SRC SEL", "IN 1", "IN 1" },
164 	{ "SRC SEL", "IN 2", "IN 2" },
165 	{ "SRC SEL", "IN 3", "IN 3" },
166 	{ "SRC SEL", "IN 4", "IN 4" },
167 	{ "SRC SEL", "IN 5", "IN 5" },
168 	{ "SRC SEL", "IN 6", "IN 6" },
169 	{ "SRC SEL", "IN 7", "IN 7" },
170 };
171 
172 static const struct snd_soc_component_driver axg_toddr_component_drv = {
173 	.dapm_widgets		= axg_toddr_dapm_widgets,
174 	.num_dapm_widgets	= ARRAY_SIZE(axg_toddr_dapm_widgets),
175 	.dapm_routes		= axg_toddr_dapm_routes,
176 	.num_dapm_routes	= ARRAY_SIZE(axg_toddr_dapm_routes),
177 	.open			= axg_fifo_pcm_open,
178 	.close			= axg_fifo_pcm_close,
179 	.hw_params		= axg_fifo_pcm_hw_params,
180 	.hw_free		= axg_fifo_pcm_hw_free,
181 	.pointer		= axg_fifo_pcm_pointer,
182 	.trigger		= axg_fifo_pcm_trigger,
183 	.legacy_dai_naming	= 1,
184 };
185 
186 static const struct axg_fifo_match_data axg_toddr_match_data = {
187 	.field_threshold	= REG_FIELD(FIFO_CTRL1, 16, 23),
188 	.component_drv		= &axg_toddr_component_drv,
189 	.dai_drv		= &axg_toddr_dai_drv
190 };
191 
g12a_toddr_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)192 static int g12a_toddr_dai_startup(struct snd_pcm_substream *substream,
193 				 struct snd_soc_dai *dai)
194 {
195 	struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
196 	int ret;
197 
198 	ret = axg_toddr_dai_startup(substream, dai);
199 	if (ret)
200 		return ret;
201 
202 	/*
203 	 * Make sure the first channel ends up in the at beginning of the output
204 	 * As weird as it looks, without this the first channel may be misplaced
205 	 * in memory, with a random shift of 2 channels.
206 	 */
207 	regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SYNC_CH,
208 			   CTRL0_TODDR_SYNC_CH);
209 
210 	return 0;
211 }
212 
213 static const struct snd_soc_dai_ops g12a_toddr_ops = {
214 	.prepare	= g12a_toddr_dai_prepare,
215 	.hw_params	= axg_toddr_dai_hw_params,
216 	.startup	= g12a_toddr_dai_startup,
217 	.shutdown	= axg_toddr_dai_shutdown,
218 	.pcm_new	= axg_toddr_pcm_new,
219 };
220 
221 static struct snd_soc_dai_driver g12a_toddr_dai_drv = {
222 	.name = "TODDR",
223 	.capture = {
224 		.stream_name	= "Capture",
225 		.channels_min	= 1,
226 		.channels_max	= AXG_FIFO_CH_MAX,
227 		.rates		= AXG_FIFO_RATES,
228 		.formats	= AXG_FIFO_FORMATS,
229 	},
230 	.ops		= &g12a_toddr_ops,
231 };
232 
233 static const struct snd_soc_component_driver g12a_toddr_component_drv = {
234 	.dapm_widgets		= axg_toddr_dapm_widgets,
235 	.num_dapm_widgets	= ARRAY_SIZE(axg_toddr_dapm_widgets),
236 	.dapm_routes		= axg_toddr_dapm_routes,
237 	.num_dapm_routes	= ARRAY_SIZE(axg_toddr_dapm_routes),
238 	.open			= axg_fifo_pcm_open,
239 	.close			= axg_fifo_pcm_close,
240 	.hw_params		= g12a_fifo_pcm_hw_params,
241 	.hw_free		= axg_fifo_pcm_hw_free,
242 	.pointer		= axg_fifo_pcm_pointer,
243 	.trigger		= axg_fifo_pcm_trigger,
244 	.legacy_dai_naming	= 1,
245 };
246 
247 static const struct axg_fifo_match_data g12a_toddr_match_data = {
248 	.field_threshold	= REG_FIELD(FIFO_CTRL1, 16, 23),
249 	.component_drv		= &g12a_toddr_component_drv,
250 	.dai_drv		= &g12a_toddr_dai_drv
251 };
252 
253 static const char * const sm1_toddr_sel_texts[] = {
254 	"IN 0", "IN 1", "IN 2",  "IN 3",  "IN 4",  "IN 5",  "IN 6",  "IN 7",
255 	"IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15"
256 };
257 
258 static SOC_ENUM_SINGLE_DECL(sm1_toddr_sel_enum, FIFO_CTRL1, CTRL1_SEL_SHIFT,
259 			    sm1_toddr_sel_texts);
260 
261 static const struct snd_kcontrol_new sm1_toddr_in_mux =
262 	SOC_DAPM_ENUM("Input Source", sm1_toddr_sel_enum);
263 
264 static const struct snd_soc_dapm_widget sm1_toddr_dapm_widgets[] = {
265 	SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_toddr_in_mux),
266 	SND_SOC_DAPM_AIF_IN("IN 0",  NULL, 0, SND_SOC_NOPM, 0, 0),
267 	SND_SOC_DAPM_AIF_IN("IN 1",  NULL, 0, SND_SOC_NOPM, 0, 0),
268 	SND_SOC_DAPM_AIF_IN("IN 2",  NULL, 0, SND_SOC_NOPM, 0, 0),
269 	SND_SOC_DAPM_AIF_IN("IN 3",  NULL, 0, SND_SOC_NOPM, 0, 0),
270 	SND_SOC_DAPM_AIF_IN("IN 4",  NULL, 0, SND_SOC_NOPM, 0, 0),
271 	SND_SOC_DAPM_AIF_IN("IN 5",  NULL, 0, SND_SOC_NOPM, 0, 0),
272 	SND_SOC_DAPM_AIF_IN("IN 6",  NULL, 0, SND_SOC_NOPM, 0, 0),
273 	SND_SOC_DAPM_AIF_IN("IN 7",  NULL, 0, SND_SOC_NOPM, 0, 0),
274 	SND_SOC_DAPM_AIF_IN("IN 8",  NULL, 0, SND_SOC_NOPM, 0, 0),
275 	SND_SOC_DAPM_AIF_IN("IN 9",  NULL, 0, SND_SOC_NOPM, 0, 0),
276 	SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0),
277 	SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0),
278 	SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0),
279 	SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0),
280 	SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0),
281 	SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0),
282 };
283 
284 static const struct snd_soc_dapm_route sm1_toddr_dapm_routes[] = {
285 	{ "Capture", NULL, "SRC SEL" },
286 	{ "SRC SEL", "IN 0",  "IN 0" },
287 	{ "SRC SEL", "IN 1",  "IN 1" },
288 	{ "SRC SEL", "IN 2",  "IN 2" },
289 	{ "SRC SEL", "IN 3",  "IN 3" },
290 	{ "SRC SEL", "IN 4",  "IN 4" },
291 	{ "SRC SEL", "IN 5",  "IN 5" },
292 	{ "SRC SEL", "IN 6",  "IN 6" },
293 	{ "SRC SEL", "IN 7",  "IN 7" },
294 	{ "SRC SEL", "IN 8",  "IN 8" },
295 	{ "SRC SEL", "IN 9",  "IN 9" },
296 	{ "SRC SEL", "IN 10", "IN 10" },
297 	{ "SRC SEL", "IN 11", "IN 11" },
298 	{ "SRC SEL", "IN 12", "IN 12" },
299 	{ "SRC SEL", "IN 13", "IN 13" },
300 	{ "SRC SEL", "IN 14", "IN 14" },
301 	{ "SRC SEL", "IN 15", "IN 15" },
302 };
303 
304 static const struct snd_soc_component_driver sm1_toddr_component_drv = {
305 	.dapm_widgets		= sm1_toddr_dapm_widgets,
306 	.num_dapm_widgets	= ARRAY_SIZE(sm1_toddr_dapm_widgets),
307 	.dapm_routes		= sm1_toddr_dapm_routes,
308 	.num_dapm_routes	= ARRAY_SIZE(sm1_toddr_dapm_routes),
309 	.open			= axg_fifo_pcm_open,
310 	.close			= axg_fifo_pcm_close,
311 	.hw_params		= g12a_fifo_pcm_hw_params,
312 	.hw_free		= axg_fifo_pcm_hw_free,
313 	.pointer		= axg_fifo_pcm_pointer,
314 	.trigger		= axg_fifo_pcm_trigger,
315 	.legacy_dai_naming	= 1,
316 };
317 
318 static const struct axg_fifo_match_data sm1_toddr_match_data = {
319 	.field_threshold	= REG_FIELD(FIFO_CTRL1, 12, 23),
320 	.component_drv		= &sm1_toddr_component_drv,
321 	.dai_drv		= &g12a_toddr_dai_drv
322 };
323 
324 static const struct of_device_id axg_toddr_of_match[] = {
325 	{
326 		.compatible = "amlogic,axg-toddr",
327 		.data = &axg_toddr_match_data,
328 	}, {
329 		.compatible = "amlogic,g12a-toddr",
330 		.data = &g12a_toddr_match_data,
331 	}, {
332 		.compatible = "amlogic,sm1-toddr",
333 		.data = &sm1_toddr_match_data,
334 	}, {}
335 };
336 MODULE_DEVICE_TABLE(of, axg_toddr_of_match);
337 
338 static struct platform_driver axg_toddr_pdrv = {
339 	.probe = axg_fifo_probe,
340 	.driver = {
341 		.name = "axg-toddr",
342 		.of_match_table = axg_toddr_of_match,
343 	},
344 };
345 module_platform_driver(axg_toddr_pdrv);
346 
347 MODULE_DESCRIPTION("Amlogic AXG capture fifo driver");
348 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
349 MODULE_LICENSE("GPL v2");
350