xref: /openbmc/linux/sound/soc/intel/skylake/skl.h (revision 64d85cc9)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  skl.h - HD Audio skylake defintions.
4  *
5  *  Copyright (C) 2015 Intel Corp
6  *  Author: Jeeja KP <jeeja.kp@intel.com>
7  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8  *
9  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10  */
11 
12 #ifndef __SOUND_SOC_SKL_H
13 #define __SOUND_SOC_SKL_H
14 
15 #include <sound/hda_register.h>
16 #include <sound/hdaudio_ext.h>
17 #include <sound/hda_codec.h>
18 #include <sound/soc.h>
19 #include "skl-nhlt.h"
20 #include "skl-ssp-clk.h"
21 
22 #define SKL_SUSPEND_DELAY 2000
23 
24 #define SKL_MAX_ASTATE_CFG		3
25 
26 #define AZX_PCIREG_PGCTL		0x44
27 #define AZX_PGCTL_LSRMD_MASK		(1 << 4)
28 #define AZX_PGCTL_ADSPPGD		BIT(2)
29 #define AZX_PCIREG_CGCTL		0x48
30 #define AZX_CGCTL_MISCBDCGE_MASK	(1 << 6)
31 #define AZX_CGCTL_ADSPDCGE		BIT(1)
32 /* D0I3C Register fields */
33 #define AZX_REG_VS_D0I3C_CIP      0x1 /* Command in progress */
34 #define AZX_REG_VS_D0I3C_I3       0x4 /* D0i3 enable */
35 #define SKL_MAX_DMACTRL_CFG	18
36 #define DMA_CLK_CONTROLS	1
37 #define DMA_TRANSMITION_START	2
38 #define DMA_TRANSMITION_STOP	3
39 
40 #define AZX_REG_VS_EM2_L1SEN		BIT(13)
41 
42 struct skl_dsp_resource {
43 	u32 max_mcps;
44 	u32 max_mem;
45 	u32 mcps;
46 	u32 mem;
47 };
48 
49 struct skl_debug;
50 
51 struct skl_astate_param {
52 	u32 kcps;
53 	u32 clk_src;
54 };
55 
56 struct skl_astate_config {
57 	u32 count;
58 	struct skl_astate_param astate_table[0];
59 };
60 
61 struct skl_fw_config {
62 	struct skl_astate_config *astate_cfg;
63 };
64 
65 struct skl {
66 	struct hda_bus hbus;
67 	struct pci_dev *pci;
68 
69 	unsigned int init_done:1; /* delayed init status */
70 	struct platform_device *dmic_dev;
71 	struct platform_device *i2s_dev;
72 	struct platform_device *clk_dev;
73 	struct snd_soc_component *component;
74 	struct snd_soc_dai_driver *dais;
75 
76 	struct nhlt_acpi_table *nhlt; /* nhlt ptr */
77 	struct skl_sst *skl_sst; /* sst skl ctx */
78 
79 	struct skl_dsp_resource resource;
80 	struct list_head ppl_list;
81 	struct list_head bind_list;
82 
83 	const char *fw_name;
84 	char tplg_name[64];
85 	unsigned short pci_id;
86 	const struct firmware *tplg;
87 
88 	int supend_active;
89 
90 	struct work_struct probe_work;
91 
92 	struct skl_debug *debugfs;
93 	u8 nr_modules;
94 	struct skl_module **modules;
95 	bool use_tplg_pcm;
96 	struct skl_fw_config cfg;
97 	struct snd_soc_acpi_mach *mach;
98 };
99 
100 #define skl_to_bus(s)  (&(s)->hbus.core)
101 #define bus_to_skl(bus) container_of(bus, struct skl, hbus.core)
102 
103 #define skl_to_hbus(s) (&(s)->hbus)
104 #define hbus_to_skl(hbus) container_of((hbus), struct skl, (hbus))
105 
106 /* to pass dai dma data */
107 struct skl_dma_params {
108 	u32 format;
109 	u8 stream_tag;
110 };
111 
112 struct skl_machine_pdata {
113 	bool use_tplg_pcm; /* use dais and dai links from topology */
114 };
115 
116 struct skl_dsp_ops {
117 	int id;
118 	unsigned int num_cores;
119 	struct skl_dsp_loader_ops (*loader_ops)(void);
120 	int (*init)(struct device *dev, void __iomem *mmio_base,
121 			int irq, const char *fw_name,
122 			struct skl_dsp_loader_ops loader_ops,
123 			struct skl_sst **skl_sst);
124 	int (*init_fw)(struct device *dev, struct skl_sst *ctx);
125 	void (*cleanup)(struct device *dev, struct skl_sst *ctx);
126 };
127 
128 int skl_platform_unregister(struct device *dev);
129 int skl_platform_register(struct device *dev);
130 
131 struct nhlt_acpi_table *skl_nhlt_init(struct device *dev);
132 void skl_nhlt_free(struct nhlt_acpi_table *addr);
133 struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance,
134 					u8 link_type, u8 s_fmt, u8 no_ch,
135 					u32 s_rate, u8 dirn, u8 dev_type);
136 
137 int skl_get_dmic_geo(struct skl *skl);
138 int skl_nhlt_update_topology_bin(struct skl *skl);
139 int skl_init_dsp(struct skl *skl);
140 int skl_free_dsp(struct skl *skl);
141 int skl_suspend_late_dsp(struct skl *skl);
142 int skl_suspend_dsp(struct skl *skl);
143 int skl_resume_dsp(struct skl *skl);
144 void skl_cleanup_resources(struct skl *skl);
145 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id);
146 void skl_update_d0i3c(struct device *dev, bool enable);
147 int skl_nhlt_create_sysfs(struct skl *skl);
148 void skl_nhlt_remove_sysfs(struct skl *skl);
149 void skl_get_clks(struct skl *skl, struct skl_ssp_clk *ssp_clks);
150 struct skl_clk_parent_src *skl_get_parent_clk(u8 clk_id);
151 int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
152 				u32 caps_size, u32 node_id);
153 
154 struct skl_module_cfg;
155 
156 #ifdef CONFIG_DEBUG_FS
157 struct skl_debug *skl_debugfs_init(struct skl *skl);
158 void skl_debug_init_module(struct skl_debug *d,
159 			struct snd_soc_dapm_widget *w,
160 			struct skl_module_cfg *mconfig);
161 #else
162 static inline struct skl_debug *skl_debugfs_init(struct skl *skl)
163 {
164 	return NULL;
165 }
166 static inline void skl_debug_init_module(struct skl_debug *d,
167 					 struct snd_soc_dapm_widget *w,
168 					 struct skl_module_cfg *mconfig)
169 {}
170 #endif
171 
172 #endif /* __SOUND_SOC_SKL_H */
173