1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Intel SKL IPC Support 4 * 5 * Copyright (C) 2014-15, Intel Corporation. 6 */ 7 8 #ifndef __SKL_IPC_H 9 #define __SKL_IPC_H 10 11 #include <linux/irqreturn.h> 12 #include "../common/sst-ipc.h" 13 14 struct sst_dsp; 15 struct skl_sst; 16 struct sst_generic_ipc; 17 18 enum skl_ipc_pipeline_state { 19 PPL_INVALID_STATE = 0, 20 PPL_UNINITIALIZED = 1, 21 PPL_RESET = 2, 22 PPL_PAUSED = 3, 23 PPL_RUNNING = 4, 24 PPL_ERROR_STOP = 5, 25 PPL_SAVED = 6, 26 PPL_RESTORED = 7 27 }; 28 29 struct skl_ipc_dxstate_info { 30 u32 core_mask; 31 u32 dx_mask; 32 }; 33 34 struct skl_ipc_header { 35 u32 primary; 36 u32 extension; 37 }; 38 39 struct skl_dsp_cores { 40 unsigned int count; 41 enum skl_dsp_states *state; 42 int *usage_count; 43 }; 44 45 /** 46 * skl_d0i3_data: skl D0i3 counters data struct 47 * 48 * @streaming: Count of usecases that can attempt streaming D0i3 49 * @non_streaming: Count of usecases that can attempt non-streaming D0i3 50 * @non_d0i3: Count of usecases that cannot attempt D0i3 51 * @state: current state 52 * @work: D0i3 worker thread 53 */ 54 struct skl_d0i3_data { 55 int streaming; 56 int non_streaming; 57 int non_d0i3; 58 enum skl_dsp_d0i3_states state; 59 struct delayed_work work; 60 }; 61 62 #define SKL_LIB_NAME_LENGTH 128 63 #define SKL_MAX_LIB 16 64 65 struct skl_lib_info { 66 char name[SKL_LIB_NAME_LENGTH]; 67 const struct firmware *fw; 68 }; 69 70 struct skl_sst { 71 struct device *dev; 72 struct sst_dsp *dsp; 73 74 /* boot */ 75 wait_queue_head_t boot_wait; 76 bool boot_complete; 77 78 /* module load */ 79 wait_queue_head_t mod_load_wait; 80 bool mod_load_complete; 81 bool mod_load_status; 82 83 /* IPC messaging */ 84 struct sst_generic_ipc ipc; 85 86 /* callback for miscbdge */ 87 void (*enable_miscbdcge)(struct device *dev, bool enable); 88 /* Is CGCTL.MISCBDCGE disabled */ 89 bool miscbdcg_disabled; 90 91 /* Populate module information */ 92 struct list_head uuid_list; 93 94 /* Is firmware loaded */ 95 bool fw_loaded; 96 97 /* first boot ? */ 98 bool is_first_boot; 99 100 /* multi-core */ 101 struct skl_dsp_cores cores; 102 103 /* library info */ 104 struct skl_lib_info lib_info[SKL_MAX_LIB]; 105 int lib_count; 106 107 /* Callback to update D0i3C register */ 108 void (*update_d0i3c)(struct device *dev, bool enable); 109 110 struct skl_d0i3_data d0i3; 111 112 const struct skl_dsp_ops *dsp_ops; 113 114 /* Callback to update dynamic clock and power gating registers */ 115 void (*clock_power_gating)(struct device *dev, bool enable); 116 }; 117 118 struct skl_ipc_init_instance_msg { 119 u32 module_id; 120 u32 instance_id; 121 u16 param_data_size; 122 u8 ppl_instance_id; 123 u8 core_id; 124 u8 domain; 125 }; 126 127 struct skl_ipc_bind_unbind_msg { 128 u32 module_id; 129 u32 instance_id; 130 u32 dst_module_id; 131 u32 dst_instance_id; 132 u8 src_queue; 133 u8 dst_queue; 134 bool bind; 135 }; 136 137 struct skl_ipc_large_config_msg { 138 u32 module_id; 139 u32 instance_id; 140 u32 large_param_id; 141 u32 param_data_size; 142 }; 143 144 struct skl_ipc_d0ix_msg { 145 u32 module_id; 146 u32 instance_id; 147 u8 streaming; 148 u8 wake; 149 }; 150 151 #define SKL_IPC_BOOT_MSECS 3000 152 153 #define SKL_IPC_D3_MASK 0 154 #define SKL_IPC_D0_MASK 3 155 156 irqreturn_t skl_dsp_irq_thread_handler(int irq, void *context); 157 158 int skl_ipc_create_pipeline(struct sst_generic_ipc *sst_ipc, 159 u16 ppl_mem_size, u8 ppl_type, u8 instance_id, u8 lp_mode); 160 161 int skl_ipc_delete_pipeline(struct sst_generic_ipc *sst_ipc, u8 instance_id); 162 163 int skl_ipc_set_pipeline_state(struct sst_generic_ipc *sst_ipc, 164 u8 instance_id, enum skl_ipc_pipeline_state state); 165 166 int skl_ipc_save_pipeline(struct sst_generic_ipc *ipc, 167 u8 instance_id, int dma_id); 168 169 int skl_ipc_restore_pipeline(struct sst_generic_ipc *ipc, u8 instance_id); 170 171 int skl_ipc_init_instance(struct sst_generic_ipc *sst_ipc, 172 struct skl_ipc_init_instance_msg *msg, void *param_data); 173 174 int skl_ipc_bind_unbind(struct sst_generic_ipc *sst_ipc, 175 struct skl_ipc_bind_unbind_msg *msg); 176 177 int skl_ipc_load_modules(struct sst_generic_ipc *ipc, 178 u8 module_cnt, void *data); 179 180 int skl_ipc_unload_modules(struct sst_generic_ipc *ipc, 181 u8 module_cnt, void *data); 182 183 int skl_ipc_set_dx(struct sst_generic_ipc *ipc, 184 u8 instance_id, u16 module_id, struct skl_ipc_dxstate_info *dx); 185 186 int skl_ipc_set_large_config(struct sst_generic_ipc *ipc, 187 struct skl_ipc_large_config_msg *msg, u32 *param); 188 189 int skl_ipc_get_large_config(struct sst_generic_ipc *ipc, 190 struct skl_ipc_large_config_msg *msg, u32 *param); 191 192 int skl_sst_ipc_load_library(struct sst_generic_ipc *ipc, 193 u8 dma_id, u8 table_id, bool wait); 194 195 int skl_ipc_set_d0ix(struct sst_generic_ipc *ipc, 196 struct skl_ipc_d0ix_msg *msg); 197 198 int skl_ipc_check_D0i0(struct sst_dsp *dsp, bool state); 199 200 void skl_ipc_int_enable(struct sst_dsp *dsp); 201 void skl_ipc_op_int_enable(struct sst_dsp *ctx); 202 void skl_ipc_op_int_disable(struct sst_dsp *ctx); 203 void skl_ipc_int_disable(struct sst_dsp *dsp); 204 205 bool skl_ipc_int_status(struct sst_dsp *dsp); 206 void skl_ipc_free(struct sst_generic_ipc *ipc); 207 int skl_ipc_init(struct device *dev, struct skl_sst *skl); 208 void skl_clear_module_cnt(struct sst_dsp *ctx); 209 210 void skl_ipc_process_reply(struct sst_generic_ipc *ipc, 211 struct skl_ipc_header header); 212 int skl_ipc_process_notification(struct sst_generic_ipc *ipc, 213 struct skl_ipc_header header); 214 void skl_ipc_tx_data_copy(struct ipc_message *msg, char *tx_data, 215 size_t tx_size); 216 #endif /* __SKL_IPC_H */ 217