1 /* 2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality 3 * 4 * Copyright (C) 2014-2015 Intel Corp 5 * Author: Jeeja KP <jeeja.kp@intel.com> 6 * 7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 19 * 20 */ 21 22 #include <linux/pci.h> 23 #include <linux/pm_runtime.h> 24 #include <sound/pcm_params.h> 25 #include <sound/soc.h> 26 #include "skl.h" 27 #include "skl-topology.h" 28 #include "skl-sst-dsp.h" 29 #include "skl-sst-ipc.h" 30 31 #define HDA_MONO 1 32 #define HDA_STEREO 2 33 #define HDA_QUAD 4 34 35 static struct snd_pcm_hardware azx_pcm_hw = { 36 .info = (SNDRV_PCM_INFO_MMAP | 37 SNDRV_PCM_INFO_INTERLEAVED | 38 SNDRV_PCM_INFO_BLOCK_TRANSFER | 39 SNDRV_PCM_INFO_MMAP_VALID | 40 SNDRV_PCM_INFO_PAUSE | 41 SNDRV_PCM_INFO_RESUME | 42 SNDRV_PCM_INFO_SYNC_START | 43 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */ 44 SNDRV_PCM_INFO_HAS_LINK_ATIME | 45 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP), 46 .formats = SNDRV_PCM_FMTBIT_S16_LE | 47 SNDRV_PCM_FMTBIT_S32_LE | 48 SNDRV_PCM_FMTBIT_S24_LE, 49 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | 50 SNDRV_PCM_RATE_8000, 51 .rate_min = 8000, 52 .rate_max = 48000, 53 .channels_min = 1, 54 .channels_max = HDA_QUAD, 55 .buffer_bytes_max = AZX_MAX_BUF_SIZE, 56 .period_bytes_min = 128, 57 .period_bytes_max = AZX_MAX_BUF_SIZE / 2, 58 .periods_min = 2, 59 .periods_max = AZX_MAX_FRAG, 60 .fifo_size = 0, 61 }; 62 63 static inline 64 struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream) 65 { 66 return substream->runtime->private_data; 67 } 68 69 static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream) 70 { 71 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 72 struct hdac_stream *hstream = hdac_stream(stream); 73 struct hdac_bus *bus = hstream->bus; 74 75 return hbus_to_ebus(bus); 76 } 77 78 static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus, 79 struct snd_pcm_substream *substream, 80 size_t size) 81 { 82 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 83 84 hdac_stream(stream)->bufsize = 0; 85 hdac_stream(stream)->period_bytes = 0; 86 hdac_stream(stream)->format_val = 0; 87 88 return snd_pcm_lib_malloc_pages(substream, size); 89 } 90 91 static int skl_substream_free_pages(struct hdac_bus *bus, 92 struct snd_pcm_substream *substream) 93 { 94 return snd_pcm_lib_free_pages(substream); 95 } 96 97 static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus, 98 struct snd_pcm_runtime *runtime) 99 { 100 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 101 102 /* avoid wrap-around with wall-clock */ 103 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME, 104 20, 178000000); 105 } 106 107 static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus) 108 { 109 if (ebus->ppcap) 110 return HDAC_EXT_STREAM_TYPE_HOST; 111 else 112 return HDAC_EXT_STREAM_TYPE_COUPLED; 113 } 114 115 /* 116 * check if the stream opened is marked as ignore_suspend by machine, if so 117 * then enable suspend_active refcount 118 * 119 * The count supend_active does not need lock as it is used in open/close 120 * and suspend context 121 */ 122 static void skl_set_suspend_active(struct snd_pcm_substream *substream, 123 struct snd_soc_dai *dai, bool enable) 124 { 125 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 126 struct snd_soc_dapm_widget *w; 127 struct skl *skl = ebus_to_skl(ebus); 128 129 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 130 w = dai->playback_widget; 131 else 132 w = dai->capture_widget; 133 134 if (w->ignore_suspend && enable) 135 skl->supend_active++; 136 else if (w->ignore_suspend && !enable) 137 skl->supend_active--; 138 } 139 140 static int skl_pcm_open(struct snd_pcm_substream *substream, 141 struct snd_soc_dai *dai) 142 { 143 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 144 struct hdac_ext_stream *stream; 145 struct snd_pcm_runtime *runtime = substream->runtime; 146 struct skl_dma_params *dma_params; 147 148 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); 149 150 stream = snd_hdac_ext_stream_assign(ebus, substream, 151 skl_get_host_stream_type(ebus)); 152 if (stream == NULL) 153 return -EBUSY; 154 155 skl_set_pcm_constrains(ebus, runtime); 156 157 /* 158 * disable WALLCLOCK timestamps for capture streams 159 * until we figure out how to handle digital inputs 160 */ 161 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { 162 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */ 163 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME; 164 } 165 166 runtime->private_data = stream; 167 168 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL); 169 if (!dma_params) 170 return -ENOMEM; 171 172 dma_params->stream_tag = hdac_stream(stream)->stream_tag; 173 snd_soc_dai_set_dma_data(dai, substream, dma_params); 174 175 dev_dbg(dai->dev, "stream tag set in dma params=%d\n", 176 dma_params->stream_tag); 177 skl_set_suspend_active(substream, dai, true); 178 snd_pcm_set_sync(substream); 179 180 return 0; 181 } 182 183 static int skl_get_format(struct snd_pcm_substream *substream, 184 struct snd_soc_dai *dai) 185 { 186 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 187 struct skl_dma_params *dma_params; 188 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 189 int format_val = 0; 190 191 if (ebus->ppcap) { 192 struct snd_pcm_runtime *runtime = substream->runtime; 193 194 format_val = snd_hdac_calc_stream_format(runtime->rate, 195 runtime->channels, 196 runtime->format, 197 32, 0); 198 } else { 199 struct snd_soc_dai *codec_dai = rtd->codec_dai; 200 201 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream); 202 if (dma_params) 203 format_val = dma_params->format; 204 } 205 206 return format_val; 207 } 208 209 static int skl_be_prepare(struct snd_pcm_substream *substream, 210 struct snd_soc_dai *dai) 211 { 212 struct skl *skl = get_skl_ctx(dai->dev); 213 struct skl_sst *ctx = skl->skl_sst; 214 struct skl_module_cfg *mconfig; 215 216 if ((dai->playback_active > 1) || (dai->capture_active > 1)) 217 return 0; 218 219 mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream); 220 if (mconfig == NULL) 221 return -EINVAL; 222 223 return skl_dsp_set_dma_control(ctx, mconfig); 224 } 225 226 static int skl_pcm_prepare(struct snd_pcm_substream *substream, 227 struct snd_soc_dai *dai) 228 { 229 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 230 unsigned int format_val; 231 int err; 232 233 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); 234 235 format_val = skl_get_format(substream, dai); 236 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n", 237 hdac_stream(stream)->stream_tag, format_val); 238 snd_hdac_stream_reset(hdac_stream(stream)); 239 240 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val); 241 if (err < 0) 242 return err; 243 244 err = snd_hdac_stream_setup(hdac_stream(stream)); 245 if (err < 0) 246 return err; 247 248 hdac_stream(stream)->prepared = 1; 249 250 return err; 251 } 252 253 static int skl_pcm_hw_params(struct snd_pcm_substream *substream, 254 struct snd_pcm_hw_params *params, 255 struct snd_soc_dai *dai) 256 { 257 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 258 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 259 struct snd_pcm_runtime *runtime = substream->runtime; 260 struct skl_pipe_params p_params = {0}; 261 struct skl_module_cfg *m_cfg; 262 int ret, dma_id; 263 264 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); 265 ret = skl_substream_alloc_pages(ebus, substream, 266 params_buffer_bytes(params)); 267 if (ret < 0) 268 return ret; 269 270 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n", 271 runtime->rate, runtime->channels, runtime->format); 272 273 dma_id = hdac_stream(stream)->stream_tag - 1; 274 dev_dbg(dai->dev, "dma_id=%d\n", dma_id); 275 276 p_params.s_fmt = snd_pcm_format_width(params_format(params)); 277 p_params.ch = params_channels(params); 278 p_params.s_freq = params_rate(params); 279 p_params.host_dma_id = dma_id; 280 p_params.stream = substream->stream; 281 282 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream); 283 if (m_cfg) 284 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params); 285 286 return 0; 287 } 288 289 static void skl_pcm_close(struct snd_pcm_substream *substream, 290 struct snd_soc_dai *dai) 291 { 292 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 293 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 294 struct skl_dma_params *dma_params = NULL; 295 struct skl *skl = ebus_to_skl(ebus); 296 297 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); 298 299 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus)); 300 301 dma_params = snd_soc_dai_get_dma_data(dai, substream); 302 /* 303 * now we should set this to NULL as we are freeing by the 304 * dma_params 305 */ 306 snd_soc_dai_set_dma_data(dai, substream, NULL); 307 skl_set_suspend_active(substream, dai, false); 308 309 /* 310 * check if close is for "Reference Pin" and set back the 311 * CGCTL.MISCBDCGE if disabled by driver 312 */ 313 if (!strncmp(dai->name, "Reference Pin", 13) && 314 skl->skl_sst->miscbdcg_disabled) { 315 skl->skl_sst->enable_miscbdcge(dai->dev, true); 316 skl->skl_sst->miscbdcg_disabled = false; 317 } 318 319 kfree(dma_params); 320 } 321 322 static int skl_pcm_hw_free(struct snd_pcm_substream *substream, 323 struct snd_soc_dai *dai) 324 { 325 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 326 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 327 328 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); 329 330 snd_hdac_stream_cleanup(hdac_stream(stream)); 331 hdac_stream(stream)->prepared = 0; 332 333 return skl_substream_free_pages(ebus_to_hbus(ebus), substream); 334 } 335 336 static int skl_be_hw_params(struct snd_pcm_substream *substream, 337 struct snd_pcm_hw_params *params, 338 struct snd_soc_dai *dai) 339 { 340 struct skl_pipe_params p_params = {0}; 341 342 p_params.s_fmt = snd_pcm_format_width(params_format(params)); 343 p_params.ch = params_channels(params); 344 p_params.s_freq = params_rate(params); 345 p_params.stream = substream->stream; 346 347 return skl_tplg_be_update_params(dai, &p_params); 348 } 349 350 static int skl_decoupled_trigger(struct snd_pcm_substream *substream, 351 int cmd) 352 { 353 struct hdac_ext_bus *ebus = get_bus_ctx(substream); 354 struct hdac_bus *bus = ebus_to_hbus(ebus); 355 struct hdac_ext_stream *stream; 356 int start; 357 unsigned long cookie; 358 struct hdac_stream *hstr; 359 360 stream = get_hdac_ext_stream(substream); 361 hstr = hdac_stream(stream); 362 363 if (!hstr->prepared) 364 return -EPIPE; 365 366 switch (cmd) { 367 case SNDRV_PCM_TRIGGER_START: 368 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 369 case SNDRV_PCM_TRIGGER_RESUME: 370 start = 1; 371 break; 372 373 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 374 case SNDRV_PCM_TRIGGER_SUSPEND: 375 case SNDRV_PCM_TRIGGER_STOP: 376 start = 0; 377 break; 378 379 default: 380 return -EINVAL; 381 } 382 383 spin_lock_irqsave(&bus->reg_lock, cookie); 384 385 if (start) { 386 snd_hdac_stream_start(hdac_stream(stream), true); 387 snd_hdac_stream_timecounter_init(hstr, 0); 388 } else { 389 snd_hdac_stream_stop(hdac_stream(stream)); 390 } 391 392 spin_unlock_irqrestore(&bus->reg_lock, cookie); 393 394 return 0; 395 } 396 397 static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd, 398 struct snd_soc_dai *dai) 399 { 400 struct skl *skl = get_skl_ctx(dai->dev); 401 struct skl_sst *ctx = skl->skl_sst; 402 struct skl_module_cfg *mconfig; 403 struct hdac_ext_bus *ebus = get_bus_ctx(substream); 404 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 405 int ret; 406 407 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream); 408 if (!mconfig) 409 return -EIO; 410 411 switch (cmd) { 412 case SNDRV_PCM_TRIGGER_RESUME: 413 skl_pcm_prepare(substream, dai); 414 /* 415 * enable DMA Resume enable bit for the stream, set the dpib 416 * & lpib position to resune before starting the DMA 417 */ 418 snd_hdac_ext_stream_drsm_enable(ebus, true, 419 hdac_stream(stream)->index); 420 snd_hdac_ext_stream_set_dpibr(ebus, stream, stream->dpib); 421 snd_hdac_ext_stream_set_lpib(stream, stream->lpib); 422 423 case SNDRV_PCM_TRIGGER_START: 424 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 425 /* 426 * Start HOST DMA and Start FE Pipe.This is to make sure that 427 * there are no underrun/overrun in the case when the FE 428 * pipeline is started but there is a delay in starting the 429 * DMA channel on the host. 430 */ 431 snd_hdac_ext_stream_decouple(ebus, stream, true); 432 ret = skl_decoupled_trigger(substream, cmd); 433 if (ret < 0) 434 return ret; 435 return skl_run_pipe(ctx, mconfig->pipe); 436 break; 437 438 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 439 case SNDRV_PCM_TRIGGER_SUSPEND: 440 case SNDRV_PCM_TRIGGER_STOP: 441 /* 442 * Stop FE Pipe first and stop DMA. This is to make sure that 443 * there are no underrun/overrun in the case if there is a delay 444 * between the two operations. 445 */ 446 ret = skl_stop_pipe(ctx, mconfig->pipe); 447 if (ret < 0) 448 return ret; 449 450 ret = skl_decoupled_trigger(substream, cmd); 451 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND) { 452 /* save the dpib and lpib positions */ 453 stream->dpib = readl(ebus->bus.remap_addr + 454 AZX_REG_VS_SDXDPIB_XBASE + 455 (AZX_REG_VS_SDXDPIB_XINTERVAL * 456 hdac_stream(stream)->index)); 457 458 stream->lpib = snd_hdac_stream_get_pos_lpib( 459 hdac_stream(stream)); 460 snd_hdac_ext_stream_decouple(ebus, stream, false); 461 } 462 break; 463 464 default: 465 return -EINVAL; 466 } 467 468 return 0; 469 } 470 471 static int skl_link_hw_params(struct snd_pcm_substream *substream, 472 struct snd_pcm_hw_params *params, 473 struct snd_soc_dai *dai) 474 { 475 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 476 struct hdac_ext_stream *link_dev; 477 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 478 struct hdac_ext_dma_params *dma_params; 479 struct snd_soc_dai *codec_dai = rtd->codec_dai; 480 struct skl_pipe_params p_params = {0}; 481 482 link_dev = snd_hdac_ext_stream_assign(ebus, substream, 483 HDAC_EXT_STREAM_TYPE_LINK); 484 if (!link_dev) 485 return -EBUSY; 486 487 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev); 488 489 /* set the stream tag in the codec dai dma params */ 490 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream); 491 if (dma_params) 492 dma_params->stream_tag = hdac_stream(link_dev)->stream_tag; 493 494 p_params.s_fmt = snd_pcm_format_width(params_format(params)); 495 p_params.ch = params_channels(params); 496 p_params.s_freq = params_rate(params); 497 p_params.stream = substream->stream; 498 p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1; 499 500 return skl_tplg_be_update_params(dai, &p_params); 501 } 502 503 static int skl_link_pcm_prepare(struct snd_pcm_substream *substream, 504 struct snd_soc_dai *dai) 505 { 506 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 507 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 508 struct hdac_ext_stream *link_dev = 509 snd_soc_dai_get_dma_data(dai, substream); 510 unsigned int format_val = 0; 511 struct skl_dma_params *dma_params; 512 struct snd_soc_dai *codec_dai = rtd->codec_dai; 513 struct hdac_ext_link *link; 514 515 dma_params = (struct skl_dma_params *) 516 snd_soc_dai_get_dma_data(codec_dai, substream); 517 if (dma_params) 518 format_val = dma_params->format; 519 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n", 520 hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name); 521 522 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name); 523 if (!link) 524 return -EINVAL; 525 526 snd_hdac_ext_bus_link_power_up(link); 527 snd_hdac_ext_link_stream_reset(link_dev); 528 529 snd_hdac_ext_link_stream_setup(link_dev, format_val); 530 531 snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag); 532 link_dev->link_prepared = 1; 533 534 return 0; 535 } 536 537 static int skl_link_pcm_trigger(struct snd_pcm_substream *substream, 538 int cmd, struct snd_soc_dai *dai) 539 { 540 struct hdac_ext_stream *link_dev = 541 snd_soc_dai_get_dma_data(dai, substream); 542 struct hdac_ext_bus *ebus = get_bus_ctx(substream); 543 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream); 544 545 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd); 546 switch (cmd) { 547 case SNDRV_PCM_TRIGGER_RESUME: 548 skl_link_pcm_prepare(substream, dai); 549 case SNDRV_PCM_TRIGGER_START: 550 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 551 snd_hdac_ext_stream_decouple(ebus, stream, true); 552 snd_hdac_ext_link_stream_start(link_dev); 553 break; 554 555 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 556 case SNDRV_PCM_TRIGGER_SUSPEND: 557 case SNDRV_PCM_TRIGGER_STOP: 558 snd_hdac_ext_link_stream_clear(link_dev); 559 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND) 560 snd_hdac_ext_stream_decouple(ebus, stream, false); 561 break; 562 563 default: 564 return -EINVAL; 565 } 566 return 0; 567 } 568 569 static int skl_link_hw_free(struct snd_pcm_substream *substream, 570 struct snd_soc_dai *dai) 571 { 572 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 573 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 574 struct hdac_ext_stream *link_dev = 575 snd_soc_dai_get_dma_data(dai, substream); 576 struct hdac_ext_link *link; 577 578 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name); 579 580 link_dev->link_prepared = 0; 581 582 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name); 583 if (!link) 584 return -EINVAL; 585 586 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag); 587 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK); 588 return 0; 589 } 590 591 static struct snd_soc_dai_ops skl_pcm_dai_ops = { 592 .startup = skl_pcm_open, 593 .shutdown = skl_pcm_close, 594 .prepare = skl_pcm_prepare, 595 .hw_params = skl_pcm_hw_params, 596 .hw_free = skl_pcm_hw_free, 597 .trigger = skl_pcm_trigger, 598 }; 599 600 static struct snd_soc_dai_ops skl_dmic_dai_ops = { 601 .hw_params = skl_be_hw_params, 602 }; 603 604 static struct snd_soc_dai_ops skl_be_ssp_dai_ops = { 605 .hw_params = skl_be_hw_params, 606 .prepare = skl_be_prepare, 607 }; 608 609 static struct snd_soc_dai_ops skl_link_dai_ops = { 610 .prepare = skl_link_pcm_prepare, 611 .hw_params = skl_link_hw_params, 612 .hw_free = skl_link_hw_free, 613 .trigger = skl_link_pcm_trigger, 614 }; 615 616 static struct snd_soc_dai_driver skl_platform_dai[] = { 617 { 618 .name = "System Pin", 619 .ops = &skl_pcm_dai_ops, 620 .playback = { 621 .stream_name = "System Playback", 622 .channels_min = HDA_MONO, 623 .channels_max = HDA_STEREO, 624 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000, 625 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 626 }, 627 .capture = { 628 .stream_name = "System Capture", 629 .channels_min = HDA_MONO, 630 .channels_max = HDA_STEREO, 631 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, 632 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 633 }, 634 }, 635 { 636 .name = "Reference Pin", 637 .ops = &skl_pcm_dai_ops, 638 .capture = { 639 .stream_name = "Reference Capture", 640 .channels_min = HDA_MONO, 641 .channels_max = HDA_QUAD, 642 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, 643 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 644 }, 645 }, 646 { 647 .name = "Deepbuffer Pin", 648 .ops = &skl_pcm_dai_ops, 649 .playback = { 650 .stream_name = "Deepbuffer Playback", 651 .channels_min = HDA_STEREO, 652 .channels_max = HDA_STEREO, 653 .rates = SNDRV_PCM_RATE_48000, 654 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 655 }, 656 }, 657 { 658 .name = "LowLatency Pin", 659 .ops = &skl_pcm_dai_ops, 660 .playback = { 661 .stream_name = "Low Latency Playback", 662 .channels_min = HDA_STEREO, 663 .channels_max = HDA_STEREO, 664 .rates = SNDRV_PCM_RATE_48000, 665 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 666 }, 667 }, 668 { 669 .name = "DMIC Pin", 670 .ops = &skl_pcm_dai_ops, 671 .capture = { 672 .stream_name = "DMIC Capture", 673 .channels_min = HDA_MONO, 674 .channels_max = HDA_QUAD, 675 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, 676 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 677 }, 678 }, 679 { 680 .name = "HDMI1 Pin", 681 .ops = &skl_pcm_dai_ops, 682 .playback = { 683 .stream_name = "HDMI1 Playback", 684 .channels_min = HDA_STEREO, 685 .channels_max = HDA_STEREO, 686 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | 687 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | 688 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | 689 SNDRV_PCM_RATE_192000, 690 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 691 SNDRV_PCM_FMTBIT_S32_LE, 692 }, 693 }, 694 { 695 .name = "HDMI2 Pin", 696 .ops = &skl_pcm_dai_ops, 697 .playback = { 698 .stream_name = "HDMI2 Playback", 699 .channels_min = HDA_STEREO, 700 .channels_max = HDA_STEREO, 701 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | 702 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | 703 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | 704 SNDRV_PCM_RATE_192000, 705 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 706 SNDRV_PCM_FMTBIT_S32_LE, 707 }, 708 }, 709 { 710 .name = "HDMI3 Pin", 711 .ops = &skl_pcm_dai_ops, 712 .playback = { 713 .stream_name = "HDMI3 Playback", 714 .channels_min = HDA_STEREO, 715 .channels_max = HDA_STEREO, 716 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | 717 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | 718 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | 719 SNDRV_PCM_RATE_192000, 720 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 721 SNDRV_PCM_FMTBIT_S32_LE, 722 }, 723 }, 724 725 /* BE CPU Dais */ 726 { 727 .name = "SSP0 Pin", 728 .ops = &skl_be_ssp_dai_ops, 729 .playback = { 730 .stream_name = "ssp0 Tx", 731 .channels_min = HDA_STEREO, 732 .channels_max = HDA_STEREO, 733 .rates = SNDRV_PCM_RATE_48000, 734 .formats = SNDRV_PCM_FMTBIT_S16_LE, 735 }, 736 .capture = { 737 .stream_name = "ssp0 Rx", 738 .channels_min = HDA_STEREO, 739 .channels_max = HDA_STEREO, 740 .rates = SNDRV_PCM_RATE_48000, 741 .formats = SNDRV_PCM_FMTBIT_S16_LE, 742 }, 743 }, 744 { 745 .name = "SSP1 Pin", 746 .ops = &skl_be_ssp_dai_ops, 747 .playback = { 748 .stream_name = "ssp1 Tx", 749 .channels_min = HDA_STEREO, 750 .channels_max = HDA_STEREO, 751 .rates = SNDRV_PCM_RATE_48000, 752 .formats = SNDRV_PCM_FMTBIT_S16_LE, 753 }, 754 .capture = { 755 .stream_name = "ssp1 Rx", 756 .channels_min = HDA_STEREO, 757 .channels_max = HDA_STEREO, 758 .rates = SNDRV_PCM_RATE_48000, 759 .formats = SNDRV_PCM_FMTBIT_S16_LE, 760 }, 761 }, 762 { 763 .name = "iDisp1 Pin", 764 .ops = &skl_link_dai_ops, 765 .playback = { 766 .stream_name = "iDisp1 Tx", 767 .channels_min = HDA_STEREO, 768 .channels_max = HDA_STEREO, 769 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000, 770 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE | 771 SNDRV_PCM_FMTBIT_S24_LE, 772 }, 773 }, 774 { 775 .name = "iDisp2 Pin", 776 .ops = &skl_link_dai_ops, 777 .playback = { 778 .stream_name = "iDisp2 Tx", 779 .channels_min = HDA_STEREO, 780 .channels_max = HDA_STEREO, 781 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000| 782 SNDRV_PCM_RATE_48000, 783 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE | 784 SNDRV_PCM_FMTBIT_S24_LE, 785 }, 786 }, 787 { 788 .name = "iDisp3 Pin", 789 .ops = &skl_link_dai_ops, 790 .playback = { 791 .stream_name = "iDisp3 Tx", 792 .channels_min = HDA_STEREO, 793 .channels_max = HDA_STEREO, 794 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000| 795 SNDRV_PCM_RATE_48000, 796 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE | 797 SNDRV_PCM_FMTBIT_S24_LE, 798 }, 799 }, 800 { 801 .name = "DMIC01 Pin", 802 .ops = &skl_dmic_dai_ops, 803 .capture = { 804 .stream_name = "DMIC01 Rx", 805 .channels_min = HDA_MONO, 806 .channels_max = HDA_QUAD, 807 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000, 808 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, 809 }, 810 }, 811 { 812 .name = "HD-Codec Pin", 813 .ops = &skl_link_dai_ops, 814 .playback = { 815 .stream_name = "HD-Codec Tx", 816 .channels_min = HDA_STEREO, 817 .channels_max = HDA_STEREO, 818 .rates = SNDRV_PCM_RATE_48000, 819 .formats = SNDRV_PCM_FMTBIT_S16_LE, 820 }, 821 .capture = { 822 .stream_name = "HD-Codec Rx", 823 .channels_min = HDA_STEREO, 824 .channels_max = HDA_STEREO, 825 .rates = SNDRV_PCM_RATE_48000, 826 .formats = SNDRV_PCM_FMTBIT_S16_LE, 827 }, 828 }, 829 }; 830 831 static int skl_platform_open(struct snd_pcm_substream *substream) 832 { 833 struct snd_pcm_runtime *runtime; 834 struct snd_soc_pcm_runtime *rtd = substream->private_data; 835 struct snd_soc_dai_link *dai_link = rtd->dai_link; 836 837 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__, 838 dai_link->cpu_dai_name); 839 840 runtime = substream->runtime; 841 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw); 842 843 return 0; 844 } 845 846 static int skl_coupled_trigger(struct snd_pcm_substream *substream, 847 int cmd) 848 { 849 struct hdac_ext_bus *ebus = get_bus_ctx(substream); 850 struct hdac_bus *bus = ebus_to_hbus(ebus); 851 struct hdac_ext_stream *stream; 852 struct snd_pcm_substream *s; 853 bool start; 854 int sbits = 0; 855 unsigned long cookie; 856 struct hdac_stream *hstr; 857 858 stream = get_hdac_ext_stream(substream); 859 hstr = hdac_stream(stream); 860 861 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd); 862 863 if (!hstr->prepared) 864 return -EPIPE; 865 866 switch (cmd) { 867 case SNDRV_PCM_TRIGGER_START: 868 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 869 case SNDRV_PCM_TRIGGER_RESUME: 870 start = true; 871 break; 872 873 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 874 case SNDRV_PCM_TRIGGER_SUSPEND: 875 case SNDRV_PCM_TRIGGER_STOP: 876 start = false; 877 break; 878 879 default: 880 return -EINVAL; 881 } 882 883 snd_pcm_group_for_each_entry(s, substream) { 884 if (s->pcm->card != substream->pcm->card) 885 continue; 886 stream = get_hdac_ext_stream(s); 887 sbits |= 1 << hdac_stream(stream)->index; 888 snd_pcm_trigger_done(s, substream); 889 } 890 891 spin_lock_irqsave(&bus->reg_lock, cookie); 892 893 /* first, set SYNC bits of corresponding streams */ 894 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC); 895 896 snd_pcm_group_for_each_entry(s, substream) { 897 if (s->pcm->card != substream->pcm->card) 898 continue; 899 stream = get_hdac_ext_stream(s); 900 if (start) 901 snd_hdac_stream_start(hdac_stream(stream), true); 902 else 903 snd_hdac_stream_stop(hdac_stream(stream)); 904 } 905 spin_unlock_irqrestore(&bus->reg_lock, cookie); 906 907 snd_hdac_stream_sync(hstr, start, sbits); 908 909 spin_lock_irqsave(&bus->reg_lock, cookie); 910 911 /* reset SYNC bits */ 912 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC); 913 if (start) 914 snd_hdac_stream_timecounter_init(hstr, sbits); 915 spin_unlock_irqrestore(&bus->reg_lock, cookie); 916 917 return 0; 918 } 919 920 static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream, 921 int cmd) 922 { 923 struct hdac_ext_bus *ebus = get_bus_ctx(substream); 924 925 if (!ebus->ppcap) 926 return skl_coupled_trigger(substream, cmd); 927 928 return 0; 929 } 930 931 /* calculate runtime delay from LPIB */ 932 static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus, 933 struct hdac_ext_stream *sstream, 934 unsigned int pos) 935 { 936 struct hdac_bus *bus = ebus_to_hbus(ebus); 937 struct hdac_stream *hstream = hdac_stream(sstream); 938 struct snd_pcm_substream *substream = hstream->substream; 939 int stream = substream->stream; 940 unsigned int lpib_pos = snd_hdac_stream_get_pos_lpib(hstream); 941 int delay; 942 943 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 944 delay = pos - lpib_pos; 945 else 946 delay = lpib_pos - pos; 947 948 if (delay < 0) { 949 if (delay >= hstream->delay_negative_threshold) 950 delay = 0; 951 else 952 delay += hstream->bufsize; 953 } 954 955 if (hstream->bufsize == delay) 956 delay = 0; 957 958 if (delay >= hstream->period_bytes) { 959 dev_info(bus->dev, 960 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n", 961 delay, hstream->period_bytes); 962 delay = 0; 963 } 964 965 return bytes_to_frames(substream->runtime, delay); 966 } 967 968 static unsigned int skl_get_position(struct hdac_ext_stream *hstream, 969 int codec_delay) 970 { 971 struct hdac_stream *hstr = hdac_stream(hstream); 972 struct snd_pcm_substream *substream = hstr->substream; 973 struct hdac_ext_bus *ebus; 974 unsigned int pos; 975 int delay; 976 977 /* use the position buffer as default */ 978 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream)); 979 980 if (pos >= hdac_stream(hstream)->bufsize) 981 pos = 0; 982 983 if (substream->runtime) { 984 ebus = get_bus_ctx(substream); 985 delay = skl_get_delay_from_lpib(ebus, hstream, pos) 986 + codec_delay; 987 substream->runtime->delay += delay; 988 } 989 990 return pos; 991 } 992 993 static snd_pcm_uframes_t skl_platform_pcm_pointer 994 (struct snd_pcm_substream *substream) 995 { 996 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream); 997 998 return bytes_to_frames(substream->runtime, 999 skl_get_position(hstream, 0)); 1000 } 1001 1002 static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream, 1003 u64 nsec) 1004 { 1005 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); 1006 struct snd_soc_dai *codec_dai = rtd->codec_dai; 1007 u64 codec_frames, codec_nsecs; 1008 1009 if (!codec_dai->driver->ops->delay) 1010 return nsec; 1011 1012 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai); 1013 codec_nsecs = div_u64(codec_frames * 1000000000LL, 1014 substream->runtime->rate); 1015 1016 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 1017 return nsec + codec_nsecs; 1018 1019 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0; 1020 } 1021 1022 static int skl_get_time_info(struct snd_pcm_substream *substream, 1023 struct timespec *system_ts, struct timespec *audio_ts, 1024 struct snd_pcm_audio_tstamp_config *audio_tstamp_config, 1025 struct snd_pcm_audio_tstamp_report *audio_tstamp_report) 1026 { 1027 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream); 1028 struct hdac_stream *hstr = hdac_stream(sstream); 1029 u64 nsec; 1030 1031 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) && 1032 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) { 1033 1034 snd_pcm_gettime(substream->runtime, system_ts); 1035 1036 nsec = timecounter_read(&hstr->tc); 1037 nsec = div_u64(nsec, 3); /* can be optimized */ 1038 if (audio_tstamp_config->report_delay) 1039 nsec = skl_adjust_codec_delay(substream, nsec); 1040 1041 *audio_ts = ns_to_timespec(nsec); 1042 1043 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK; 1044 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */ 1045 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */ 1046 1047 } else { 1048 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT; 1049 } 1050 1051 return 0; 1052 } 1053 1054 static struct snd_pcm_ops skl_platform_ops = { 1055 .open = skl_platform_open, 1056 .ioctl = snd_pcm_lib_ioctl, 1057 .trigger = skl_platform_pcm_trigger, 1058 .pointer = skl_platform_pcm_pointer, 1059 .get_time_info = skl_get_time_info, 1060 .mmap = snd_pcm_lib_default_mmap, 1061 .page = snd_pcm_sgbuf_ops_page, 1062 }; 1063 1064 static void skl_pcm_free(struct snd_pcm *pcm) 1065 { 1066 snd_pcm_lib_preallocate_free_for_all(pcm); 1067 } 1068 1069 #define MAX_PREALLOC_SIZE (32 * 1024 * 1024) 1070 1071 static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd) 1072 { 1073 struct snd_soc_dai *dai = rtd->cpu_dai; 1074 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); 1075 struct snd_pcm *pcm = rtd->pcm; 1076 unsigned int size; 1077 int retval = 0; 1078 struct skl *skl = ebus_to_skl(ebus); 1079 1080 if (dai->driver->playback.channels_min || 1081 dai->driver->capture.channels_min) { 1082 /* buffer pre-allocation */ 1083 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024; 1084 if (size > MAX_PREALLOC_SIZE) 1085 size = MAX_PREALLOC_SIZE; 1086 retval = snd_pcm_lib_preallocate_pages_for_all(pcm, 1087 SNDRV_DMA_TYPE_DEV_SG, 1088 snd_dma_pci_data(skl->pci), 1089 size, MAX_PREALLOC_SIZE); 1090 if (retval) { 1091 dev_err(dai->dev, "dma buffer allocationf fail\n"); 1092 return retval; 1093 } 1094 } 1095 1096 return retval; 1097 } 1098 1099 static int skl_platform_soc_probe(struct snd_soc_platform *platform) 1100 { 1101 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev); 1102 1103 if (ebus->ppcap) 1104 return skl_tplg_init(platform, ebus); 1105 1106 return 0; 1107 } 1108 static struct snd_soc_platform_driver skl_platform_drv = { 1109 .probe = skl_platform_soc_probe, 1110 .ops = &skl_platform_ops, 1111 .pcm_new = skl_pcm_new, 1112 .pcm_free = skl_pcm_free, 1113 }; 1114 1115 static const struct snd_soc_component_driver skl_component = { 1116 .name = "pcm", 1117 }; 1118 1119 int skl_platform_register(struct device *dev) 1120 { 1121 int ret; 1122 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 1123 struct skl *skl = ebus_to_skl(ebus); 1124 1125 INIT_LIST_HEAD(&skl->ppl_list); 1126 1127 ret = snd_soc_register_platform(dev, &skl_platform_drv); 1128 if (ret) { 1129 dev_err(dev, "soc platform registration failed %d\n", ret); 1130 return ret; 1131 } 1132 ret = snd_soc_register_component(dev, &skl_component, 1133 skl_platform_dai, 1134 ARRAY_SIZE(skl_platform_dai)); 1135 if (ret) { 1136 dev_err(dev, "soc component registration failed %d\n", ret); 1137 snd_soc_unregister_platform(dev); 1138 } 1139 1140 return ret; 1141 1142 } 1143 1144 int skl_platform_unregister(struct device *dev) 1145 { 1146 snd_soc_unregister_component(dev); 1147 snd_soc_unregister_platform(dev); 1148 return 0; 1149 } 1150