1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * fireworks.h - a part of driver for Fireworks based devices
4  *
5  * Copyright (c) 2009-2010 Clemens Ladisch
6  * Copyright (c) 2013-2014 Takashi Sakamoto
7  */
8 #ifndef SOUND_FIREWORKS_H_INCLUDED
9 #define SOUND_FIREWORKS_H_INCLUDED
10 
11 #include <linux/compat.h>
12 #include <linux/device.h>
13 #include <linux/firewire.h>
14 #include <linux/firewire-constants.h>
15 #include <linux/module.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <linux/sched/signal.h>
20 
21 #include <sound/core.h>
22 #include <sound/initval.h>
23 #include <sound/pcm.h>
24 #include <sound/info.h>
25 #include <sound/rawmidi.h>
26 #include <sound/pcm_params.h>
27 #include <sound/firewire.h>
28 #include <sound/hwdep.h>
29 
30 #include "../packets-buffer.h"
31 #include "../iso-resources.h"
32 #include "../amdtp-am824.h"
33 #include "../cmp.h"
34 #include "../lib.h"
35 
36 #define SND_EFW_MAX_MIDI_OUT_PORTS	2
37 #define SND_EFW_MAX_MIDI_IN_PORTS	2
38 
39 #define SND_EFW_MULTIPLIER_MODES	3
40 #define HWINFO_NAME_SIZE_BYTES		32
41 #define HWINFO_MAX_CAPS_GROUPS		8
42 
43 /*
44  * This should be greater than maximum bytes for EFW response content.
45  * Currently response against command for isochronous channel mapping is
46  * confirmed to be the maximum one. But for flexibility, use maximum data
47  * payload for asynchronous primary packets at S100 (Cable base rate) in
48  * IEEE Std 1394-1995.
49  */
50 #define SND_EFW_RESPONSE_MAXIMUM_BYTES	0x200U
51 
52 extern unsigned int snd_efw_resp_buf_size;
53 extern bool snd_efw_resp_buf_debug;
54 
55 struct snd_efw_phys_grp {
56 	u8 type;	/* see enum snd_efw_grp_type */
57 	u8 count;
58 } __packed;
59 
60 struct snd_efw {
61 	struct snd_card *card;
62 	struct fw_unit *unit;
63 	int card_index;
64 
65 	struct mutex mutex;
66 	spinlock_t lock;
67 
68 	/* for transaction */
69 	u32 seqnum;
70 	bool resp_addr_changable;
71 
72 	/* for quirks */
73 	bool is_af9;
74 	bool is_fireworks3;
75 	u32 firmware_version;
76 
77 	unsigned int midi_in_ports;
78 	unsigned int midi_out_ports;
79 
80 	unsigned int supported_sampling_rate;
81 	unsigned int pcm_capture_channels[SND_EFW_MULTIPLIER_MODES];
82 	unsigned int pcm_playback_channels[SND_EFW_MULTIPLIER_MODES];
83 
84 	struct amdtp_stream tx_stream;
85 	struct amdtp_stream rx_stream;
86 	struct cmp_connection out_conn;
87 	struct cmp_connection in_conn;
88 	unsigned int substreams_counter;
89 
90 	/* hardware metering parameters */
91 	unsigned int phys_out;
92 	unsigned int phys_in;
93 	unsigned int phys_out_grp_count;
94 	unsigned int phys_in_grp_count;
95 	struct snd_efw_phys_grp phys_out_grps[HWINFO_MAX_CAPS_GROUPS];
96 	struct snd_efw_phys_grp phys_in_grps[HWINFO_MAX_CAPS_GROUPS];
97 
98 	/* for uapi */
99 	int dev_lock_count;
100 	bool dev_lock_changed;
101 	wait_queue_head_t hwdep_wait;
102 
103 	/* response queue */
104 	u8 *resp_buf;
105 	u8 *pull_ptr;
106 	u8 *push_ptr;
107 
108 	struct amdtp_domain domain;
109 };
110 
111 int snd_efw_transaction_cmd(struct fw_unit *unit,
112 			    const void *cmd, unsigned int size);
113 int snd_efw_transaction_run(struct fw_unit *unit,
114 			    const void *cmd, unsigned int cmd_size,
115 			    void *resp, unsigned int resp_size);
116 int snd_efw_transaction_register(void);
117 void snd_efw_transaction_unregister(void);
118 void snd_efw_transaction_bus_reset(struct fw_unit *unit);
119 void snd_efw_transaction_add_instance(struct snd_efw *efw);
120 void snd_efw_transaction_remove_instance(struct snd_efw *efw);
121 
122 struct snd_efw_hwinfo {
123 	u32 flags;
124 	u32 guid_hi;
125 	u32 guid_lo;
126 	u32 type;
127 	u32 version;
128 	char vendor_name[HWINFO_NAME_SIZE_BYTES];
129 	char model_name[HWINFO_NAME_SIZE_BYTES];
130 	u32 supported_clocks;
131 	u32 amdtp_rx_pcm_channels;
132 	u32 amdtp_tx_pcm_channels;
133 	u32 phys_out;
134 	u32 phys_in;
135 	u32 phys_out_grp_count;
136 	struct snd_efw_phys_grp phys_out_grps[HWINFO_MAX_CAPS_GROUPS];
137 	u32 phys_in_grp_count;
138 	struct snd_efw_phys_grp phys_in_grps[HWINFO_MAX_CAPS_GROUPS];
139 	u32 midi_out_ports;
140 	u32 midi_in_ports;
141 	u32 max_sample_rate;
142 	u32 min_sample_rate;
143 	u32 dsp_version;
144 	u32 arm_version;
145 	u32 mixer_playback_channels;
146 	u32 mixer_capture_channels;
147 	u32 fpga_version;
148 	u32 amdtp_rx_pcm_channels_2x;
149 	u32 amdtp_tx_pcm_channels_2x;
150 	u32 amdtp_rx_pcm_channels_4x;
151 	u32 amdtp_tx_pcm_channels_4x;
152 	u32 reserved[16];
153 } __packed;
154 enum snd_efw_grp_type {
155 	SND_EFW_CH_TYPE_ANALOG			= 0,
156 	SND_EFW_CH_TYPE_SPDIF			= 1,
157 	SND_EFW_CH_TYPE_ADAT			= 2,
158 	SND_EFW_CH_TYPE_SPDIF_OR_ADAT		= 3,
159 	SND_EFW_CH_TYPE_ANALOG_MIRRORING	= 4,
160 	SND_EFW_CH_TYPE_HEADPHONES		= 5,
161 	SND_EFW_CH_TYPE_I2S			= 6,
162 	SND_EFW_CH_TYPE_GUITAR			= 7,
163 	SND_EFW_CH_TYPE_PIEZO_GUITAR		= 8,
164 	SND_EFW_CH_TYPE_GUITAR_STRING		= 9,
165 	SND_EFW_CH_TYPE_DUMMY
166 };
167 struct snd_efw_phys_meters {
168 	u32 status;	/* guitar state/midi signal/clock input detect */
169 	u32 reserved0;
170 	u32 reserved1;
171 	u32 reserved2;
172 	u32 reserved3;
173 	u32 out_meters;
174 	u32 in_meters;
175 	u32 reserved4;
176 	u32 reserved5;
177 	u32 values[];
178 } __packed;
179 enum snd_efw_clock_source {
180 	SND_EFW_CLOCK_SOURCE_INTERNAL	= 0,
181 	// Unused.
182 	SND_EFW_CLOCK_SOURCE_WORDCLOCK	= 2,
183 	SND_EFW_CLOCK_SOURCE_SPDIF	= 3,
184 	SND_EFW_CLOCK_SOURCE_ADAT_1	= 4,
185 	SND_EFW_CLOCK_SOURCE_ADAT_2	= 5,
186 	SND_EFW_CLOCK_SOURCE_CONTINUOUS	= 6	/* internal variable clock */
187 };
188 enum snd_efw_transport_mode {
189 	SND_EFW_TRANSPORT_MODE_WINDOWS	= 0,
190 	SND_EFW_TRANSPORT_MODE_IEC61883	= 1,
191 };
192 int snd_efw_command_set_resp_addr(struct snd_efw *efw,
193 				  u16 addr_high, u32 addr_low);
194 int snd_efw_command_set_tx_mode(struct snd_efw *efw,
195 				enum snd_efw_transport_mode mode);
196 int snd_efw_command_get_hwinfo(struct snd_efw *efw,
197 			       struct snd_efw_hwinfo *hwinfo);
198 int snd_efw_command_get_phys_meters(struct snd_efw *efw,
199 				    struct snd_efw_phys_meters *meters,
200 				    unsigned int len);
201 int snd_efw_command_get_clock_source(struct snd_efw *efw,
202 				     enum snd_efw_clock_source *source);
203 int snd_efw_command_get_sampling_rate(struct snd_efw *efw, unsigned int *rate);
204 int snd_efw_command_set_sampling_rate(struct snd_efw *efw, unsigned int rate);
205 
206 int snd_efw_stream_init_duplex(struct snd_efw *efw);
207 int snd_efw_stream_reserve_duplex(struct snd_efw *efw, unsigned int rate,
208 				  unsigned int frames_per_period,
209 				  unsigned int frames_per_buffer);
210 int snd_efw_stream_start_duplex(struct snd_efw *efw);
211 void snd_efw_stream_stop_duplex(struct snd_efw *efw);
212 void snd_efw_stream_update_duplex(struct snd_efw *efw);
213 void snd_efw_stream_destroy_duplex(struct snd_efw *efw);
214 void snd_efw_stream_lock_changed(struct snd_efw *efw);
215 int snd_efw_stream_lock_try(struct snd_efw *efw);
216 void snd_efw_stream_lock_release(struct snd_efw *efw);
217 
218 void snd_efw_proc_init(struct snd_efw *efw);
219 
220 int snd_efw_create_midi_devices(struct snd_efw *efw);
221 
222 int snd_efw_create_pcm_devices(struct snd_efw *efw);
223 int snd_efw_get_multiplier_mode(unsigned int sampling_rate, unsigned int *mode);
224 
225 int snd_efw_create_hwdep_device(struct snd_efw *efw);
226 
227 #endif
228