1077e5f4fSSamuel Holland// SPDX-License-Identifier: (GPL-2.0+ or MIT) 2077e5f4fSSamuel Holland// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org> 3077e5f4fSSamuel Holland 4077e5f4fSSamuel Holland#include <dt-bindings/clock/sun6i-rtc.h> 5077e5f4fSSamuel Holland#include <dt-bindings/clock/sun8i-de2.h> 6077e5f4fSSamuel Holland#include <dt-bindings/clock/sun8i-tcon-top.h> 7077e5f4fSSamuel Holland#include <dt-bindings/clock/sun20i-d1-ccu.h> 8077e5f4fSSamuel Holland#include <dt-bindings/clock/sun20i-d1-r-ccu.h> 9077e5f4fSSamuel Holland#include <dt-bindings/interrupt-controller/irq.h> 10077e5f4fSSamuel Holland#include <dt-bindings/reset/sun8i-de2.h> 11077e5f4fSSamuel Holland#include <dt-bindings/reset/sun20i-d1-ccu.h> 12077e5f4fSSamuel Holland#include <dt-bindings/reset/sun20i-d1-r-ccu.h> 13077e5f4fSSamuel Holland 14077e5f4fSSamuel Holland/ { 15077e5f4fSSamuel Holland #address-cells = <1>; 16077e5f4fSSamuel Holland #size-cells = <1>; 17077e5f4fSSamuel Holland 18077e5f4fSSamuel Holland dcxo: dcxo-clk { 19077e5f4fSSamuel Holland compatible = "fixed-clock"; 20077e5f4fSSamuel Holland clock-output-names = "dcxo"; 21077e5f4fSSamuel Holland #clock-cells = <0>; 22077e5f4fSSamuel Holland }; 23077e5f4fSSamuel Holland 24077e5f4fSSamuel Holland de: display-engine { 25077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-display-engine"; 26077e5f4fSSamuel Holland allwinner,pipelines = <&mixer0>, <&mixer1>; 27077e5f4fSSamuel Holland status = "disabled"; 28077e5f4fSSamuel Holland }; 29077e5f4fSSamuel Holland 30077e5f4fSSamuel Holland soc { 31077e5f4fSSamuel Holland compatible = "simple-bus"; 32077e5f4fSSamuel Holland ranges; 33077e5f4fSSamuel Holland dma-noncoherent; 34077e5f4fSSamuel Holland #address-cells = <1>; 35077e5f4fSSamuel Holland #size-cells = <1>; 36077e5f4fSSamuel Holland 37077e5f4fSSamuel Holland pio: pinctrl@2000000 { 38077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-pinctrl"; 39077e5f4fSSamuel Holland reg = <0x2000000 0x800>; 40077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(69) IRQ_TYPE_LEVEL_HIGH>, 41077e5f4fSSamuel Holland <SOC_PERIPHERAL_IRQ(71) IRQ_TYPE_LEVEL_HIGH>, 42077e5f4fSSamuel Holland <SOC_PERIPHERAL_IRQ(73) IRQ_TYPE_LEVEL_HIGH>, 43077e5f4fSSamuel Holland <SOC_PERIPHERAL_IRQ(75) IRQ_TYPE_LEVEL_HIGH>, 44077e5f4fSSamuel Holland <SOC_PERIPHERAL_IRQ(77) IRQ_TYPE_LEVEL_HIGH>, 45077e5f4fSSamuel Holland <SOC_PERIPHERAL_IRQ(79) IRQ_TYPE_LEVEL_HIGH>; 46077e5f4fSSamuel Holland clocks = <&ccu CLK_APB0>, 47077e5f4fSSamuel Holland <&dcxo>, 48077e5f4fSSamuel Holland <&rtc CLK_OSC32K>; 49077e5f4fSSamuel Holland clock-names = "apb", "hosc", "losc"; 50077e5f4fSSamuel Holland gpio-controller; 51077e5f4fSSamuel Holland interrupt-controller; 52077e5f4fSSamuel Holland #gpio-cells = <3>; 53077e5f4fSSamuel Holland #interrupt-cells = <3>; 54077e5f4fSSamuel Holland 55077e5f4fSSamuel Holland /omit-if-no-ref/ 56077e5f4fSSamuel Holland clk_pg11_pin: clk-pg11-pin { 57077e5f4fSSamuel Holland pins = "PG11"; 58077e5f4fSSamuel Holland function = "clk"; 59077e5f4fSSamuel Holland }; 60077e5f4fSSamuel Holland 61077e5f4fSSamuel Holland /omit-if-no-ref/ 62077e5f4fSSamuel Holland dsi_4lane_pins: dsi-4lane-pins { 63077e5f4fSSamuel Holland pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", 64077e5f4fSSamuel Holland "PD6", "PD7", "PD8", "PD9"; 65077e5f4fSSamuel Holland drive-strength = <30>; 66077e5f4fSSamuel Holland function = "dsi"; 67077e5f4fSSamuel Holland }; 68077e5f4fSSamuel Holland 69077e5f4fSSamuel Holland /omit-if-no-ref/ 70077e5f4fSSamuel Holland lcd_rgb666_pins: lcd-rgb666-pins { 71077e5f4fSSamuel Holland pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", 72077e5f4fSSamuel Holland "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", 73077e5f4fSSamuel Holland "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", 74077e5f4fSSamuel Holland "PD18", "PD19", "PD20", "PD21"; 75077e5f4fSSamuel Holland function = "lcd0"; 76077e5f4fSSamuel Holland }; 77077e5f4fSSamuel Holland 78077e5f4fSSamuel Holland /omit-if-no-ref/ 79077e5f4fSSamuel Holland mmc0_pins: mmc0-pins { 80077e5f4fSSamuel Holland pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; 81077e5f4fSSamuel Holland function = "mmc0"; 82077e5f4fSSamuel Holland }; 83077e5f4fSSamuel Holland 84077e5f4fSSamuel Holland /omit-if-no-ref/ 85077e5f4fSSamuel Holland mmc1_pins: mmc1-pins { 86077e5f4fSSamuel Holland pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; 87077e5f4fSSamuel Holland function = "mmc1"; 88077e5f4fSSamuel Holland }; 89077e5f4fSSamuel Holland 90077e5f4fSSamuel Holland /omit-if-no-ref/ 91077e5f4fSSamuel Holland mmc2_pins: mmc2-pins { 92077e5f4fSSamuel Holland pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; 93077e5f4fSSamuel Holland function = "mmc2"; 94077e5f4fSSamuel Holland }; 95077e5f4fSSamuel Holland 96077e5f4fSSamuel Holland /omit-if-no-ref/ 97077e5f4fSSamuel Holland rgmii_pe_pins: rgmii-pe-pins { 98077e5f4fSSamuel Holland pins = "PE0", "PE1", "PE2", "PE3", "PE4", 99077e5f4fSSamuel Holland "PE5", "PE6", "PE7", "PE8", "PE9", 100077e5f4fSSamuel Holland "PE11", "PE12", "PE13", "PE14", "PE15"; 101077e5f4fSSamuel Holland function = "emac"; 102077e5f4fSSamuel Holland }; 103077e5f4fSSamuel Holland 104077e5f4fSSamuel Holland /omit-if-no-ref/ 105077e5f4fSSamuel Holland rmii_pe_pins: rmii-pe-pins { 106077e5f4fSSamuel Holland pins = "PE0", "PE1", "PE2", "PE3", "PE4", 107077e5f4fSSamuel Holland "PE5", "PE6", "PE7", "PE8", "PE9"; 108077e5f4fSSamuel Holland function = "emac"; 109077e5f4fSSamuel Holland }; 110077e5f4fSSamuel Holland 111077e5f4fSSamuel Holland /omit-if-no-ref/ 112c1b2093dSMaksim Kiselev spi0_pins: spi0-pins { 113c1b2093dSMaksim Kiselev pins = "PC2", "PC3", "PC4", "PC5"; 114c1b2093dSMaksim Kiselev function = "spi0"; 115c1b2093dSMaksim Kiselev }; 116c1b2093dSMaksim Kiselev 117c1b2093dSMaksim Kiselev /omit-if-no-ref/ 118077e5f4fSSamuel Holland uart1_pg6_pins: uart1-pg6-pins { 119077e5f4fSSamuel Holland pins = "PG6", "PG7"; 120077e5f4fSSamuel Holland function = "uart1"; 121077e5f4fSSamuel Holland }; 122077e5f4fSSamuel Holland 123077e5f4fSSamuel Holland /omit-if-no-ref/ 124077e5f4fSSamuel Holland uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { 125077e5f4fSSamuel Holland pins = "PG8", "PG9"; 126077e5f4fSSamuel Holland function = "uart1"; 127077e5f4fSSamuel Holland }; 128077e5f4fSSamuel Holland 129077e5f4fSSamuel Holland /omit-if-no-ref/ 130077e5f4fSSamuel Holland uart3_pb_pins: uart3-pb-pins { 131077e5f4fSSamuel Holland pins = "PB6", "PB7"; 132077e5f4fSSamuel Holland function = "uart3"; 133077e5f4fSSamuel Holland }; 134077e5f4fSSamuel Holland }; 135077e5f4fSSamuel Holland 136077e5f4fSSamuel Holland ccu: clock-controller@2001000 { 137077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-ccu"; 138077e5f4fSSamuel Holland reg = <0x2001000 0x1000>; 139077e5f4fSSamuel Holland clocks = <&dcxo>, 140077e5f4fSSamuel Holland <&rtc CLK_OSC32K>, 141077e5f4fSSamuel Holland <&rtc CLK_IOSC>; 142077e5f4fSSamuel Holland clock-names = "hosc", "losc", "iosc"; 143077e5f4fSSamuel Holland #clock-cells = <1>; 144077e5f4fSSamuel Holland #reset-cells = <1>; 145077e5f4fSSamuel Holland }; 146077e5f4fSSamuel Holland 147*d0d73ee5SMaksim Kiselev gpadc: adc@2009000 { 148*d0d73ee5SMaksim Kiselev compatible = "allwinner,sun20i-d1-gpadc"; 149*d0d73ee5SMaksim Kiselev reg = <0x2009000 0x400>; 150*d0d73ee5SMaksim Kiselev clocks = <&ccu CLK_BUS_GPADC>; 151*d0d73ee5SMaksim Kiselev resets = <&ccu RST_BUS_GPADC>; 152*d0d73ee5SMaksim Kiselev interrupts = <SOC_PERIPHERAL_IRQ(57) IRQ_TYPE_LEVEL_HIGH>; 153*d0d73ee5SMaksim Kiselev status = "disabled"; 154*d0d73ee5SMaksim Kiselev #io-channel-cells = <1>; 155*d0d73ee5SMaksim Kiselev }; 156*d0d73ee5SMaksim Kiselev 157077e5f4fSSamuel Holland dmic: dmic@2031000 { 158077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-dmic", 159077e5f4fSSamuel Holland "allwinner,sun50i-h6-dmic"; 160077e5f4fSSamuel Holland reg = <0x2031000 0x400>; 161077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(24) IRQ_TYPE_LEVEL_HIGH>; 162077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_DMIC>, 163077e5f4fSSamuel Holland <&ccu CLK_DMIC>; 164077e5f4fSSamuel Holland clock-names = "bus", "mod"; 165077e5f4fSSamuel Holland resets = <&ccu RST_BUS_DMIC>; 166077e5f4fSSamuel Holland dmas = <&dma 8>; 167077e5f4fSSamuel Holland dma-names = "rx"; 168077e5f4fSSamuel Holland status = "disabled"; 169077e5f4fSSamuel Holland #sound-dai-cells = <0>; 170077e5f4fSSamuel Holland }; 171077e5f4fSSamuel Holland 172077e5f4fSSamuel Holland i2s1: i2s@2033000 { 173077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2s", 174077e5f4fSSamuel Holland "allwinner,sun50i-r329-i2s"; 175077e5f4fSSamuel Holland reg = <0x2033000 0x1000>; 176077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(27) IRQ_TYPE_LEVEL_HIGH>; 177077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2S1>, 178077e5f4fSSamuel Holland <&ccu CLK_I2S1>; 179077e5f4fSSamuel Holland clock-names = "apb", "mod"; 180077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2S1>; 181077e5f4fSSamuel Holland dmas = <&dma 4>, <&dma 4>; 182077e5f4fSSamuel Holland dma-names = "rx", "tx"; 183077e5f4fSSamuel Holland status = "disabled"; 184077e5f4fSSamuel Holland #sound-dai-cells = <0>; 185077e5f4fSSamuel Holland }; 186077e5f4fSSamuel Holland 187077e5f4fSSamuel Holland i2s2: i2s@2034000 { 188077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2s", 189077e5f4fSSamuel Holland "allwinner,sun50i-r329-i2s"; 190077e5f4fSSamuel Holland reg = <0x2034000 0x1000>; 191077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(28) IRQ_TYPE_LEVEL_HIGH>; 192077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2S2>, 193077e5f4fSSamuel Holland <&ccu CLK_I2S2>; 194077e5f4fSSamuel Holland clock-names = "apb", "mod"; 195077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2S2>; 196077e5f4fSSamuel Holland dmas = <&dma 5>, <&dma 5>; 197077e5f4fSSamuel Holland dma-names = "rx", "tx"; 198077e5f4fSSamuel Holland status = "disabled"; 199077e5f4fSSamuel Holland #sound-dai-cells = <0>; 200077e5f4fSSamuel Holland }; 201077e5f4fSSamuel Holland 202077e5f4fSSamuel Holland timer: timer@2050000 { 203077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-timer", 204077e5f4fSSamuel Holland "allwinner,sun8i-a23-timer"; 205077e5f4fSSamuel Holland reg = <0x2050000 0xa0>; 206077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(59) IRQ_TYPE_LEVEL_HIGH>, 207077e5f4fSSamuel Holland <SOC_PERIPHERAL_IRQ(60) IRQ_TYPE_LEVEL_HIGH>; 208077e5f4fSSamuel Holland clocks = <&dcxo>; 209077e5f4fSSamuel Holland }; 210077e5f4fSSamuel Holland 211077e5f4fSSamuel Holland wdt: watchdog@20500a0 { 212077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-wdt-reset", 213077e5f4fSSamuel Holland "allwinner,sun20i-d1-wdt"; 214077e5f4fSSamuel Holland reg = <0x20500a0 0x20>; 215077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(63) IRQ_TYPE_LEVEL_HIGH>; 216077e5f4fSSamuel Holland clocks = <&dcxo>, <&rtc CLK_OSC32K>; 217077e5f4fSSamuel Holland clock-names = "hosc", "losc"; 218077e5f4fSSamuel Holland status = "reserved"; 219077e5f4fSSamuel Holland }; 220077e5f4fSSamuel Holland 221077e5f4fSSamuel Holland uart0: serial@2500000 { 222077e5f4fSSamuel Holland compatible = "snps,dw-apb-uart"; 223077e5f4fSSamuel Holland reg = <0x2500000 0x400>; 224077e5f4fSSamuel Holland reg-io-width = <4>; 225077e5f4fSSamuel Holland reg-shift = <2>; 226077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(2) IRQ_TYPE_LEVEL_HIGH>; 227077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_UART0>; 228077e5f4fSSamuel Holland resets = <&ccu RST_BUS_UART0>; 229077e5f4fSSamuel Holland dmas = <&dma 14>, <&dma 14>; 230a140b18fSCristian Ciocaltea dma-names = "tx", "rx"; 231077e5f4fSSamuel Holland status = "disabled"; 232077e5f4fSSamuel Holland }; 233077e5f4fSSamuel Holland 234077e5f4fSSamuel Holland uart1: serial@2500400 { 235077e5f4fSSamuel Holland compatible = "snps,dw-apb-uart"; 236077e5f4fSSamuel Holland reg = <0x2500400 0x400>; 237077e5f4fSSamuel Holland reg-io-width = <4>; 238077e5f4fSSamuel Holland reg-shift = <2>; 239077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(3) IRQ_TYPE_LEVEL_HIGH>; 240077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_UART1>; 241077e5f4fSSamuel Holland resets = <&ccu RST_BUS_UART1>; 242077e5f4fSSamuel Holland dmas = <&dma 15>, <&dma 15>; 243a140b18fSCristian Ciocaltea dma-names = "tx", "rx"; 244077e5f4fSSamuel Holland status = "disabled"; 245077e5f4fSSamuel Holland }; 246077e5f4fSSamuel Holland 247077e5f4fSSamuel Holland uart2: serial@2500800 { 248077e5f4fSSamuel Holland compatible = "snps,dw-apb-uart"; 249077e5f4fSSamuel Holland reg = <0x2500800 0x400>; 250077e5f4fSSamuel Holland reg-io-width = <4>; 251077e5f4fSSamuel Holland reg-shift = <2>; 252077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(4) IRQ_TYPE_LEVEL_HIGH>; 253077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_UART2>; 254077e5f4fSSamuel Holland resets = <&ccu RST_BUS_UART2>; 255077e5f4fSSamuel Holland dmas = <&dma 16>, <&dma 16>; 256a140b18fSCristian Ciocaltea dma-names = "tx", "rx"; 257077e5f4fSSamuel Holland status = "disabled"; 258077e5f4fSSamuel Holland }; 259077e5f4fSSamuel Holland 260077e5f4fSSamuel Holland uart3: serial@2500c00 { 261077e5f4fSSamuel Holland compatible = "snps,dw-apb-uart"; 262077e5f4fSSamuel Holland reg = <0x2500c00 0x400>; 263077e5f4fSSamuel Holland reg-io-width = <4>; 264077e5f4fSSamuel Holland reg-shift = <2>; 265077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(5) IRQ_TYPE_LEVEL_HIGH>; 266077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_UART3>; 267077e5f4fSSamuel Holland resets = <&ccu RST_BUS_UART3>; 268077e5f4fSSamuel Holland dmas = <&dma 17>, <&dma 17>; 269a140b18fSCristian Ciocaltea dma-names = "tx", "rx"; 270077e5f4fSSamuel Holland status = "disabled"; 271077e5f4fSSamuel Holland }; 272077e5f4fSSamuel Holland 273077e5f4fSSamuel Holland uart4: serial@2501000 { 274077e5f4fSSamuel Holland compatible = "snps,dw-apb-uart"; 275077e5f4fSSamuel Holland reg = <0x2501000 0x400>; 276077e5f4fSSamuel Holland reg-io-width = <4>; 277077e5f4fSSamuel Holland reg-shift = <2>; 278077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(6) IRQ_TYPE_LEVEL_HIGH>; 279077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_UART4>; 280077e5f4fSSamuel Holland resets = <&ccu RST_BUS_UART4>; 281077e5f4fSSamuel Holland dmas = <&dma 18>, <&dma 18>; 282a140b18fSCristian Ciocaltea dma-names = "tx", "rx"; 283077e5f4fSSamuel Holland status = "disabled"; 284077e5f4fSSamuel Holland }; 285077e5f4fSSamuel Holland 286077e5f4fSSamuel Holland uart5: serial@2501400 { 287077e5f4fSSamuel Holland compatible = "snps,dw-apb-uart"; 288077e5f4fSSamuel Holland reg = <0x2501400 0x400>; 289077e5f4fSSamuel Holland reg-io-width = <4>; 290077e5f4fSSamuel Holland reg-shift = <2>; 291077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(7) IRQ_TYPE_LEVEL_HIGH>; 292077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_UART5>; 293077e5f4fSSamuel Holland resets = <&ccu RST_BUS_UART5>; 294077e5f4fSSamuel Holland dmas = <&dma 19>, <&dma 19>; 295a140b18fSCristian Ciocaltea dma-names = "tx", "rx"; 296077e5f4fSSamuel Holland status = "disabled"; 297077e5f4fSSamuel Holland }; 298077e5f4fSSamuel Holland 299077e5f4fSSamuel Holland i2c0: i2c@2502000 { 300077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2c", 301077e5f4fSSamuel Holland "allwinner,sun8i-v536-i2c", 302077e5f4fSSamuel Holland "allwinner,sun6i-a31-i2c"; 303077e5f4fSSamuel Holland reg = <0x2502000 0x400>; 304077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(9) IRQ_TYPE_LEVEL_HIGH>; 305077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2C0>; 306077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2C0>; 307077e5f4fSSamuel Holland dmas = <&dma 43>, <&dma 43>; 308077e5f4fSSamuel Holland dma-names = "rx", "tx"; 309077e5f4fSSamuel Holland status = "disabled"; 310077e5f4fSSamuel Holland #address-cells = <1>; 311077e5f4fSSamuel Holland #size-cells = <0>; 312077e5f4fSSamuel Holland }; 313077e5f4fSSamuel Holland 314077e5f4fSSamuel Holland i2c1: i2c@2502400 { 315077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2c", 316077e5f4fSSamuel Holland "allwinner,sun8i-v536-i2c", 317077e5f4fSSamuel Holland "allwinner,sun6i-a31-i2c"; 318077e5f4fSSamuel Holland reg = <0x2502400 0x400>; 319077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(10) IRQ_TYPE_LEVEL_HIGH>; 320077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2C1>; 321077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2C1>; 322077e5f4fSSamuel Holland dmas = <&dma 44>, <&dma 44>; 323077e5f4fSSamuel Holland dma-names = "rx", "tx"; 324077e5f4fSSamuel Holland status = "disabled"; 325077e5f4fSSamuel Holland #address-cells = <1>; 326077e5f4fSSamuel Holland #size-cells = <0>; 327077e5f4fSSamuel Holland }; 328077e5f4fSSamuel Holland 329077e5f4fSSamuel Holland i2c2: i2c@2502800 { 330077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2c", 331077e5f4fSSamuel Holland "allwinner,sun8i-v536-i2c", 332077e5f4fSSamuel Holland "allwinner,sun6i-a31-i2c"; 333077e5f4fSSamuel Holland reg = <0x2502800 0x400>; 334077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(11) IRQ_TYPE_LEVEL_HIGH>; 335077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2C2>; 336077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2C2>; 337077e5f4fSSamuel Holland dmas = <&dma 45>, <&dma 45>; 338077e5f4fSSamuel Holland dma-names = "rx", "tx"; 339077e5f4fSSamuel Holland status = "disabled"; 340077e5f4fSSamuel Holland #address-cells = <1>; 341077e5f4fSSamuel Holland #size-cells = <0>; 342077e5f4fSSamuel Holland }; 343077e5f4fSSamuel Holland 344077e5f4fSSamuel Holland i2c3: i2c@2502c00 { 345077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2c", 346077e5f4fSSamuel Holland "allwinner,sun8i-v536-i2c", 347077e5f4fSSamuel Holland "allwinner,sun6i-a31-i2c"; 348077e5f4fSSamuel Holland reg = <0x2502c00 0x400>; 349077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(12) IRQ_TYPE_LEVEL_HIGH>; 350077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2C3>; 351077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2C3>; 352077e5f4fSSamuel Holland dmas = <&dma 46>, <&dma 46>; 353077e5f4fSSamuel Holland dma-names = "rx", "tx"; 354077e5f4fSSamuel Holland status = "disabled"; 355077e5f4fSSamuel Holland #address-cells = <1>; 356077e5f4fSSamuel Holland #size-cells = <0>; 357077e5f4fSSamuel Holland }; 358077e5f4fSSamuel Holland 359077e5f4fSSamuel Holland syscon: syscon@3000000 { 360077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-system-control"; 361077e5f4fSSamuel Holland reg = <0x3000000 0x1000>; 362077e5f4fSSamuel Holland ranges; 363077e5f4fSSamuel Holland #address-cells = <1>; 364077e5f4fSSamuel Holland #size-cells = <1>; 365077e5f4fSSamuel Holland }; 366077e5f4fSSamuel Holland 367077e5f4fSSamuel Holland dma: dma-controller@3002000 { 368077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-dma"; 369077e5f4fSSamuel Holland reg = <0x3002000 0x1000>; 370077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(50) IRQ_TYPE_LEVEL_HIGH>; 371077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; 372077e5f4fSSamuel Holland clock-names = "bus", "mbus"; 373077e5f4fSSamuel Holland resets = <&ccu RST_BUS_DMA>; 374077e5f4fSSamuel Holland dma-channels = <16>; 375077e5f4fSSamuel Holland dma-requests = <48>; 376077e5f4fSSamuel Holland #dma-cells = <1>; 377077e5f4fSSamuel Holland }; 378077e5f4fSSamuel Holland 379077e5f4fSSamuel Holland sid: efuse@3006000 { 380077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-sid"; 381077e5f4fSSamuel Holland reg = <0x3006000 0x1000>; 382077e5f4fSSamuel Holland #address-cells = <1>; 383077e5f4fSSamuel Holland #size-cells = <1>; 384077e5f4fSSamuel Holland }; 385077e5f4fSSamuel Holland 3869ebdff9aSSamuel Holland crypto: crypto@3040000 { 3879ebdff9aSSamuel Holland compatible = "allwinner,sun20i-d1-crypto"; 3889ebdff9aSSamuel Holland reg = <0x3040000 0x800>; 3899ebdff9aSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(52) IRQ_TYPE_LEVEL_HIGH>; 3909ebdff9aSSamuel Holland clocks = <&ccu CLK_BUS_CE>, 3919ebdff9aSSamuel Holland <&ccu CLK_CE>, 3929ebdff9aSSamuel Holland <&ccu CLK_MBUS_CE>, 3939ebdff9aSSamuel Holland <&rtc CLK_IOSC>; 3949ebdff9aSSamuel Holland clock-names = "bus", "mod", "ram", "trng"; 3959ebdff9aSSamuel Holland resets = <&ccu RST_BUS_CE>; 3969ebdff9aSSamuel Holland }; 3979ebdff9aSSamuel Holland 398077e5f4fSSamuel Holland mbus: dram-controller@3102000 { 399077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-mbus"; 400077e5f4fSSamuel Holland reg = <0x3102000 0x1000>, 401077e5f4fSSamuel Holland <0x3103000 0x1000>; 402077e5f4fSSamuel Holland reg-names = "mbus", "dram"; 403077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(43) IRQ_TYPE_LEVEL_HIGH>; 404077e5f4fSSamuel Holland clocks = <&ccu CLK_MBUS>, 405077e5f4fSSamuel Holland <&ccu CLK_DRAM>, 406077e5f4fSSamuel Holland <&ccu CLK_BUS_DRAM>; 407077e5f4fSSamuel Holland clock-names = "mbus", "dram", "bus"; 408077e5f4fSSamuel Holland dma-ranges = <0 0x40000000 0x80000000>; 409077e5f4fSSamuel Holland #address-cells = <1>; 410077e5f4fSSamuel Holland #size-cells = <1>; 411077e5f4fSSamuel Holland #interconnect-cells = <1>; 412077e5f4fSSamuel Holland }; 413077e5f4fSSamuel Holland 414077e5f4fSSamuel Holland mmc0: mmc@4020000 { 415077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-mmc"; 416077e5f4fSSamuel Holland reg = <0x4020000 0x1000>; 417077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(40) IRQ_TYPE_LEVEL_HIGH>; 418077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; 419077e5f4fSSamuel Holland clock-names = "ahb", "mmc"; 420077e5f4fSSamuel Holland resets = <&ccu RST_BUS_MMC0>; 421077e5f4fSSamuel Holland reset-names = "ahb"; 422077e5f4fSSamuel Holland cap-sd-highspeed; 423077e5f4fSSamuel Holland max-frequency = <150000000>; 424077e5f4fSSamuel Holland no-mmc; 425077e5f4fSSamuel Holland status = "disabled"; 426077e5f4fSSamuel Holland #address-cells = <1>; 427077e5f4fSSamuel Holland #size-cells = <0>; 428077e5f4fSSamuel Holland }; 429077e5f4fSSamuel Holland 430077e5f4fSSamuel Holland mmc1: mmc@4021000 { 431077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-mmc"; 432077e5f4fSSamuel Holland reg = <0x4021000 0x1000>; 433077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(41) IRQ_TYPE_LEVEL_HIGH>; 434077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; 435077e5f4fSSamuel Holland clock-names = "ahb", "mmc"; 436077e5f4fSSamuel Holland resets = <&ccu RST_BUS_MMC1>; 437077e5f4fSSamuel Holland reset-names = "ahb"; 438077e5f4fSSamuel Holland cap-sd-highspeed; 439077e5f4fSSamuel Holland max-frequency = <150000000>; 440077e5f4fSSamuel Holland no-mmc; 441077e5f4fSSamuel Holland status = "disabled"; 442077e5f4fSSamuel Holland #address-cells = <1>; 443077e5f4fSSamuel Holland #size-cells = <0>; 444077e5f4fSSamuel Holland }; 445077e5f4fSSamuel Holland 446077e5f4fSSamuel Holland mmc2: mmc@4022000 { 447077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-emmc", 448077e5f4fSSamuel Holland "allwinner,sun50i-a100-emmc"; 449077e5f4fSSamuel Holland reg = <0x4022000 0x1000>; 450077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(42) IRQ_TYPE_LEVEL_HIGH>; 451077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; 452077e5f4fSSamuel Holland clock-names = "ahb", "mmc"; 453077e5f4fSSamuel Holland resets = <&ccu RST_BUS_MMC2>; 454077e5f4fSSamuel Holland reset-names = "ahb"; 455077e5f4fSSamuel Holland cap-mmc-highspeed; 456077e5f4fSSamuel Holland max-frequency = <150000000>; 457077e5f4fSSamuel Holland mmc-ddr-1_8v; 458077e5f4fSSamuel Holland mmc-ddr-3_3v; 459077e5f4fSSamuel Holland no-sd; 460077e5f4fSSamuel Holland no-sdio; 461077e5f4fSSamuel Holland status = "disabled"; 462077e5f4fSSamuel Holland #address-cells = <1>; 463077e5f4fSSamuel Holland #size-cells = <0>; 464077e5f4fSSamuel Holland }; 465077e5f4fSSamuel Holland 466c1b2093dSMaksim Kiselev spi0: spi@4025000 { 467c1b2093dSMaksim Kiselev compatible = "allwinner,sun20i-d1-spi", 468c1b2093dSMaksim Kiselev "allwinner,sun50i-r329-spi"; 469c1b2093dSMaksim Kiselev reg = <0x04025000 0x1000>; 470c1b2093dSMaksim Kiselev interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>; 471c1b2093dSMaksim Kiselev clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; 472c1b2093dSMaksim Kiselev clock-names = "ahb", "mod"; 473c1b2093dSMaksim Kiselev dmas = <&dma 22>, <&dma 22>; 474c1b2093dSMaksim Kiselev dma-names = "rx", "tx"; 475c1b2093dSMaksim Kiselev resets = <&ccu RST_BUS_SPI0>; 476c1b2093dSMaksim Kiselev status = "disabled"; 477c1b2093dSMaksim Kiselev #address-cells = <1>; 478c1b2093dSMaksim Kiselev #size-cells = <0>; 479c1b2093dSMaksim Kiselev }; 480c1b2093dSMaksim Kiselev 481c1b2093dSMaksim Kiselev spi1: spi@4026000 { 482c1b2093dSMaksim Kiselev compatible = "allwinner,sun20i-d1-spi-dbi", 483c1b2093dSMaksim Kiselev "allwinner,sun50i-r329-spi-dbi", 484c1b2093dSMaksim Kiselev "allwinner,sun50i-r329-spi"; 485c1b2093dSMaksim Kiselev reg = <0x04026000 0x1000>; 486c1b2093dSMaksim Kiselev interrupts = <SOC_PERIPHERAL_IRQ(16) IRQ_TYPE_LEVEL_HIGH>; 487c1b2093dSMaksim Kiselev clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; 488c1b2093dSMaksim Kiselev clock-names = "ahb", "mod"; 489c1b2093dSMaksim Kiselev dmas = <&dma 23>, <&dma 23>; 490c1b2093dSMaksim Kiselev dma-names = "rx", "tx"; 491c1b2093dSMaksim Kiselev resets = <&ccu RST_BUS_SPI1>; 492c1b2093dSMaksim Kiselev status = "disabled"; 493c1b2093dSMaksim Kiselev #address-cells = <1>; 494c1b2093dSMaksim Kiselev #size-cells = <0>; 495c1b2093dSMaksim Kiselev }; 496c1b2093dSMaksim Kiselev 497077e5f4fSSamuel Holland usb_otg: usb@4100000 { 498077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-musb", 499077e5f4fSSamuel Holland "allwinner,sun8i-a33-musb"; 500077e5f4fSSamuel Holland reg = <0x4100000 0x400>; 501077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(29) IRQ_TYPE_LEVEL_HIGH>; 502077e5f4fSSamuel Holland interrupt-names = "mc"; 503077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_OTG>; 504077e5f4fSSamuel Holland resets = <&ccu RST_BUS_OTG>; 505077e5f4fSSamuel Holland extcon = <&usbphy 0>; 506077e5f4fSSamuel Holland phys = <&usbphy 0>; 507077e5f4fSSamuel Holland phy-names = "usb"; 508077e5f4fSSamuel Holland status = "disabled"; 509077e5f4fSSamuel Holland }; 510077e5f4fSSamuel Holland 511077e5f4fSSamuel Holland usbphy: phy@4100400 { 512077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-usb-phy"; 513077e5f4fSSamuel Holland reg = <0x4100400 0x100>, 514077e5f4fSSamuel Holland <0x4101800 0x100>, 515077e5f4fSSamuel Holland <0x4200800 0x100>; 516077e5f4fSSamuel Holland reg-names = "phy_ctrl", 517077e5f4fSSamuel Holland "pmu0", 518077e5f4fSSamuel Holland "pmu1"; 519077e5f4fSSamuel Holland clocks = <&dcxo>, 520077e5f4fSSamuel Holland <&dcxo>; 521077e5f4fSSamuel Holland clock-names = "usb0_phy", 522077e5f4fSSamuel Holland "usb1_phy"; 523077e5f4fSSamuel Holland resets = <&ccu RST_USB_PHY0>, 524077e5f4fSSamuel Holland <&ccu RST_USB_PHY1>; 525077e5f4fSSamuel Holland reset-names = "usb0_reset", 526077e5f4fSSamuel Holland "usb1_reset"; 527077e5f4fSSamuel Holland status = "disabled"; 528077e5f4fSSamuel Holland #phy-cells = <1>; 529077e5f4fSSamuel Holland }; 530077e5f4fSSamuel Holland 531077e5f4fSSamuel Holland ehci0: usb@4101000 { 532077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-ehci", 533077e5f4fSSamuel Holland "generic-ehci"; 534077e5f4fSSamuel Holland reg = <0x4101000 0x100>; 535077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(30) IRQ_TYPE_LEVEL_HIGH>; 536077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_OHCI0>, 537077e5f4fSSamuel Holland <&ccu CLK_BUS_EHCI0>, 538077e5f4fSSamuel Holland <&ccu CLK_USB_OHCI0>; 539077e5f4fSSamuel Holland resets = <&ccu RST_BUS_OHCI0>, 540077e5f4fSSamuel Holland <&ccu RST_BUS_EHCI0>; 541077e5f4fSSamuel Holland phys = <&usbphy 0>; 542077e5f4fSSamuel Holland phy-names = "usb"; 543077e5f4fSSamuel Holland status = "disabled"; 544077e5f4fSSamuel Holland }; 545077e5f4fSSamuel Holland 546077e5f4fSSamuel Holland ohci0: usb@4101400 { 547077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-ohci", 548077e5f4fSSamuel Holland "generic-ohci"; 549077e5f4fSSamuel Holland reg = <0x4101400 0x100>; 550077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(31) IRQ_TYPE_LEVEL_HIGH>; 551077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_OHCI0>, 552077e5f4fSSamuel Holland <&ccu CLK_USB_OHCI0>; 553077e5f4fSSamuel Holland resets = <&ccu RST_BUS_OHCI0>; 554077e5f4fSSamuel Holland phys = <&usbphy 0>; 555077e5f4fSSamuel Holland phy-names = "usb"; 556077e5f4fSSamuel Holland status = "disabled"; 557077e5f4fSSamuel Holland }; 558077e5f4fSSamuel Holland 559077e5f4fSSamuel Holland ehci1: usb@4200000 { 560077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-ehci", 561077e5f4fSSamuel Holland "generic-ehci"; 562077e5f4fSSamuel Holland reg = <0x4200000 0x100>; 563077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(33) IRQ_TYPE_LEVEL_HIGH>; 564077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_OHCI1>, 565077e5f4fSSamuel Holland <&ccu CLK_BUS_EHCI1>, 566077e5f4fSSamuel Holland <&ccu CLK_USB_OHCI1>; 567077e5f4fSSamuel Holland resets = <&ccu RST_BUS_OHCI1>, 568077e5f4fSSamuel Holland <&ccu RST_BUS_EHCI1>; 569077e5f4fSSamuel Holland phys = <&usbphy 1>; 570077e5f4fSSamuel Holland phy-names = "usb"; 571077e5f4fSSamuel Holland status = "disabled"; 572077e5f4fSSamuel Holland }; 573077e5f4fSSamuel Holland 574077e5f4fSSamuel Holland ohci1: usb@4200400 { 575077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-ohci", 576077e5f4fSSamuel Holland "generic-ohci"; 577077e5f4fSSamuel Holland reg = <0x4200400 0x100>; 578077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(34) IRQ_TYPE_LEVEL_HIGH>; 579077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_OHCI1>, 580077e5f4fSSamuel Holland <&ccu CLK_USB_OHCI1>; 581077e5f4fSSamuel Holland resets = <&ccu RST_BUS_OHCI1>; 582077e5f4fSSamuel Holland phys = <&usbphy 1>; 583077e5f4fSSamuel Holland phy-names = "usb"; 584077e5f4fSSamuel Holland status = "disabled"; 585077e5f4fSSamuel Holland }; 586077e5f4fSSamuel Holland 587077e5f4fSSamuel Holland emac: ethernet@4500000 { 588077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-emac", 589077e5f4fSSamuel Holland "allwinner,sun50i-a64-emac"; 590077e5f4fSSamuel Holland reg = <0x4500000 0x10000>; 591077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(46) IRQ_TYPE_LEVEL_HIGH>; 592077e5f4fSSamuel Holland interrupt-names = "macirq"; 593077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_EMAC>; 594077e5f4fSSamuel Holland clock-names = "stmmaceth"; 595077e5f4fSSamuel Holland resets = <&ccu RST_BUS_EMAC>; 596077e5f4fSSamuel Holland reset-names = "stmmaceth"; 597077e5f4fSSamuel Holland syscon = <&syscon>; 598077e5f4fSSamuel Holland status = "disabled"; 599077e5f4fSSamuel Holland 600077e5f4fSSamuel Holland mdio: mdio { 601077e5f4fSSamuel Holland compatible = "snps,dwmac-mdio"; 602077e5f4fSSamuel Holland #address-cells = <1>; 603077e5f4fSSamuel Holland #size-cells = <0>; 604077e5f4fSSamuel Holland }; 605077e5f4fSSamuel Holland }; 606077e5f4fSSamuel Holland 607077e5f4fSSamuel Holland display_clocks: clock-controller@5000000 { 608077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-de2-clk", 609077e5f4fSSamuel Holland "allwinner,sun50i-h5-de2-clk"; 610077e5f4fSSamuel Holland reg = <0x5000000 0x10000>; 611077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>; 612077e5f4fSSamuel Holland clock-names = "bus", "mod"; 613077e5f4fSSamuel Holland resets = <&ccu RST_BUS_DE>; 614077e5f4fSSamuel Holland #clock-cells = <1>; 615077e5f4fSSamuel Holland #reset-cells = <1>; 616077e5f4fSSamuel Holland }; 617077e5f4fSSamuel Holland 618077e5f4fSSamuel Holland mixer0: mixer@5100000 { 619077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-de2-mixer-0"; 620077e5f4fSSamuel Holland reg = <0x5100000 0x100000>; 621077e5f4fSSamuel Holland clocks = <&display_clocks CLK_BUS_MIXER0>, 622077e5f4fSSamuel Holland <&display_clocks CLK_MIXER0>; 623077e5f4fSSamuel Holland clock-names = "bus", "mod"; 624077e5f4fSSamuel Holland resets = <&display_clocks RST_MIXER0>; 625077e5f4fSSamuel Holland 626077e5f4fSSamuel Holland ports { 627077e5f4fSSamuel Holland #address-cells = <1>; 628077e5f4fSSamuel Holland #size-cells = <0>; 629077e5f4fSSamuel Holland 630077e5f4fSSamuel Holland mixer0_out: port@1 { 631077e5f4fSSamuel Holland reg = <1>; 632077e5f4fSSamuel Holland 633077e5f4fSSamuel Holland mixer0_out_tcon_top_mixer0: endpoint { 634077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_mixer0_in_mixer0>; 635077e5f4fSSamuel Holland }; 636077e5f4fSSamuel Holland }; 637077e5f4fSSamuel Holland }; 638077e5f4fSSamuel Holland }; 639077e5f4fSSamuel Holland 640077e5f4fSSamuel Holland mixer1: mixer@5200000 { 641077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-de2-mixer-1"; 642077e5f4fSSamuel Holland reg = <0x5200000 0x100000>; 643077e5f4fSSamuel Holland clocks = <&display_clocks CLK_BUS_MIXER1>, 644077e5f4fSSamuel Holland <&display_clocks CLK_MIXER1>; 645077e5f4fSSamuel Holland clock-names = "bus", "mod"; 646077e5f4fSSamuel Holland resets = <&display_clocks RST_MIXER1>; 647077e5f4fSSamuel Holland 648077e5f4fSSamuel Holland ports { 649077e5f4fSSamuel Holland #address-cells = <1>; 650077e5f4fSSamuel Holland #size-cells = <0>; 651077e5f4fSSamuel Holland 652077e5f4fSSamuel Holland mixer1_out: port@1 { 653077e5f4fSSamuel Holland reg = <1>; 654077e5f4fSSamuel Holland 655077e5f4fSSamuel Holland mixer1_out_tcon_top_mixer1: endpoint { 656077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_mixer1_in_mixer1>; 657077e5f4fSSamuel Holland }; 658077e5f4fSSamuel Holland }; 659077e5f4fSSamuel Holland }; 660077e5f4fSSamuel Holland }; 661077e5f4fSSamuel Holland 662077e5f4fSSamuel Holland dsi: dsi@5450000 { 663077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-mipi-dsi", 664077e5f4fSSamuel Holland "allwinner,sun50i-a100-mipi-dsi"; 665077e5f4fSSamuel Holland reg = <0x5450000 0x1000>; 666077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(92) IRQ_TYPE_LEVEL_HIGH>; 667077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_MIPI_DSI>, 668077e5f4fSSamuel Holland <&tcon_top CLK_TCON_TOP_DSI>; 669077e5f4fSSamuel Holland clock-names = "bus", "mod"; 670077e5f4fSSamuel Holland resets = <&ccu RST_BUS_MIPI_DSI>; 671077e5f4fSSamuel Holland phys = <&dphy>; 672077e5f4fSSamuel Holland phy-names = "dphy"; 673077e5f4fSSamuel Holland status = "disabled"; 674077e5f4fSSamuel Holland 675077e5f4fSSamuel Holland port { 676077e5f4fSSamuel Holland dsi_in_tcon_lcd0: endpoint { 677077e5f4fSSamuel Holland remote-endpoint = <&tcon_lcd0_out_dsi>; 678077e5f4fSSamuel Holland }; 679077e5f4fSSamuel Holland }; 680077e5f4fSSamuel Holland }; 681077e5f4fSSamuel Holland 682077e5f4fSSamuel Holland dphy: phy@5451000 { 683077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-mipi-dphy", 684077e5f4fSSamuel Holland "allwinner,sun50i-a100-mipi-dphy"; 685077e5f4fSSamuel Holland reg = <0x5451000 0x1000>; 686077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(92) IRQ_TYPE_LEVEL_HIGH>; 687077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_MIPI_DSI>, 688077e5f4fSSamuel Holland <&ccu CLK_MIPI_DSI>; 689077e5f4fSSamuel Holland clock-names = "bus", "mod"; 690077e5f4fSSamuel Holland resets = <&ccu RST_BUS_MIPI_DSI>; 691077e5f4fSSamuel Holland #phy-cells = <0>; 692077e5f4fSSamuel Holland }; 693077e5f4fSSamuel Holland 694077e5f4fSSamuel Holland tcon_top: tcon-top@5460000 { 695077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-tcon-top"; 696077e5f4fSSamuel Holland reg = <0x5460000 0x1000>; 697077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_DPSS_TOP>, 698077e5f4fSSamuel Holland <&ccu CLK_TCON_TV>, 699077e5f4fSSamuel Holland <&ccu CLK_TVE>, 700077e5f4fSSamuel Holland <&ccu CLK_TCON_LCD0>; 701077e5f4fSSamuel Holland clock-names = "bus", "tcon-tv0", "tve0", "dsi"; 702077e5f4fSSamuel Holland clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; 703077e5f4fSSamuel Holland resets = <&ccu RST_BUS_DPSS_TOP>; 704077e5f4fSSamuel Holland #clock-cells = <1>; 705077e5f4fSSamuel Holland 706077e5f4fSSamuel Holland ports { 707077e5f4fSSamuel Holland #address-cells = <1>; 708077e5f4fSSamuel Holland #size-cells = <0>; 709077e5f4fSSamuel Holland 710077e5f4fSSamuel Holland tcon_top_mixer0_in: port@0 { 711077e5f4fSSamuel Holland reg = <0>; 712077e5f4fSSamuel Holland 713077e5f4fSSamuel Holland tcon_top_mixer0_in_mixer0: endpoint { 714077e5f4fSSamuel Holland remote-endpoint = <&mixer0_out_tcon_top_mixer0>; 715077e5f4fSSamuel Holland }; 716077e5f4fSSamuel Holland }; 717077e5f4fSSamuel Holland 718077e5f4fSSamuel Holland tcon_top_mixer0_out: port@1 { 719077e5f4fSSamuel Holland reg = <1>; 720077e5f4fSSamuel Holland #address-cells = <1>; 721077e5f4fSSamuel Holland #size-cells = <0>; 722077e5f4fSSamuel Holland 723077e5f4fSSamuel Holland tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { 724077e5f4fSSamuel Holland reg = <0>; 725077e5f4fSSamuel Holland remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; 726077e5f4fSSamuel Holland }; 727077e5f4fSSamuel Holland 728077e5f4fSSamuel Holland tcon_top_mixer0_out_tcon_tv0: endpoint@2 { 729077e5f4fSSamuel Holland reg = <2>; 730077e5f4fSSamuel Holland remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; 731077e5f4fSSamuel Holland }; 732077e5f4fSSamuel Holland }; 733077e5f4fSSamuel Holland 734077e5f4fSSamuel Holland tcon_top_mixer1_in: port@2 { 735077e5f4fSSamuel Holland reg = <2>; 736077e5f4fSSamuel Holland #address-cells = <1>; 737077e5f4fSSamuel Holland #size-cells = <0>; 738077e5f4fSSamuel Holland 739077e5f4fSSamuel Holland tcon_top_mixer1_in_mixer1: endpoint@1 { 740077e5f4fSSamuel Holland reg = <1>; 741077e5f4fSSamuel Holland remote-endpoint = <&mixer1_out_tcon_top_mixer1>; 742077e5f4fSSamuel Holland }; 743077e5f4fSSamuel Holland }; 744077e5f4fSSamuel Holland 745077e5f4fSSamuel Holland tcon_top_mixer1_out: port@3 { 746077e5f4fSSamuel Holland reg = <3>; 747077e5f4fSSamuel Holland #address-cells = <1>; 748077e5f4fSSamuel Holland #size-cells = <0>; 749077e5f4fSSamuel Holland 750077e5f4fSSamuel Holland tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { 751077e5f4fSSamuel Holland reg = <0>; 752077e5f4fSSamuel Holland remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; 753077e5f4fSSamuel Holland }; 754077e5f4fSSamuel Holland 755077e5f4fSSamuel Holland tcon_top_mixer1_out_tcon_tv0: endpoint@2 { 756077e5f4fSSamuel Holland reg = <2>; 757077e5f4fSSamuel Holland remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; 758077e5f4fSSamuel Holland }; 759077e5f4fSSamuel Holland }; 760077e5f4fSSamuel Holland 761077e5f4fSSamuel Holland tcon_top_hdmi_in: port@4 { 762077e5f4fSSamuel Holland reg = <4>; 763077e5f4fSSamuel Holland 764077e5f4fSSamuel Holland tcon_top_hdmi_in_tcon_tv0: endpoint { 765077e5f4fSSamuel Holland remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; 766077e5f4fSSamuel Holland }; 767077e5f4fSSamuel Holland }; 768077e5f4fSSamuel Holland 769077e5f4fSSamuel Holland tcon_top_hdmi_out: port@5 { 770077e5f4fSSamuel Holland reg = <5>; 771077e5f4fSSamuel Holland }; 772077e5f4fSSamuel Holland }; 773077e5f4fSSamuel Holland }; 774077e5f4fSSamuel Holland 775077e5f4fSSamuel Holland tcon_lcd0: lcd-controller@5461000 { 776077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-tcon-lcd"; 777077e5f4fSSamuel Holland reg = <0x5461000 0x1000>; 778077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(90) IRQ_TYPE_LEVEL_HIGH>; 779077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_TCON_LCD0>, 780077e5f4fSSamuel Holland <&ccu CLK_TCON_LCD0>; 781077e5f4fSSamuel Holland clock-names = "ahb", "tcon-ch0"; 782077e5f4fSSamuel Holland clock-output-names = "tcon-pixel-clock"; 783077e5f4fSSamuel Holland resets = <&ccu RST_BUS_TCON_LCD0>, 784077e5f4fSSamuel Holland <&ccu RST_BUS_LVDS0>; 785077e5f4fSSamuel Holland reset-names = "lcd", "lvds"; 786077e5f4fSSamuel Holland #clock-cells = <0>; 787077e5f4fSSamuel Holland 788077e5f4fSSamuel Holland ports { 789077e5f4fSSamuel Holland #address-cells = <1>; 790077e5f4fSSamuel Holland #size-cells = <0>; 791077e5f4fSSamuel Holland 792077e5f4fSSamuel Holland tcon_lcd0_in: port@0 { 793077e5f4fSSamuel Holland reg = <0>; 794077e5f4fSSamuel Holland #address-cells = <1>; 795077e5f4fSSamuel Holland #size-cells = <0>; 796077e5f4fSSamuel Holland 797077e5f4fSSamuel Holland tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { 798077e5f4fSSamuel Holland reg = <0>; 799077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; 800077e5f4fSSamuel Holland }; 801077e5f4fSSamuel Holland 802077e5f4fSSamuel Holland tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { 803077e5f4fSSamuel Holland reg = <1>; 804077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; 805077e5f4fSSamuel Holland }; 806077e5f4fSSamuel Holland }; 807077e5f4fSSamuel Holland 808077e5f4fSSamuel Holland tcon_lcd0_out: port@1 { 809077e5f4fSSamuel Holland reg = <1>; 810077e5f4fSSamuel Holland #address-cells = <1>; 811077e5f4fSSamuel Holland #size-cells = <0>; 812077e5f4fSSamuel Holland 813077e5f4fSSamuel Holland tcon_lcd0_out_dsi: endpoint@1 { 814077e5f4fSSamuel Holland reg = <1>; 815077e5f4fSSamuel Holland remote-endpoint = <&dsi_in_tcon_lcd0>; 816077e5f4fSSamuel Holland }; 817077e5f4fSSamuel Holland }; 818077e5f4fSSamuel Holland }; 819077e5f4fSSamuel Holland }; 820077e5f4fSSamuel Holland 821077e5f4fSSamuel Holland tcon_tv0: lcd-controller@5470000 { 822077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-tcon-tv"; 823077e5f4fSSamuel Holland reg = <0x5470000 0x1000>; 824077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(91) IRQ_TYPE_LEVEL_HIGH>; 825077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_TCON_TV>, 826077e5f4fSSamuel Holland <&tcon_top CLK_TCON_TOP_TV0>; 827077e5f4fSSamuel Holland clock-names = "ahb", "tcon-ch1"; 828077e5f4fSSamuel Holland resets = <&ccu RST_BUS_TCON_TV>; 829077e5f4fSSamuel Holland reset-names = "lcd"; 830077e5f4fSSamuel Holland 831077e5f4fSSamuel Holland ports { 832077e5f4fSSamuel Holland #address-cells = <1>; 833077e5f4fSSamuel Holland #size-cells = <0>; 834077e5f4fSSamuel Holland 835077e5f4fSSamuel Holland tcon_tv0_in: port@0 { 836077e5f4fSSamuel Holland reg = <0>; 837077e5f4fSSamuel Holland #address-cells = <1>; 838077e5f4fSSamuel Holland #size-cells = <0>; 839077e5f4fSSamuel Holland 840077e5f4fSSamuel Holland tcon_tv0_in_tcon_top_mixer0: endpoint@0 { 841077e5f4fSSamuel Holland reg = <0>; 842077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; 843077e5f4fSSamuel Holland }; 844077e5f4fSSamuel Holland 845077e5f4fSSamuel Holland tcon_tv0_in_tcon_top_mixer1: endpoint@1 { 846077e5f4fSSamuel Holland reg = <1>; 847077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; 848077e5f4fSSamuel Holland }; 849077e5f4fSSamuel Holland }; 850077e5f4fSSamuel Holland 851077e5f4fSSamuel Holland tcon_tv0_out: port@1 { 852077e5f4fSSamuel Holland reg = <1>; 853077e5f4fSSamuel Holland 854077e5f4fSSamuel Holland tcon_tv0_out_tcon_top_hdmi: endpoint { 855077e5f4fSSamuel Holland remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; 856077e5f4fSSamuel Holland }; 857077e5f4fSSamuel Holland }; 858077e5f4fSSamuel Holland }; 859077e5f4fSSamuel Holland }; 860077e5f4fSSamuel Holland 861dca36f7bSSamuel Holland ppu: power-controller@7001000 { 862dca36f7bSSamuel Holland compatible = "allwinner,sun20i-d1-ppu"; 863dca36f7bSSamuel Holland reg = <0x7001000 0x1000>; 864dca36f7bSSamuel Holland clocks = <&r_ccu CLK_BUS_R_PPU>; 865dca36f7bSSamuel Holland resets = <&r_ccu RST_BUS_R_PPU>; 866dca36f7bSSamuel Holland #power-domain-cells = <1>; 867dca36f7bSSamuel Holland }; 868dca36f7bSSamuel Holland 869077e5f4fSSamuel Holland r_ccu: clock-controller@7010000 { 870077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-r-ccu"; 871077e5f4fSSamuel Holland reg = <0x7010000 0x400>; 872077e5f4fSSamuel Holland clocks = <&dcxo>, 873077e5f4fSSamuel Holland <&rtc CLK_OSC32K>, 874077e5f4fSSamuel Holland <&rtc CLK_IOSC>, 875077e5f4fSSamuel Holland <&ccu CLK_PLL_PERIPH0_DIV3>; 876077e5f4fSSamuel Holland clock-names = "hosc", "losc", "iosc", "pll-periph"; 877077e5f4fSSamuel Holland #clock-cells = <1>; 878077e5f4fSSamuel Holland #reset-cells = <1>; 879077e5f4fSSamuel Holland }; 880077e5f4fSSamuel Holland 881077e5f4fSSamuel Holland rtc: rtc@7090000 { 882077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-rtc", 883077e5f4fSSamuel Holland "allwinner,sun50i-r329-rtc"; 884077e5f4fSSamuel Holland reg = <0x7090000 0x400>; 885077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(144) IRQ_TYPE_LEVEL_HIGH>; 886077e5f4fSSamuel Holland clocks = <&r_ccu CLK_BUS_R_RTC>, 887077e5f4fSSamuel Holland <&dcxo>, 888077e5f4fSSamuel Holland <&r_ccu CLK_R_AHB>; 889077e5f4fSSamuel Holland clock-names = "bus", "hosc", "ahb"; 890077e5f4fSSamuel Holland #clock-cells = <1>; 891077e5f4fSSamuel Holland }; 892077e5f4fSSamuel Holland }; 893077e5f4fSSamuel Holland}; 894