1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Design Files: https://www.ti.com/lit/zip/SPRR466
6 * TRM: https://www.ti.com/lit/zip/spruj52
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/net/ti-dp83867.h>
12#include <dt-bindings/gpio/gpio.h>
13#include "k3-j784s4.dtsi"
14
15/ {
16	compatible = "ti,am69-sk", "ti,j784s4";
17	model = "Texas Instruments AM69 SK";
18
19	chosen {
20		stdout-path = "serial2:115200n8";
21	};
22
23	aliases {
24		serial0 = &wkup_uart0;
25		serial1 = &mcu_uart0;
26		serial2 = &main_uart8;
27		mmc0 = &main_sdhci0;
28		mmc1 = &main_sdhci1;
29		i2c0 = &wkup_i2c0;
30		i2c3 = &main_i2c0;
31		ethernet0 = &mcu_cpsw_port1;
32	};
33
34	memory@80000000 {
35		device_type = "memory";
36		/* 32G RAM */
37		reg = <0x00 0x80000000 0x00 0x80000000>,
38		      <0x08 0x80000000 0x07 0x80000000>;
39	};
40
41	reserved_memory: reserved-memory {
42		#address-cells = <2>;
43		#size-cells = <2>;
44		ranges;
45
46		secure_ddr: optee@9e800000 {
47			reg = <0x00 0x9e800000 0x00 0x01800000>;
48			no-map;
49		};
50	};
51
52	vusb_main: regulator-vusb-main5v0 {
53		/* USB MAIN INPUT 5V DC */
54		compatible = "regulator-fixed";
55		regulator-name = "vusb-main5v0";
56		regulator-min-microvolt = <5000000>;
57		regulator-max-microvolt = <5000000>;
58		regulator-always-on;
59		regulator-boot-on;
60	};
61
62	vsys_5v0: regulator-vsys5v0 {
63		/* Output of LM61460 */
64		compatible = "regulator-fixed";
65		regulator-name = "vsys_5v0";
66		regulator-min-microvolt = <5000000>;
67		regulator-max-microvolt = <5000000>;
68		vin-supply = <&vusb_main>;
69		regulator-always-on;
70		regulator-boot-on;
71	};
72
73	vsys_3v3: regulator-vsys3v3 {
74		/* Output of LM5143 */
75		compatible = "regulator-fixed";
76		regulator-name = "vsys_3v3";
77		regulator-min-microvolt = <3300000>;
78		regulator-max-microvolt = <3300000>;
79		vin-supply = <&vusb_main>;
80		regulator-always-on;
81		regulator-boot-on;
82	};
83
84	vdd_mmc1: regulator-sd {
85		/* Output of TPS22918 */
86		compatible = "regulator-fixed";
87		regulator-name = "vdd_mmc1";
88		regulator-min-microvolt = <3300000>;
89		regulator-max-microvolt = <3300000>;
90		regulator-boot-on;
91		enable-active-high;
92		vin-supply = <&vsys_3v3>;
93		gpio = <&exp1 2 GPIO_ACTIVE_HIGH>;
94	};
95
96	vdd_sd_dv: regulator-tlv71033 {
97		/* Output of TLV71033 */
98		compatible = "regulator-gpio";
99		regulator-name = "tlv71033";
100		pinctrl-names = "default";
101		pinctrl-0 = <&vdd_sd_dv_pins_default>;
102		regulator-min-microvolt = <1800000>;
103		regulator-max-microvolt = <3300000>;
104		regulator-boot-on;
105		vin-supply = <&vsys_5v0>;
106		gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
107		states = <1800000 0x0>,
108			 <3300000 0x1>;
109	};
110};
111
112&main_pmx0 {
113	main_uart8_pins_default: main-uart8-pins-default {
114		pinctrl-single,pins = <
115			J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */
116			J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */
117		>;
118	};
119
120	main_i2c0_pins_default: main-i2c0-pins-default {
121		pinctrl-single,pins = <
122			J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
123			J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
124		>;
125	};
126
127	main_mmc1_pins_default: main-mmc1-pins-default {
128		pinctrl-single,pins = <
129			J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
130			J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
131			J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */
132			J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */
133			J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */
134			J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */
135			J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */
136			J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */
137		>;
138	};
139
140	vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
141		pinctrl-single,pins = <
142			J784S4_IOPAD(0x0C4, PIN_INPUT, 7) /* (AD36) ECAP0_IN_APWM_OUT.GPIO0_49 */
143		>;
144	};
145};
146
147&wkup_pmx2 {
148	wkup_uart0_pins_default: wkup-uart0-pins-default {
149		pinctrl-single,pins = <
150			J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
151			J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
152			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
153			J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
154		>;
155	};
156
157	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
158		pinctrl-single,pins = <
159			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
160			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
161		>;
162	};
163
164	mcu_uart0_pins_default: mcu-uart0-pins-default {
165		pinctrl-single,pins = <
166			J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (K38) WKUP_GPIO0_13.MCU_UART0_RXD */
167			J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (J37) WKUP_GPIO0_12.MCU_UART0_TXD */
168		>;
169	};
170
171	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
172		pinctrl-single,pins = <
173			J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
174			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
175			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
176			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
177			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
178			J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
179			J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
180			J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
181			J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
182			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
183			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
184			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
185		>;
186	};
187
188	mcu_mdio_pins_default: mcu-mdio-pins-default {
189		pinctrl-single,pins = <
190			J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
191			J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
192		>;
193	};
194};
195
196&wkup_uart0 {
197	/* Firmware usage */
198	status = "reserved";
199	pinctrl-names = "default";
200	pinctrl-0 = <&wkup_uart0_pins_default>;
201};
202
203&wkup_i2c0 {
204	status = "okay";
205	pinctrl-names = "default";
206	pinctrl-0 = <&wkup_i2c0_pins_default>;
207	clock-frequency = <400000>;
208
209	eeprom@51 {
210		/* AT24C512C-MAHM-T */
211		compatible = "atmel,24c512";
212		reg = <0x51>;
213	};
214};
215
216&mcu_uart0 {
217	status = "okay";
218	pinctrl-names = "default";
219	pinctrl-0 = <&mcu_uart0_pins_default>;
220};
221
222&main_uart8 {
223	status = "okay";
224	pinctrl-names = "default";
225	pinctrl-0 = <&main_uart8_pins_default>;
226};
227
228&main_i2c0 {
229	status = "okay";
230	pinctrl-names = "default";
231	pinctrl-0 = <&main_i2c0_pins_default>;
232	clock-frequency = <400000>;
233
234	exp1: gpio@21 {
235		compatible = "ti,tca6416";
236		reg = <0x21>;
237		gpio-controller;
238		#gpio-cells = <2>;
239		gpio-line-names	= "BOARDID_EEPROM_WP", "CAN_STB", "GPIO_uSD_PWR_EN",
240				"IO_EXP_MCU_RGMII_RST#", "IO_EXP_PCIe0_4L_PERST#",
241				"IO_EXP_PCIe1_M.2_RTSz", "IO_EXP_PCIe3_M.2_RTSz",
242				"PM_INA_BUS_EN", "ENET1_EXP_PWRDN", "EXP1_ENET_RSTz",
243				"ENET1_I2CMUX_SEL", "PCIe0_CLKREQ#", "PCIe1_M.2_CLKREQ#",
244				"PCIe3_M2_CLKREQ#", "PCIe0_PRSNT2#_1", "PCIe0_PRSNT2#_2";
245	};
246};
247
248&main_sdhci0 {
249	/* eMMC */
250	status = "okay";
251	non-removable;
252	ti,driver-strength-ohm = <50>;
253	disable-wp;
254};
255
256&main_sdhci1 {
257	/* SD card */
258	status = "okay";
259	pinctrl-0 = <&main_mmc1_pins_default>;
260	pinctrl-names = "default";
261	disable-wp;
262	vmmc-supply = <&vdd_mmc1>;
263	vqmmc-supply = <&vdd_sd_dv>;
264};
265
266&main_gpio0 {
267	status = "okay";
268};
269
270&mcu_cpsw {
271	status = "okay";
272	pinctrl-names = "default";
273	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
274};
275
276&davinci_mdio {
277	mcu_phy0: ethernet-phy@0 {
278		reg = <0>;
279		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
280		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
281		ti,min-output-impedance;
282	};
283};
284
285&mcu_cpsw_port1 {
286	status = "okay";
287	phy-mode = "rgmii-rxid";
288	phy-handle = <&mcu_phy0>;
289};
290