17109d817SMarek Behún// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
27109d817SMarek Behún/*
37109d817SMarek Behún * Device Tree file for CZ.NIC Turris Mox Board
4b37c3848SMarek Behún * 2019 by Marek Behún <kabel@kernel.org>
57109d817SMarek Behún */
67109d817SMarek Behún
77109d817SMarek Behún/dts-v1/;
87109d817SMarek Behún
97109d817SMarek Behún#include <dt-bindings/bus/moxtet.h>
107109d817SMarek Behún#include <dt-bindings/gpio/gpio.h>
117109d817SMarek Behún#include <dt-bindings/input/input.h>
127109d817SMarek Behún#include "armada-372x.dtsi"
137109d817SMarek Behún
147109d817SMarek Behún/ {
157109d817SMarek Behún	model = "CZ.NIC Turris Mox Board";
167109d817SMarek Behún	compatible = "cznic,turris-mox", "marvell,armada3720",
177109d817SMarek Behún		     "marvell,armada3710";
187109d817SMarek Behún
197109d817SMarek Behún	aliases {
207109d817SMarek Behún		spi0 = &spi0;
217109d817SMarek Behún		ethernet1 = &eth1;
22923f9892SVladimir Oltean		mmc0 = &sdhci0;
23923f9892SVladimir Oltean		mmc1 = &sdhci1;
247109d817SMarek Behún	};
257109d817SMarek Behún
267109d817SMarek Behún	chosen {
277109d817SMarek Behún		stdout-path = "serial0:115200n8";
287109d817SMarek Behún	};
297109d817SMarek Behún
307109d817SMarek Behún	memory@0 {
317109d817SMarek Behún		device_type = "memory";
327109d817SMarek Behún		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
337109d817SMarek Behún	};
347109d817SMarek Behún
357109d817SMarek Behún	leds {
367109d817SMarek Behún		compatible = "gpio-leds";
377109d817SMarek Behún		red {
387109d817SMarek Behún			label = "mox:red:activity";
397109d817SMarek Behún			gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>;
407109d817SMarek Behún			linux,default-trigger = "default-on";
417109d817SMarek Behún		};
427109d817SMarek Behún	};
437109d817SMarek Behún
447109d817SMarek Behún	gpio-keys {
457109d817SMarek Behún		compatible = "gpio-keys";
467109d817SMarek Behún
477109d817SMarek Behún		reset {
487109d817SMarek Behún			label = "reset";
497109d817SMarek Behún			linux,code = <KEY_RESTART>;
507109d817SMarek Behún			gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>;
517109d817SMarek Behún			debounce-interval = <60>;
527109d817SMarek Behún		};
537109d817SMarek Behún	};
547109d817SMarek Behún
557109d817SMarek Behún	exp_usb3_vbus: usb3-vbus {
567109d817SMarek Behún		compatible = "regulator-fixed";
577109d817SMarek Behún		regulator-name = "usb3-vbus";
587109d817SMarek Behún		regulator-min-microvolt = <5000000>;
597109d817SMarek Behún		regulator-max-microvolt = <5000000>;
607109d817SMarek Behún		enable-active-high;
617109d817SMarek Behún		regulator-always-on;
627109d817SMarek Behún		gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
637109d817SMarek Behún	};
647109d817SMarek Behún
657109d817SMarek Behún	vsdc_reg: vsdc-reg {
667109d817SMarek Behún		compatible = "regulator-gpio";
677109d817SMarek Behún		regulator-name = "vsdc";
687109d817SMarek Behún		regulator-min-microvolt = <1800000>;
697109d817SMarek Behún		regulator-max-microvolt = <3300000>;
707109d817SMarek Behún		regulator-boot-on;
717109d817SMarek Behún
727109d817SMarek Behún		gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
737109d817SMarek Behún		gpios-states = <0>;
747109d817SMarek Behún		states = <1800000 0x1
757109d817SMarek Behún			  3300000 0x0>;
767109d817SMarek Behún		enable-active-high;
777109d817SMarek Behún	};
787109d817SMarek Behún
797109d817SMarek Behún	vsdio_reg: vsdio-reg {
807109d817SMarek Behún		compatible = "regulator-gpio";
817109d817SMarek Behún		regulator-name = "vsdio";
827109d817SMarek Behún		regulator-min-microvolt = <1800000>;
837109d817SMarek Behún		regulator-max-microvolt = <3300000>;
847109d817SMarek Behún		regulator-boot-on;
857109d817SMarek Behún
867109d817SMarek Behún		gpios = <&gpiosb 22 GPIO_ACTIVE_HIGH>;
877109d817SMarek Behún		gpios-states = <0>;
887109d817SMarek Behún		states = <1800000 0x1
897109d817SMarek Behún			  3300000 0x0>;
907109d817SMarek Behún		enable-active-high;
917109d817SMarek Behún	};
927109d817SMarek Behún
937109d817SMarek Behún	sdhci1_pwrseq: sdhci1-pwrseq {
947109d817SMarek Behún		compatible = "mmc-pwrseq-simple";
957109d817SMarek Behún		reset-gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
967109d817SMarek Behún		status = "okay";
977109d817SMarek Behún	};
987109d817SMarek Behún
997109d817SMarek Behún	sfp: sfp {
100c2671acbSMarek Behún		compatible = "sff,sfp";
1017109d817SMarek Behún		i2c-bus = <&i2c0>;
1027109d817SMarek Behún		los-gpio = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>;
1037109d817SMarek Behún		tx-fault-gpio = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>;
1047109d817SMarek Behún		mod-def0-gpio = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>;
1057109d817SMarek Behún		tx-disable-gpio = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>;
1067109d817SMarek Behún		rate-select0-gpio = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>;
107a2081c09SMarek Behún		maximum-power-milliwatt = <3000>;
1087109d817SMarek Behún
1097109d817SMarek Behún		/* enabled by U-Boot if SFP module is present */
1107109d817SMarek Behún		status = "disabled";
1117109d817SMarek Behún	};
11246d2f6d0SMarek Behún
11346d2f6d0SMarek Behún	firmware {
1143a52a489SPali Rohár		armada-3700-rwtm {
1153a52a489SPali Rohár			compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm";
11646d2f6d0SMarek Behún		};
11746d2f6d0SMarek Behún	};
1187109d817SMarek Behún};
1197109d817SMarek Behún
1207109d817SMarek Behún&i2c0 {
1217109d817SMarek Behún	pinctrl-names = "default";
1227109d817SMarek Behún	pinctrl-0 = <&i2c1_pins>;
1237109d817SMarek Behún	clock-frequency = <100000>;
124*ee7ab3f2SPali Rohár	/delete-property/ mrvl,i2c-fast-mode;
1257109d817SMarek Behún	status = "okay";
1267109d817SMarek Behún
1277109d817SMarek Behún	rtc@6f {
1287109d817SMarek Behún		compatible = "microchip,mcp7940x";
1297109d817SMarek Behún		reg = <0x6f>;
1307109d817SMarek Behún	};
1317109d817SMarek Behún};
1327109d817SMarek Behún
1337109d817SMarek Behún&pcie0 {
1347109d817SMarek Behún	pinctrl-names = "default";
1357109d817SMarek Behún	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
1367109d817SMarek Behún	status = "okay";
1377109d817SMarek Behún	reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
1387109d817SMarek Behún
1397109d817SMarek Behún	/* enabled by U-Boot if PCIe module is present */
1407109d817SMarek Behún	status = "disabled";
1417109d817SMarek Behún};
1427109d817SMarek Behún
1437109d817SMarek Behún&uart0 {
1447109d817SMarek Behún	status = "okay";
1457109d817SMarek Behún};
1467109d817SMarek Behún
1477109d817SMarek Behún&eth0 {
1487109d817SMarek Behún	pinctrl-names = "default";
1497109d817SMarek Behún	pinctrl-0 = <&rgmii_pins>;
1507109d817SMarek Behún	phy-mode = "rgmii-id";
1513aa669a9SMarek Behún	phy-handle = <&phy1>;
1527109d817SMarek Behún	status = "okay";
1537109d817SMarek Behún};
1547109d817SMarek Behún
1557109d817SMarek Behún&eth1 {
1567109d817SMarek Behún	phy-mode = "2500base-x";
1577109d817SMarek Behún	managed = "in-band-status";
1587109d817SMarek Behún	phys = <&comphy0 1>;
1597109d817SMarek Behún};
1607109d817SMarek Behún
1617109d817SMarek Behún&sdhci0 {
1627109d817SMarek Behún	wp-inverted;
1637109d817SMarek Behún	bus-width = <4>;
1647109d817SMarek Behún	cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>;
1657109d817SMarek Behún	vqmmc-supply = <&vsdc_reg>;
1667109d817SMarek Behún	marvell,pad-type = "sd";
1677109d817SMarek Behún	status = "okay";
1687109d817SMarek Behún};
1697109d817SMarek Behún
1707109d817SMarek Behún&sdhci1 {
1717109d817SMarek Behún	pinctrl-names = "default";
1727109d817SMarek Behún	pinctrl-0 = <&sdio_pins>;
1737109d817SMarek Behún	non-removable;
1747109d817SMarek Behún	bus-width = <4>;
1757109d817SMarek Behún	marvell,pad-type = "sd";
1767109d817SMarek Behún	vqmmc-supply = <&vsdio_reg>;
1777109d817SMarek Behún	mmc-pwrseq = <&sdhci1_pwrseq>;
1787a2c36b0SMarek Behún	/* forbid SDR104 for FCC purposes */
1797a2c36b0SMarek Behún	sdhci-caps-mask = <0x2 0x0>;
1807109d817SMarek Behún	status = "okay";
1817109d817SMarek Behún};
1827109d817SMarek Behún
1837109d817SMarek Behún&spi0 {
1847109d817SMarek Behún	status = "okay";
1857109d817SMarek Behún	pinctrl-names = "default";
1867109d817SMarek Behún	pinctrl-0 = <&spi_quad_pins &spi_cs1_pins>;
1877109d817SMarek Behún	assigned-clocks = <&nb_periph_clk 7>;
1887109d817SMarek Behún	assigned-clock-parents = <&tbg 1>;
1897109d817SMarek Behún	assigned-clock-rates = <20000000>;
1907109d817SMarek Behún
1917109d817SMarek Behún	spi-flash@0 {
1927109d817SMarek Behún		#address-cells = <1>;
1937109d817SMarek Behún		#size-cells = <1>;
1947109d817SMarek Behún		compatible = "jedec,spi-nor";
1957109d817SMarek Behún		reg = <0>;
1967109d817SMarek Behún		spi-max-frequency = <20000000>;
1977109d817SMarek Behún
1987109d817SMarek Behún		partitions {
1997109d817SMarek Behún			compatible = "fixed-partitions";
2007109d817SMarek Behún			#address-cells = <1>;
2017109d817SMarek Behún			#size-cells = <1>;
2027109d817SMarek Behún
2037109d817SMarek Behún			partition@0 {
2047109d817SMarek Behún				label = "secure-firmware";
2057109d817SMarek Behún				reg = <0x0 0x20000>;
2067109d817SMarek Behún			};
2077109d817SMarek Behún
2087109d817SMarek Behún			partition@20000 {
209a9d9bfcaSMarek Behún				label = "a53-firmware";
2107109d817SMarek Behún				reg = <0x20000 0x160000>;
2117109d817SMarek Behún			};
2127109d817SMarek Behún
2137109d817SMarek Behún			partition@180000 {
2147109d817SMarek Behún				label = "u-boot-env";
2157109d817SMarek Behún				reg = <0x180000 0x10000>;
2167109d817SMarek Behún			};
2177109d817SMarek Behún
2187109d817SMarek Behún			partition@190000 {
2197109d817SMarek Behún				label = "Rescue system";
2207109d817SMarek Behún				reg = <0x190000 0x660000>;
2217109d817SMarek Behún			};
2227109d817SMarek Behún
2237109d817SMarek Behún			partition@7f0000 {
2247109d817SMarek Behún				label = "dtb";
2257109d817SMarek Behún				reg = <0x7f0000 0x10000>;
2267109d817SMarek Behún			};
2277109d817SMarek Behún		};
2287109d817SMarek Behún	};
2297109d817SMarek Behún
2307109d817SMarek Behún	moxtet: moxtet@1 {
2317109d817SMarek Behún		#address-cells = <1>;
2327109d817SMarek Behún		#size-cells = <0>;
2337109d817SMarek Behún		compatible = "cznic,moxtet";
2347109d817SMarek Behún		reg = <1>;
2357109d817SMarek Behún		reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
2367109d817SMarek Behún		spi-max-frequency = <10000000>;
2377109d817SMarek Behún		spi-cpol;
2387109d817SMarek Behún		spi-cpha;
2397109d817SMarek Behún		interrupt-controller;
2407109d817SMarek Behún		#interrupt-cells = <1>;
2417109d817SMarek Behún		interrupt-parent = <&gpiosb>;
2427109d817SMarek Behún		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
2437109d817SMarek Behún		status = "okay";
2447109d817SMarek Behún
2457109d817SMarek Behún		moxtet_sfp: gpio@0 {
2467109d817SMarek Behún			compatible = "cznic,moxtet-gpio";
2477109d817SMarek Behún			gpio-controller;
2487109d817SMarek Behún			#gpio-cells = <2>;
2497109d817SMarek Behún			reg = <0>;
2507109d817SMarek Behún			status = "disabled";
2517109d817SMarek Behún		};
2527109d817SMarek Behún	};
2537109d817SMarek Behún};
2547109d817SMarek Behún
2557109d817SMarek Behún&usb2 {
2567109d817SMarek Behún	status = "okay";
2577109d817SMarek Behún};
2587109d817SMarek Behún
259187c195aSMarek Behún&comphy2 {
260187c195aSMarek Behún	connector {
261187c195aSMarek Behún		compatible = "usb-a-connector";
262187c195aSMarek Behún		phy-supply = <&exp_usb3_vbus>;
263187c195aSMarek Behún	};
264187c195aSMarek Behún};
265187c195aSMarek Behún
2667109d817SMarek Behún&usb3 {
2677109d817SMarek Behún	status = "okay";
2687109d817SMarek Behún	phys = <&comphy2 0>;
2697109d817SMarek Behún};
2707109d817SMarek Behún
2717109d817SMarek Behún&mdio {
2727109d817SMarek Behún	pinctrl-names = "default";
2737109d817SMarek Behún	pinctrl-0 = <&smi_pins>;
2747109d817SMarek Behún	status = "okay";
2757109d817SMarek Behún
2767109d817SMarek Behún	phy1: ethernet-phy@1 {
2777109d817SMarek Behún		reg = <1>;
2787109d817SMarek Behún	};
2797109d817SMarek Behún
2807109d817SMarek Behún	/* switch nodes are enabled by U-Boot if modules are present */
2817109d817SMarek Behún	switch0@10 {
2827109d817SMarek Behún		compatible = "marvell,mv88e6190";
2837109d817SMarek Behún		reg = <0x10 0>;
2847109d817SMarek Behún		dsa,member = <0 0>;
2857109d817SMarek Behún		interrupt-parent = <&moxtet>;
2867109d817SMarek Behún		interrupts = <MOXTET_IRQ_PERIDOT(0)>;
2877109d817SMarek Behún		status = "disabled";
2887109d817SMarek Behún
2897109d817SMarek Behún		mdio {
2907109d817SMarek Behún			#address-cells = <1>;
2917109d817SMarek Behún			#size-cells = <0>;
2927109d817SMarek Behún
2937109d817SMarek Behún			switch0phy1: switch0phy1@1 {
2947109d817SMarek Behún				reg = <0x1>;
2957109d817SMarek Behún			};
2967109d817SMarek Behún
2977109d817SMarek Behún			switch0phy2: switch0phy2@2 {
2987109d817SMarek Behún				reg = <0x2>;
2997109d817SMarek Behún			};
3007109d817SMarek Behún
3017109d817SMarek Behún			switch0phy3: switch0phy3@3 {
3027109d817SMarek Behún				reg = <0x3>;
3037109d817SMarek Behún			};
3047109d817SMarek Behún
3057109d817SMarek Behún			switch0phy4: switch0phy4@4 {
3067109d817SMarek Behún				reg = <0x4>;
3077109d817SMarek Behún			};
3087109d817SMarek Behún
3097109d817SMarek Behún			switch0phy5: switch0phy5@5 {
3107109d817SMarek Behún				reg = <0x5>;
3117109d817SMarek Behún			};
3127109d817SMarek Behún
3137109d817SMarek Behún			switch0phy6: switch0phy6@6 {
3147109d817SMarek Behún				reg = <0x6>;
3157109d817SMarek Behún			};
3167109d817SMarek Behún
3177109d817SMarek Behún			switch0phy7: switch0phy7@7 {
3187109d817SMarek Behún				reg = <0x7>;
3197109d817SMarek Behún			};
3207109d817SMarek Behún
3217109d817SMarek Behún			switch0phy8: switch0phy8@8 {
3227109d817SMarek Behún				reg = <0x8>;
3237109d817SMarek Behún			};
3247109d817SMarek Behún		};
3257109d817SMarek Behún
3267109d817SMarek Behún		ports {
3277109d817SMarek Behún			#address-cells = <1>;
3287109d817SMarek Behún			#size-cells = <0>;
3297109d817SMarek Behún
3307109d817SMarek Behún			port@1 {
3317109d817SMarek Behún				reg = <0x1>;
3327109d817SMarek Behún				label = "lan1";
3337109d817SMarek Behún				phy-handle = <&switch0phy1>;
3347109d817SMarek Behún			};
3357109d817SMarek Behún
3367109d817SMarek Behún			port@2 {
3377109d817SMarek Behún				reg = <0x2>;
3387109d817SMarek Behún				label = "lan2";
3397109d817SMarek Behún				phy-handle = <&switch0phy2>;
3407109d817SMarek Behún			};
3417109d817SMarek Behún
3427109d817SMarek Behún			port@3 {
3437109d817SMarek Behún				reg = <0x3>;
3447109d817SMarek Behún				label = "lan3";
3457109d817SMarek Behún				phy-handle = <&switch0phy3>;
3467109d817SMarek Behún			};
3477109d817SMarek Behún
3487109d817SMarek Behún			port@4 {
3497109d817SMarek Behún				reg = <0x4>;
3507109d817SMarek Behún				label = "lan4";
3517109d817SMarek Behún				phy-handle = <&switch0phy4>;
3527109d817SMarek Behún			};
3537109d817SMarek Behún
3547109d817SMarek Behún			port@5 {
3557109d817SMarek Behún				reg = <0x5>;
3567109d817SMarek Behún				label = "lan5";
3577109d817SMarek Behún				phy-handle = <&switch0phy5>;
3587109d817SMarek Behún			};
3597109d817SMarek Behún
3607109d817SMarek Behún			port@6 {
3617109d817SMarek Behún				reg = <0x6>;
3627109d817SMarek Behún				label = "lan6";
3637109d817SMarek Behún				phy-handle = <&switch0phy6>;
3647109d817SMarek Behún			};
3657109d817SMarek Behún
3667109d817SMarek Behún			port@7 {
3677109d817SMarek Behún				reg = <0x7>;
3687109d817SMarek Behún				label = "lan7";
3697109d817SMarek Behún				phy-handle = <&switch0phy7>;
3707109d817SMarek Behún			};
3717109d817SMarek Behún
3727109d817SMarek Behún			port@8 {
3737109d817SMarek Behún				reg = <0x8>;
3747109d817SMarek Behún				label = "lan8";
3757109d817SMarek Behún				phy-handle = <&switch0phy8>;
3767109d817SMarek Behún			};
3777109d817SMarek Behún
3787109d817SMarek Behún			port@9 {
3797109d817SMarek Behún				reg = <0x9>;
3807109d817SMarek Behún				label = "cpu";
3817109d817SMarek Behún				ethernet = <&eth1>;
3827109d817SMarek Behún				phy-mode = "2500base-x";
3837109d817SMarek Behún				managed = "in-band-status";
3847109d817SMarek Behún			};
3857109d817SMarek Behún
3867109d817SMarek Behún			switch0port10: port@a {
3877109d817SMarek Behún				reg = <0xa>;
3887109d817SMarek Behún				label = "dsa";
3897109d817SMarek Behún				phy-mode = "2500base-x";
3907109d817SMarek Behún				managed = "in-band-status";
3917109d817SMarek Behún				link = <&switch1port9 &switch2port9>;
3927109d817SMarek Behún				status = "disabled";
3937109d817SMarek Behún			};
3947109d817SMarek Behún
3957109d817SMarek Behún			port-sfp@a {
3967109d817SMarek Behún				reg = <0xa>;
3977109d817SMarek Behún				label = "sfp";
3987109d817SMarek Behún				sfp = <&sfp>;
3997109d817SMarek Behún				phy-mode = "sgmii";
4007109d817SMarek Behún				managed = "in-band-status";
4017109d817SMarek Behún				status = "disabled";
4027109d817SMarek Behún			};
4037109d817SMarek Behún		};
4047109d817SMarek Behún	};
4057109d817SMarek Behún
4067109d817SMarek Behún	switch0@2 {
4077109d817SMarek Behún		compatible = "marvell,mv88e6085";
4087109d817SMarek Behún		reg = <0x2 0>;
4097109d817SMarek Behún		dsa,member = <0 0>;
4107109d817SMarek Behún		interrupt-parent = <&moxtet>;
4117109d817SMarek Behún		interrupts = <MOXTET_IRQ_TOPAZ>;
4127109d817SMarek Behún		status = "disabled";
4137109d817SMarek Behún
4147109d817SMarek Behún		mdio {
4157109d817SMarek Behún			#address-cells = <1>;
4167109d817SMarek Behún			#size-cells = <0>;
4177109d817SMarek Behún
4187109d817SMarek Behún			switch0phy1_topaz: switch0phy1@11 {
4197109d817SMarek Behún				reg = <0x11>;
4207109d817SMarek Behún			};
4217109d817SMarek Behún
4227109d817SMarek Behún			switch0phy2_topaz: switch0phy2@12 {
4237109d817SMarek Behún				reg = <0x12>;
4247109d817SMarek Behún			};
4257109d817SMarek Behún
4267109d817SMarek Behún			switch0phy3_topaz: switch0phy3@13 {
4277109d817SMarek Behún				reg = <0x13>;
4287109d817SMarek Behún			};
4297109d817SMarek Behún
4307109d817SMarek Behún			switch0phy4_topaz: switch0phy4@14 {
4317109d817SMarek Behún				reg = <0x14>;
4327109d817SMarek Behún			};
4337109d817SMarek Behún		};
4347109d817SMarek Behún
4357109d817SMarek Behún		ports {
4367109d817SMarek Behún			#address-cells = <1>;
4377109d817SMarek Behún			#size-cells = <0>;
4387109d817SMarek Behún
4397109d817SMarek Behún			port@1 {
4407109d817SMarek Behún				reg = <0x1>;
4417109d817SMarek Behún				label = "lan1";
4427109d817SMarek Behún				phy-handle = <&switch0phy1_topaz>;
4437109d817SMarek Behún			};
4447109d817SMarek Behún
4457109d817SMarek Behún			port@2 {
4467109d817SMarek Behún				reg = <0x2>;
4477109d817SMarek Behún				label = "lan2";
4487109d817SMarek Behún				phy-handle = <&switch0phy2_topaz>;
4497109d817SMarek Behún			};
4507109d817SMarek Behún
4517109d817SMarek Behún			port@3 {
4527109d817SMarek Behún				reg = <0x3>;
4537109d817SMarek Behún				label = "lan3";
4547109d817SMarek Behún				phy-handle = <&switch0phy3_topaz>;
4557109d817SMarek Behún			};
4567109d817SMarek Behún
4577109d817SMarek Behún			port@4 {
4587109d817SMarek Behún				reg = <0x4>;
4597109d817SMarek Behún				label = "lan4";
4607109d817SMarek Behún				phy-handle = <&switch0phy4_topaz>;
4617109d817SMarek Behún			};
4627109d817SMarek Behún
4637109d817SMarek Behún			port@5 {
4647109d817SMarek Behún				reg = <0x5>;
4657109d817SMarek Behún				label = "cpu";
4667109d817SMarek Behún				phy-mode = "2500base-x";
4677109d817SMarek Behún				managed = "in-band-status";
4687109d817SMarek Behún				ethernet = <&eth1>;
4697109d817SMarek Behún			};
4707109d817SMarek Behún		};
4717109d817SMarek Behún	};
4727109d817SMarek Behún
4737109d817SMarek Behún	switch1@11 {
4747109d817SMarek Behún		compatible = "marvell,mv88e6190";
4757109d817SMarek Behún		reg = <0x11 0>;
4767109d817SMarek Behún		dsa,member = <0 1>;
4777109d817SMarek Behún		interrupt-parent = <&moxtet>;
4787109d817SMarek Behún		interrupts = <MOXTET_IRQ_PERIDOT(1)>;
4797109d817SMarek Behún		status = "disabled";
4807109d817SMarek Behún
4817109d817SMarek Behún		mdio {
4827109d817SMarek Behún			#address-cells = <1>;
4837109d817SMarek Behún			#size-cells = <0>;
4847109d817SMarek Behún
4857109d817SMarek Behún			switch1phy1: switch1phy1@1 {
4867109d817SMarek Behún				reg = <0x1>;
4877109d817SMarek Behún			};
4887109d817SMarek Behún
4897109d817SMarek Behún			switch1phy2: switch1phy2@2 {
4907109d817SMarek Behún				reg = <0x2>;
4917109d817SMarek Behún			};
4927109d817SMarek Behún
4937109d817SMarek Behún			switch1phy3: switch1phy3@3 {
4947109d817SMarek Behún				reg = <0x3>;
4957109d817SMarek Behún			};
4967109d817SMarek Behún
4977109d817SMarek Behún			switch1phy4: switch1phy4@4 {
4987109d817SMarek Behún				reg = <0x4>;
4997109d817SMarek Behún			};
5007109d817SMarek Behún
5017109d817SMarek Behún			switch1phy5: switch1phy5@5 {
5027109d817SMarek Behún				reg = <0x5>;
5037109d817SMarek Behún			};
5047109d817SMarek Behún
5057109d817SMarek Behún			switch1phy6: switch1phy6@6 {
5067109d817SMarek Behún				reg = <0x6>;
5077109d817SMarek Behún			};
5087109d817SMarek Behún
5097109d817SMarek Behún			switch1phy7: switch1phy7@7 {
5107109d817SMarek Behún				reg = <0x7>;
5117109d817SMarek Behún			};
5127109d817SMarek Behún
5137109d817SMarek Behún			switch1phy8: switch1phy8@8 {
5147109d817SMarek Behún				reg = <0x8>;
5157109d817SMarek Behún			};
5167109d817SMarek Behún		};
5177109d817SMarek Behún
5187109d817SMarek Behún		ports {
5197109d817SMarek Behún			#address-cells = <1>;
5207109d817SMarek Behún			#size-cells = <0>;
5217109d817SMarek Behún
5227109d817SMarek Behún			port@1 {
5237109d817SMarek Behún				reg = <0x1>;
5247109d817SMarek Behún				label = "lan9";
5257109d817SMarek Behún				phy-handle = <&switch1phy1>;
5267109d817SMarek Behún			};
5277109d817SMarek Behún
5287109d817SMarek Behún			port@2 {
5297109d817SMarek Behún				reg = <0x2>;
5307109d817SMarek Behún				label = "lan10";
5317109d817SMarek Behún				phy-handle = <&switch1phy2>;
5327109d817SMarek Behún			};
5337109d817SMarek Behún
5347109d817SMarek Behún			port@3 {
5357109d817SMarek Behún				reg = <0x3>;
5367109d817SMarek Behún				label = "lan11";
5377109d817SMarek Behún				phy-handle = <&switch1phy3>;
5387109d817SMarek Behún			};
5397109d817SMarek Behún
5407109d817SMarek Behún			port@4 {
5417109d817SMarek Behún				reg = <0x4>;
5427109d817SMarek Behún				label = "lan12";
5437109d817SMarek Behún				phy-handle = <&switch1phy4>;
5447109d817SMarek Behún			};
5457109d817SMarek Behún
5467109d817SMarek Behún			port@5 {
5477109d817SMarek Behún				reg = <0x5>;
5487109d817SMarek Behún				label = "lan13";
5497109d817SMarek Behún				phy-handle = <&switch1phy5>;
5507109d817SMarek Behún			};
5517109d817SMarek Behún
5527109d817SMarek Behún			port@6 {
5537109d817SMarek Behún				reg = <0x6>;
5547109d817SMarek Behún				label = "lan14";
5557109d817SMarek Behún				phy-handle = <&switch1phy6>;
5567109d817SMarek Behún			};
5577109d817SMarek Behún
5587109d817SMarek Behún			port@7 {
5597109d817SMarek Behún				reg = <0x7>;
5607109d817SMarek Behún				label = "lan15";
5617109d817SMarek Behún				phy-handle = <&switch1phy7>;
5627109d817SMarek Behún			};
5637109d817SMarek Behún
5647109d817SMarek Behún			port@8 {
5657109d817SMarek Behún				reg = <0x8>;
5667109d817SMarek Behún				label = "lan16";
5677109d817SMarek Behún				phy-handle = <&switch1phy8>;
5687109d817SMarek Behún			};
5697109d817SMarek Behún
5707109d817SMarek Behún			switch1port9: port@9 {
5717109d817SMarek Behún				reg = <0x9>;
5727109d817SMarek Behún				label = "dsa";
5737109d817SMarek Behún				phy-mode = "2500base-x";
5747109d817SMarek Behún				managed = "in-band-status";
5757109d817SMarek Behún				link = <&switch0port10>;
5767109d817SMarek Behún			};
5777109d817SMarek Behún
5787109d817SMarek Behún			switch1port10: port@a {
5797109d817SMarek Behún				reg = <0xa>;
5807109d817SMarek Behún				label = "dsa";
5817109d817SMarek Behún				phy-mode = "2500base-x";
5827109d817SMarek Behún				managed = "in-band-status";
5837109d817SMarek Behún				link = <&switch2port9>;
5847109d817SMarek Behún				status = "disabled";
5857109d817SMarek Behún			};
5867109d817SMarek Behún
5877109d817SMarek Behún			port-sfp@a {
5887109d817SMarek Behún				reg = <0xa>;
5897109d817SMarek Behún				label = "sfp";
5907109d817SMarek Behún				sfp = <&sfp>;
5917109d817SMarek Behún				phy-mode = "sgmii";
5927109d817SMarek Behún				managed = "in-band-status";
5937109d817SMarek Behún				status = "disabled";
5947109d817SMarek Behún			};
5957109d817SMarek Behún		};
5967109d817SMarek Behún	};
5977109d817SMarek Behún
5987109d817SMarek Behún	switch1@2 {
5997109d817SMarek Behún		compatible = "marvell,mv88e6085";
6007109d817SMarek Behún		reg = <0x2 0>;
6017109d817SMarek Behún		dsa,member = <0 1>;
6027109d817SMarek Behún		interrupt-parent = <&moxtet>;
6037109d817SMarek Behún		interrupts = <MOXTET_IRQ_TOPAZ>;
6047109d817SMarek Behún		status = "disabled";
6057109d817SMarek Behún
6067109d817SMarek Behún		mdio {
6077109d817SMarek Behún			#address-cells = <1>;
6087109d817SMarek Behún			#size-cells = <0>;
6097109d817SMarek Behún
6107109d817SMarek Behún			switch1phy1_topaz: switch1phy1@11 {
6117109d817SMarek Behún				reg = <0x11>;
6127109d817SMarek Behún			};
6137109d817SMarek Behún
6147109d817SMarek Behún			switch1phy2_topaz: switch1phy2@12 {
6157109d817SMarek Behún				reg = <0x12>;
6167109d817SMarek Behún			};
6177109d817SMarek Behún
6187109d817SMarek Behún			switch1phy3_topaz: switch1phy3@13 {
6197109d817SMarek Behún				reg = <0x13>;
6207109d817SMarek Behún			};
6217109d817SMarek Behún
6227109d817SMarek Behún			switch1phy4_topaz: switch1phy4@14 {
6237109d817SMarek Behún				reg = <0x14>;
6247109d817SMarek Behún			};
6257109d817SMarek Behún		};
6267109d817SMarek Behún
6277109d817SMarek Behún		ports {
6287109d817SMarek Behún			#address-cells = <1>;
6297109d817SMarek Behún			#size-cells = <0>;
6307109d817SMarek Behún
6317109d817SMarek Behún			port@1 {
6327109d817SMarek Behún				reg = <0x1>;
6337109d817SMarek Behún				label = "lan9";
6347109d817SMarek Behún				phy-handle = <&switch1phy1_topaz>;
6357109d817SMarek Behún			};
6367109d817SMarek Behún
6377109d817SMarek Behún			port@2 {
6387109d817SMarek Behún				reg = <0x2>;
6397109d817SMarek Behún				label = "lan10";
6407109d817SMarek Behún				phy-handle = <&switch1phy2_topaz>;
6417109d817SMarek Behún			};
6427109d817SMarek Behún
6437109d817SMarek Behún			port@3 {
6447109d817SMarek Behún				reg = <0x3>;
6457109d817SMarek Behún				label = "lan11";
6467109d817SMarek Behún				phy-handle = <&switch1phy3_topaz>;
6477109d817SMarek Behún			};
6487109d817SMarek Behún
6497109d817SMarek Behún			port@4 {
6507109d817SMarek Behún				reg = <0x4>;
6517109d817SMarek Behún				label = "lan12";
6527109d817SMarek Behún				phy-handle = <&switch1phy4_topaz>;
6537109d817SMarek Behún			};
6547109d817SMarek Behún
6557109d817SMarek Behún			port@5 {
6567109d817SMarek Behún				reg = <0x5>;
6577109d817SMarek Behún				label = "dsa";
6587109d817SMarek Behún				phy-mode = "2500base-x";
6597109d817SMarek Behún				managed = "in-band-status";
6607109d817SMarek Behún				link = <&switch0port10>;
6617109d817SMarek Behún			};
6627109d817SMarek Behún		};
6637109d817SMarek Behún	};
6647109d817SMarek Behún
6657109d817SMarek Behún	switch2@12 {
6667109d817SMarek Behún		compatible = "marvell,mv88e6190";
6677109d817SMarek Behún		reg = <0x12 0>;
6687109d817SMarek Behún		dsa,member = <0 2>;
6697109d817SMarek Behún		interrupt-parent = <&moxtet>;
6707109d817SMarek Behún		interrupts = <MOXTET_IRQ_PERIDOT(2)>;
6717109d817SMarek Behún		status = "disabled";
6727109d817SMarek Behún
6737109d817SMarek Behún		mdio {
6747109d817SMarek Behún			#address-cells = <1>;
6757109d817SMarek Behún			#size-cells = <0>;
6767109d817SMarek Behún
6777109d817SMarek Behún			switch2phy1: switch2phy1@1 {
6787109d817SMarek Behún				reg = <0x1>;
6797109d817SMarek Behún			};
6807109d817SMarek Behún
6817109d817SMarek Behún			switch2phy2: switch2phy2@2 {
6827109d817SMarek Behún				reg = <0x2>;
6837109d817SMarek Behún			};
6847109d817SMarek Behún
6857109d817SMarek Behún			switch2phy3: switch2phy3@3 {
6867109d817SMarek Behún				reg = <0x3>;
6877109d817SMarek Behún			};
6887109d817SMarek Behún
6897109d817SMarek Behún			switch2phy4: switch2phy4@4 {
6907109d817SMarek Behún				reg = <0x4>;
6917109d817SMarek Behún			};
6927109d817SMarek Behún
6937109d817SMarek Behún			switch2phy5: switch2phy5@5 {
6947109d817SMarek Behún				reg = <0x5>;
6957109d817SMarek Behún			};
6967109d817SMarek Behún
6977109d817SMarek Behún			switch2phy6: switch2phy6@6 {
6987109d817SMarek Behún				reg = <0x6>;
6997109d817SMarek Behún			};
7007109d817SMarek Behún
7017109d817SMarek Behún			switch2phy7: switch2phy7@7 {
7027109d817SMarek Behún				reg = <0x7>;
7037109d817SMarek Behún			};
7047109d817SMarek Behún
7057109d817SMarek Behún			switch2phy8: switch2phy8@8 {
7067109d817SMarek Behún				reg = <0x8>;
7077109d817SMarek Behún			};
7087109d817SMarek Behún		};
7097109d817SMarek Behún
7107109d817SMarek Behún		ports {
7117109d817SMarek Behún			#address-cells = <1>;
7127109d817SMarek Behún			#size-cells = <0>;
7137109d817SMarek Behún
7147109d817SMarek Behún			port@1 {
7157109d817SMarek Behún				reg = <0x1>;
7167109d817SMarek Behún				label = "lan17";
7177109d817SMarek Behún				phy-handle = <&switch2phy1>;
7187109d817SMarek Behún			};
7197109d817SMarek Behún
7207109d817SMarek Behún			port@2 {
7217109d817SMarek Behún				reg = <0x2>;
7227109d817SMarek Behún				label = "lan18";
7237109d817SMarek Behún				phy-handle = <&switch2phy2>;
7247109d817SMarek Behún			};
7257109d817SMarek Behún
7267109d817SMarek Behún			port@3 {
7277109d817SMarek Behún				reg = <0x3>;
7287109d817SMarek Behún				label = "lan19";
7297109d817SMarek Behún				phy-handle = <&switch2phy3>;
7307109d817SMarek Behún			};
7317109d817SMarek Behún
7327109d817SMarek Behún			port@4 {
7337109d817SMarek Behún				reg = <0x4>;
7347109d817SMarek Behún				label = "lan20";
7357109d817SMarek Behún				phy-handle = <&switch2phy4>;
7367109d817SMarek Behún			};
7377109d817SMarek Behún
7387109d817SMarek Behún			port@5 {
7397109d817SMarek Behún				reg = <0x5>;
7407109d817SMarek Behún				label = "lan21";
7417109d817SMarek Behún				phy-handle = <&switch2phy5>;
7427109d817SMarek Behún			};
7437109d817SMarek Behún
7447109d817SMarek Behún			port@6 {
7457109d817SMarek Behún				reg = <0x6>;
7467109d817SMarek Behún				label = "lan22";
7477109d817SMarek Behún				phy-handle = <&switch2phy6>;
7487109d817SMarek Behún			};
7497109d817SMarek Behún
7507109d817SMarek Behún			port@7 {
7517109d817SMarek Behún				reg = <0x7>;
7527109d817SMarek Behún				label = "lan23";
7537109d817SMarek Behún				phy-handle = <&switch2phy7>;
7547109d817SMarek Behún			};
7557109d817SMarek Behún
7567109d817SMarek Behún			port@8 {
7577109d817SMarek Behún				reg = <0x8>;
7587109d817SMarek Behún				label = "lan24";
7597109d817SMarek Behún				phy-handle = <&switch2phy8>;
7607109d817SMarek Behún			};
7617109d817SMarek Behún
7627109d817SMarek Behún			switch2port9: port@9 {
7637109d817SMarek Behún				reg = <0x9>;
7647109d817SMarek Behún				label = "dsa";
7657109d817SMarek Behún				phy-mode = "2500base-x";
7667109d817SMarek Behún				managed = "in-band-status";
7677109d817SMarek Behún				link = <&switch1port10 &switch0port10>;
7687109d817SMarek Behún			};
7697109d817SMarek Behún
7707109d817SMarek Behún			port-sfp@a {
7717109d817SMarek Behún				reg = <0xa>;
7727109d817SMarek Behún				label = "sfp";
7737109d817SMarek Behún				sfp = <&sfp>;
7747109d817SMarek Behún				phy-mode = "sgmii";
7757109d817SMarek Behún				managed = "in-band-status";
7767109d817SMarek Behún				status = "disabled";
7777109d817SMarek Behún			};
7787109d817SMarek Behún		};
7797109d817SMarek Behún	};
7807109d817SMarek Behún
7817109d817SMarek Behún	switch2@2 {
7827109d817SMarek Behún		compatible = "marvell,mv88e6085";
7837109d817SMarek Behún		reg = <0x2 0>;
7847109d817SMarek Behún		dsa,member = <0 2>;
7857109d817SMarek Behún		interrupt-parent = <&moxtet>;
7867109d817SMarek Behún		interrupts = <MOXTET_IRQ_TOPAZ>;
7877109d817SMarek Behún		status = "disabled";
7887109d817SMarek Behún
7897109d817SMarek Behún		mdio {
7907109d817SMarek Behún			#address-cells = <1>;
7917109d817SMarek Behún			#size-cells = <0>;
7927109d817SMarek Behún
7937109d817SMarek Behún			switch2phy1_topaz: switch2phy1@11 {
7947109d817SMarek Behún				reg = <0x11>;
7957109d817SMarek Behún			};
7967109d817SMarek Behún
7977109d817SMarek Behún			switch2phy2_topaz: switch2phy2@12 {
7987109d817SMarek Behún				reg = <0x12>;
7997109d817SMarek Behún			};
8007109d817SMarek Behún
8017109d817SMarek Behún			switch2phy3_topaz: switch2phy3@13 {
8027109d817SMarek Behún				reg = <0x13>;
8037109d817SMarek Behún			};
8047109d817SMarek Behún
8057109d817SMarek Behún			switch2phy4_topaz: switch2phy4@14 {
8067109d817SMarek Behún				reg = <0x14>;
8077109d817SMarek Behún			};
8087109d817SMarek Behún		};
8097109d817SMarek Behún
8107109d817SMarek Behún		ports {
8117109d817SMarek Behún			#address-cells = <1>;
8127109d817SMarek Behún			#size-cells = <0>;
8137109d817SMarek Behún
8147109d817SMarek Behún			port@1 {
8157109d817SMarek Behún				reg = <0x1>;
8167109d817SMarek Behún				label = "lan17";
8177109d817SMarek Behún				phy-handle = <&switch2phy1_topaz>;
8187109d817SMarek Behún			};
8197109d817SMarek Behún
8207109d817SMarek Behún			port@2 {
8217109d817SMarek Behún				reg = <0x2>;
8227109d817SMarek Behún				label = "lan18";
8237109d817SMarek Behún				phy-handle = <&switch2phy2_topaz>;
8247109d817SMarek Behún			};
8257109d817SMarek Behún
8267109d817SMarek Behún			port@3 {
8277109d817SMarek Behún				reg = <0x3>;
8287109d817SMarek Behún				label = "lan19";
8297109d817SMarek Behún				phy-handle = <&switch2phy3_topaz>;
8307109d817SMarek Behún			};
8317109d817SMarek Behún
8327109d817SMarek Behún			port@4 {
8337109d817SMarek Behún				reg = <0x4>;
8347109d817SMarek Behún				label = "lan20";
8357109d817SMarek Behún				phy-handle = <&switch2phy4_topaz>;
8367109d817SMarek Behún			};
8377109d817SMarek Behún
8387109d817SMarek Behún			port@5 {
8397109d817SMarek Behún				reg = <0x5>;
8407109d817SMarek Behún				label = "dsa";
8417109d817SMarek Behún				phy-mode = "2500base-x";
8427109d817SMarek Behún				managed = "in-band-status";
8437109d817SMarek Behún				link = <&switch1port10 &switch0port10>;
8447109d817SMarek Behún			};
8457109d817SMarek Behún		};
8467109d817SMarek Behún	};
8477109d817SMarek Behún};
848