1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 mdio0 = &mdio0; 40 mdio1 = &mdio1; 41 mdio2 = &mdio2; 42 mdio3 = &mdio3; 43 }; 44 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; 50 51 cpu@f00 { 52 compatible = "arm,cortex-a7"; 53 device_type = "cpu"; 54 reg = <0xf00>; 55 }; 56 57 cpu@f01 { 58 compatible = "arm,cortex-a7"; 59 device_type = "cpu"; 60 reg = <0xf01>; 61 }; 62 }; 63 64 timer { 65 compatible = "arm,armv7-timer"; 66 interrupt-parent = <&gic>; 67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 71 clocks = <&syscon ASPEED_CLK_HPLL>; 72 arm,cpu-registers-not-fw-configured; 73 always-on; 74 }; 75 76 edac: sdram@1e6e0000 { 77 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 78 reg = <0x1e6e0000 0x174>; 79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 80 }; 81 82 ahb { 83 compatible = "simple-bus"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 device_type = "soc"; 87 ranges; 88 89 gic: interrupt-controller@40461000 { 90 compatible = "arm,cortex-a7-gic"; 91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 92 #interrupt-cells = <3>; 93 interrupt-controller; 94 interrupt-parent = <&gic>; 95 reg = <0x40461000 0x1000>, 96 <0x40462000 0x1000>, 97 <0x40464000 0x2000>, 98 <0x40466000 0x2000>; 99 }; 100 101 ahbc: bus@1e600000 { 102 compatible = "aspeed,ast2600-ahbc", "syscon"; 103 reg = <0x1e600000 0x100>; 104 }; 105 106 fmc: spi@1e620000 { 107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 compatible = "aspeed,ast2600-fmc"; 111 clocks = <&syscon ASPEED_CLK_AHB>; 112 status = "disabled"; 113 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 114 flash@0 { 115 reg = < 0 >; 116 compatible = "jedec,spi-nor"; 117 spi-max-frequency = <50000000>; 118 spi-rx-bus-width = <2>; 119 status = "disabled"; 120 }; 121 flash@1 { 122 reg = < 1 >; 123 compatible = "jedec,spi-nor"; 124 spi-max-frequency = <50000000>; 125 spi-rx-bus-width = <2>; 126 status = "disabled"; 127 }; 128 flash@2 { 129 reg = < 2 >; 130 compatible = "jedec,spi-nor"; 131 spi-max-frequency = <50000000>; 132 spi-rx-bus-width = <2>; 133 status = "disabled"; 134 }; 135 }; 136 137 spi1: spi@1e630000 { 138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 compatible = "aspeed,ast2600-spi"; 142 clocks = <&syscon ASPEED_CLK_AHB>; 143 status = "disabled"; 144 flash@0 { 145 reg = < 0 >; 146 compatible = "jedec,spi-nor"; 147 spi-max-frequency = <50000000>; 148 spi-rx-bus-width = <2>; 149 status = "disabled"; 150 }; 151 flash@1 { 152 reg = < 1 >; 153 compatible = "jedec,spi-nor"; 154 spi-max-frequency = <50000000>; 155 spi-rx-bus-width = <2>; 156 status = "disabled"; 157 }; 158 }; 159 160 spi2: spi@1e631000 { 161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 compatible = "aspeed,ast2600-spi"; 165 clocks = <&syscon ASPEED_CLK_AHB>; 166 status = "disabled"; 167 flash@0 { 168 reg = < 0 >; 169 compatible = "jedec,spi-nor"; 170 spi-max-frequency = <50000000>; 171 spi-rx-bus-width = <2>; 172 status = "disabled"; 173 }; 174 flash@1 { 175 reg = < 1 >; 176 compatible = "jedec,spi-nor"; 177 spi-max-frequency = <50000000>; 178 spi-rx-bus-width = <2>; 179 status = "disabled"; 180 }; 181 flash@2 { 182 reg = < 2 >; 183 compatible = "jedec,spi-nor"; 184 spi-max-frequency = <50000000>; 185 spi-rx-bus-width = <2>; 186 status = "disabled"; 187 }; 188 }; 189 190 mdio0: mdio@1e650000 { 191 compatible = "aspeed,ast2600-mdio"; 192 reg = <0x1e650000 0x8>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 status = "disabled"; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&pinctrl_mdio1_default>; 198 resets = <&syscon ASPEED_RESET_MII>; 199 }; 200 201 mdio1: mdio@1e650008 { 202 compatible = "aspeed,ast2600-mdio"; 203 reg = <0x1e650008 0x8>; 204 #address-cells = <1>; 205 #size-cells = <0>; 206 status = "disabled"; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_mdio2_default>; 209 resets = <&syscon ASPEED_RESET_MII>; 210 }; 211 212 mdio2: mdio@1e650010 { 213 compatible = "aspeed,ast2600-mdio"; 214 reg = <0x1e650010 0x8>; 215 #address-cells = <1>; 216 #size-cells = <0>; 217 status = "disabled"; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_mdio3_default>; 220 resets = <&syscon ASPEED_RESET_MII>; 221 }; 222 223 mdio3: mdio@1e650018 { 224 compatible = "aspeed,ast2600-mdio"; 225 reg = <0x1e650018 0x8>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 status = "disabled"; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pinctrl_mdio4_default>; 231 resets = <&syscon ASPEED_RESET_MII>; 232 }; 233 234 mac0: ethernet@1e660000 { 235 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 236 reg = <0x1e660000 0x180>; 237 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 238 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 239 status = "disabled"; 240 }; 241 242 mac1: ethernet@1e680000 { 243 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 244 reg = <0x1e680000 0x180>; 245 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 246 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 247 status = "disabled"; 248 }; 249 250 mac2: ethernet@1e670000 { 251 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 252 reg = <0x1e670000 0x180>; 253 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 254 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 255 status = "disabled"; 256 }; 257 258 mac3: ethernet@1e690000 { 259 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 260 reg = <0x1e690000 0x180>; 261 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 262 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 263 status = "disabled"; 264 }; 265 266 ehci0: usb@1e6a1000 { 267 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 268 reg = <0x1e6a1000 0x100>; 269 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pinctrl_usb2ah_default>; 273 status = "disabled"; 274 }; 275 276 ehci1: usb@1e6a3000 { 277 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 278 reg = <0x1e6a3000 0x100>; 279 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 280 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pinctrl_usb2bh_default>; 283 status = "disabled"; 284 }; 285 286 uhci: usb@1e6b0000 { 287 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 288 reg = <0x1e6b0000 0x100>; 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 290 #ports = <2>; 291 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 292 status = "disabled"; 293 /* 294 * No default pinmux, it will follow EHCI, use an 295 * explicit pinmux override if EHCI is not enabled. 296 */ 297 }; 298 299 vhub: usb-vhub@1e6a0000 { 300 compatible = "aspeed,ast2600-usb-vhub"; 301 reg = <0x1e6a0000 0x350>; 302 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 303 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 304 aspeed,vhub-downstream-ports = <7>; 305 aspeed,vhub-generic-endpoints = <21>; 306 pinctrl-names = "default"; 307 pinctrl-0 = <&pinctrl_usb2ad_default>; 308 status = "disabled"; 309 }; 310 311 udc: usb@1e6a2000 { 312 compatible = "aspeed,ast2600-udc"; 313 reg = <0x1e6a2000 0x300>; 314 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 315 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 316 pinctrl-names = "default"; 317 pinctrl-0 = <&pinctrl_usb2bd_default>; 318 status = "disabled"; 319 }; 320 321 hace: crypto@1e6d0000 { 322 compatible = "aspeed,ast2600-hace"; 323 reg = <0x1e6d0000 0x200>; 324 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 325 clocks = <&syscon ASPEED_CLK_GATE_YCLK>; 326 resets = <&syscon ASPEED_RESET_HACE>; 327 }; 328 329 apb@1e6e0000 { 330 compatible = "simple-bus"; 331 reg = <0x1e6e0000 0x00010000>; 332 #address-cells = <1>; 333 #size-cells = <1>; 334 ranges; 335 336 syscon: syscon@1e6e2000 { 337 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 338 reg = <0x1e6e2000 0x1000>; 339 ranges = <0 0x1e6e2000 0x1000>; 340 #address-cells = <1>; 341 #size-cells = <1>; 342 #clock-cells = <1>; 343 #reset-cells = <1>; 344 345 pinctrl: pinctrl { 346 compatible = "aspeed,ast2600-pinctrl"; 347 }; 348 349 silicon-id@14 { 350 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 351 reg = <0x14 0x4 0x5b0 0x8>; 352 }; 353 354 smp-memram@180 { 355 compatible = "aspeed,ast2600-smpmem"; 356 reg = <0x180 0x40>; 357 }; 358 359 scu_ic0: interrupt-controller@560 { 360 #interrupt-cells = <1>; 361 compatible = "aspeed,ast2600-scu-ic0"; 362 reg = <0x560 0x4>; 363 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 364 interrupt-controller; 365 }; 366 367 scu_ic1: interrupt-controller@570 { 368 #interrupt-cells = <1>; 369 compatible = "aspeed,ast2600-scu-ic1"; 370 reg = <0x570 0x4>; 371 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 372 interrupt-controller; 373 }; 374 }; 375 376 rng: hwrng@1e6e2524 { 377 compatible = "timeriomem_rng"; 378 reg = <0x1e6e2524 0x4>; 379 period = <1>; 380 quality = <100>; 381 }; 382 383 gfx: display@1e6e6000 { 384 compatible = "aspeed,ast2600-gfx", "syscon"; 385 reg = <0x1e6e6000 0x1000>; 386 reg-io-width = <4>; 387 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 388 resets = <&syscon ASPEED_RESET_GRAPHICS>; 389 syscon = <&syscon>; 390 status = "disabled"; 391 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 392 }; 393 394 xdma: xdma@1e6e7000 { 395 compatible = "aspeed,ast2600-xdma"; 396 reg = <0x1e6e7000 0x100>; 397 clocks = <&syscon ASPEED_CLK_GATE_BCLK>; 398 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; 399 reset-names = "device", "root-complex"; 400 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 401 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; 402 aspeed,pcie-device = "bmc"; 403 aspeed,scu = <&syscon>; 404 status = "disabled"; 405 }; 406 407 adc0: adc@1e6e9000 { 408 compatible = "aspeed,ast2600-adc0"; 409 reg = <0x1e6e9000 0x100>; 410 clocks = <&syscon ASPEED_CLK_APB2>; 411 resets = <&syscon ASPEED_RESET_ADC>; 412 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 413 #io-channel-cells = <1>; 414 status = "disabled"; 415 }; 416 417 adc1: adc@1e6e9100 { 418 compatible = "aspeed,ast2600-adc1"; 419 reg = <0x1e6e9100 0x100>; 420 clocks = <&syscon ASPEED_CLK_APB2>; 421 resets = <&syscon ASPEED_RESET_ADC>; 422 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 423 #io-channel-cells = <1>; 424 status = "disabled"; 425 }; 426 }; 427 428 apb@1e6f0000 { 429 compatible = "simple-bus"; 430 reg = <0x1e6f0000 0x00010000>; 431 #address-cells = <1>; 432 #size-cells = <1>; 433 ranges; 434 435 sbc: secure-boot-controller@1e6f2000 { 436 compatible = "aspeed,ast2600-sbc"; 437 reg = <0x1e6f2000 0x1000>; 438 }; 439 440 acry: crypto@1e6fa000 { 441 compatible = "aspeed,ast2600-acry"; 442 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; 443 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 444 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; 445 aspeed,ahbc = <&ahbc>; 446 }; 447 }; 448 449 video: video@1e700000 { 450 compatible = "aspeed,ast2600-video-engine"; 451 reg = <0x1e700000 0x1000>; 452 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 453 <&syscon ASPEED_CLK_GATE_ECLK>; 454 clock-names = "vclk", "eclk"; 455 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 456 status = "disabled"; 457 }; 458 459 sdc: sdc@1e740000 { 460 compatible = "aspeed,ast2600-sd-controller"; 461 reg = <0x1e740000 0x100>; 462 #address-cells = <1>; 463 #size-cells = <1>; 464 ranges = <0 0x1e740000 0x10000>; 465 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 466 status = "disabled"; 467 468 sdhci0: sdhci@1e740100 { 469 compatible = "aspeed,ast2600-sdhci", "sdhci"; 470 reg = <0x100 0x100>; 471 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 472 sdhci,auto-cmd12; 473 clocks = <&syscon ASPEED_CLK_SDIO>; 474 status = "disabled"; 475 }; 476 477 sdhci1: sdhci@1e740200 { 478 compatible = "aspeed,ast2600-sdhci", "sdhci"; 479 reg = <0x200 0x100>; 480 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 481 sdhci,auto-cmd12; 482 clocks = <&syscon ASPEED_CLK_SDIO>; 483 status = "disabled"; 484 }; 485 }; 486 487 emmc_controller: sdc@1e750000 { 488 compatible = "aspeed,ast2600-sd-controller"; 489 reg = <0x1e750000 0x100>; 490 #address-cells = <1>; 491 #size-cells = <1>; 492 ranges = <0 0x1e750000 0x10000>; 493 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 494 status = "disabled"; 495 496 emmc: sdhci@1e750100 { 497 compatible = "aspeed,ast2600-sdhci"; 498 reg = <0x100 0x100>; 499 sdhci,auto-cmd12; 500 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&syscon ASPEED_CLK_EMMC>; 502 pinctrl-names = "default"; 503 pinctrl-0 = <&pinctrl_emmc_default>; 504 }; 505 }; 506 507 apb@1e780000 { 508 compatible = "simple-bus"; 509 reg = <0x1e780000 0x00010000>; 510 #address-cells = <1>; 511 #size-cells = <1>; 512 ranges; 513 514 gpio0: gpio@1e780000 { 515 #gpio-cells = <2>; 516 gpio-controller; 517 compatible = "aspeed,ast2600-gpio"; 518 reg = <0x1e780000 0x400>; 519 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 520 gpio-ranges = <&pinctrl 0 0 208>; 521 ngpios = <208>; 522 clocks = <&syscon ASPEED_CLK_APB2>; 523 interrupt-controller; 524 #interrupt-cells = <2>; 525 }; 526 527 sgpiom0: sgpiom@1e780500 { 528 #gpio-cells = <2>; 529 gpio-controller; 530 compatible = "aspeed,ast2600-sgpiom"; 531 reg = <0x1e780500 0x100>; 532 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&syscon ASPEED_CLK_APB2>; 534 #interrupt-cells = <2>; 535 interrupt-controller; 536 bus-frequency = <12000000>; 537 pinctrl-names = "default"; 538 pinctrl-0 = <&pinctrl_sgpm1_default>; 539 status = "disabled"; 540 }; 541 542 sgpiom1: sgpiom@1e780600 { 543 #gpio-cells = <2>; 544 gpio-controller; 545 compatible = "aspeed,ast2600-sgpiom"; 546 reg = <0x1e780600 0x100>; 547 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 548 clocks = <&syscon ASPEED_CLK_APB2>; 549 #interrupt-cells = <2>; 550 interrupt-controller; 551 bus-frequency = <12000000>; 552 pinctrl-names = "default"; 553 pinctrl-0 = <&pinctrl_sgpm2_default>; 554 status = "disabled"; 555 }; 556 557 gpio1: gpio@1e780800 { 558 #gpio-cells = <2>; 559 gpio-controller; 560 compatible = "aspeed,ast2600-gpio"; 561 reg = <0x1e780800 0x800>; 562 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 563 gpio-ranges = <&pinctrl 0 208 36>; 564 ngpios = <36>; 565 clocks = <&syscon ASPEED_CLK_APB1>; 566 interrupt-controller; 567 #interrupt-cells = <2>; 568 }; 569 570 rtc: rtc@1e781000 { 571 compatible = "aspeed,ast2600-rtc"; 572 reg = <0x1e781000 0x18>; 573 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 574 status = "disabled"; 575 }; 576 577 timer: timer@1e782000 { 578 compatible = "aspeed,ast2600-timer"; 579 reg = <0x1e782000 0x90>; 580 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 581 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 582 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 583 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 584 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 585 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 586 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 587 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 588 clocks = <&syscon ASPEED_CLK_APB1>; 589 clock-names = "PCLK"; 590 status = "disabled"; 591 }; 592 593 uart1: serial@1e783000 { 594 compatible = "ns16550a"; 595 reg = <0x1e783000 0x20>; 596 reg-shift = <2>; 597 reg-io-width = <4>; 598 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 600 resets = <&lpc_reset 4>; 601 no-loopback-test; 602 pinctrl-names = "default"; 603 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 604 status = "disabled"; 605 }; 606 607 uart5: serial@1e784000 { 608 compatible = "ns16550a"; 609 reg = <0x1e784000 0x1000>; 610 reg-shift = <2>; 611 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 613 no-loopback-test; 614 }; 615 616 wdt1: watchdog@1e785000 { 617 compatible = "aspeed,ast2600-wdt"; 618 reg = <0x1e785000 0x40>; 619 }; 620 621 wdt2: watchdog@1e785040 { 622 compatible = "aspeed,ast2600-wdt"; 623 reg = <0x1e785040 0x40>; 624 status = "disabled"; 625 }; 626 627 wdt3: watchdog@1e785080 { 628 compatible = "aspeed,ast2600-wdt"; 629 reg = <0x1e785080 0x40>; 630 status = "disabled"; 631 }; 632 633 wdt4: watchdog@1e7850c0 { 634 compatible = "aspeed,ast2600-wdt"; 635 reg = <0x1e7850C0 0x40>; 636 status = "disabled"; 637 }; 638 639 vuart1: serial@1e787000 { 640 compatible = "aspeed,ast2500-vuart"; 641 reg = <0x1e787000 0x40>; 642 reg-shift = <2>; 643 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&syscon ASPEED_CLK_APB1>; 645 no-loopback-test; 646 status = "disabled"; 647 }; 648 649 vuart3: serial@1e787800 { 650 compatible = "aspeed,ast2500-vuart"; 651 reg = <0x1e787800 0x40>; 652 reg-shift = <2>; 653 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 654 clocks = <&syscon ASPEED_CLK_APB2>; 655 no-loopback-test; 656 status = "disabled"; 657 }; 658 659 vuart2: serial@1e788000 { 660 compatible = "aspeed,ast2500-vuart"; 661 reg = <0x1e788000 0x40>; 662 reg-shift = <2>; 663 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 664 clocks = <&syscon ASPEED_CLK_APB1>; 665 no-loopback-test; 666 status = "disabled"; 667 }; 668 669 vuart4: serial@1e788800 { 670 compatible = "aspeed,ast2500-vuart"; 671 reg = <0x1e788800 0x40>; 672 reg-shift = <2>; 673 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 674 clocks = <&syscon ASPEED_CLK_APB2>; 675 no-loopback-test; 676 status = "disabled"; 677 }; 678 679 lpc: lpc@1e789000 { 680 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 681 reg = <0x1e789000 0x1000>; 682 reg-io-width = <4>; 683 684 #address-cells = <1>; 685 #size-cells = <1>; 686 ranges = <0x0 0x1e789000 0x1000>; 687 688 kcs1: kcs@24 { 689 compatible = "aspeed,ast2500-kcs-bmc-v2"; 690 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 691 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 692 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 693 kcs_chan = <1>; 694 status = "disabled"; 695 }; 696 697 kcs2: kcs@28 { 698 compatible = "aspeed,ast2500-kcs-bmc-v2"; 699 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 700 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 701 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 702 status = "disabled"; 703 }; 704 705 kcs3: kcs@2c { 706 compatible = "aspeed,ast2500-kcs-bmc-v2"; 707 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 708 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 709 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 710 status = "disabled"; 711 }; 712 713 kcs4: kcs@114 { 714 compatible = "aspeed,ast2500-kcs-bmc-v2"; 715 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 716 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 717 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 718 status = "disabled"; 719 }; 720 721 lpc_ctrl: lpc-ctrl@80 { 722 compatible = "aspeed,ast2600-lpc-ctrl"; 723 reg = <0x80 0x80>; 724 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 725 status = "disabled"; 726 }; 727 728 lpc_snoop: lpc-snoop@80 { 729 compatible = "aspeed,ast2600-lpc-snoop"; 730 reg = <0x80 0x80>; 731 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 732 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 733 status = "disabled"; 734 }; 735 736 lhc: lhc@a0 { 737 compatible = "aspeed,ast2600-lhc"; 738 reg = <0xa0 0x24 0xc8 0x8>; 739 }; 740 741 lpc_reset: reset-controller@98 { 742 compatible = "aspeed,ast2600-lpc-reset"; 743 reg = <0x98 0x4>; 744 #reset-cells = <1>; 745 }; 746 747 uart_routing: uart-routing@98 { 748 compatible = "aspeed,ast2600-uart-routing"; 749 reg = <0x98 0x8>; 750 status = "disabled"; 751 }; 752 753 ibt: ibt@140 { 754 compatible = "aspeed,ast2600-ibt-bmc"; 755 reg = <0x140 0x18>; 756 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 757 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 758 status = "disabled"; 759 }; 760 }; 761 762 i2c: bus@1e78a000 { 763 compatible = "simple-bus"; 764 #address-cells = <1>; 765 #size-cells = <1>; 766 ranges = <0 0x1e78a000 0x1000>; 767 }; 768 769 peci0: peci-controller@1e78b000 { 770 compatible = "aspeed,ast2600-peci"; 771 reg = <0x1e78b000 0x100>; 772 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 773 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 774 resets = <&syscon ASPEED_RESET_PECI>; 775 cmd-timeout-ms = <1000>; 776 clock-frequency = <1000000>; 777 status = "disabled"; 778 }; 779 780 uart2: serial@1e78d000 { 781 compatible = "ns16550a"; 782 reg = <0x1e78d000 0x20>; 783 reg-shift = <2>; 784 reg-io-width = <4>; 785 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 786 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 787 resets = <&lpc_reset 5>; 788 no-loopback-test; 789 pinctrl-names = "default"; 790 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 791 status = "disabled"; 792 }; 793 794 uart3: serial@1e78e000 { 795 compatible = "ns16550a"; 796 reg = <0x1e78e000 0x20>; 797 reg-shift = <2>; 798 reg-io-width = <4>; 799 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 800 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 801 resets = <&lpc_reset 6>; 802 no-loopback-test; 803 pinctrl-names = "default"; 804 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 805 status = "disabled"; 806 }; 807 808 uart4: serial@1e78f000 { 809 compatible = "ns16550a"; 810 reg = <0x1e78f000 0x20>; 811 reg-shift = <2>; 812 reg-io-width = <4>; 813 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 814 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 815 resets = <&lpc_reset 7>; 816 no-loopback-test; 817 pinctrl-names = "default"; 818 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 819 status = "disabled"; 820 }; 821 }; 822 823 apb@1e790000 { 824 compatible = "simple-bus"; 825 reg = <0x1e790000 0x00010000>; 826 #address-cells = <1>; 827 #size-cells = <1>; 828 ranges; 829 830 uart6: serial@1e790000 { 831 compatible = "ns16550a"; 832 reg = <0x1e790000 0x20>; 833 reg-shift = <2>; 834 reg-io-width = <4>; 835 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 836 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; 837 no-loopback-test; 838 pinctrl-names = "default"; 839 pinctrl-0 = <&pinctrl_uart6_default>; 840 841 status = "disabled"; 842 }; 843 844 uart7: serial@1e790100 { 845 compatible = "ns16550a"; 846 reg = <0x1e790100 0x20>; 847 reg-shift = <2>; 848 reg-io-width = <4>; 849 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 850 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; 851 no-loopback-test; 852 pinctrl-names = "default"; 853 pinctrl-0 = <&pinctrl_uart7_default>; 854 855 status = "disabled"; 856 }; 857 858 uart8: serial@1e790200 { 859 compatible = "ns16550a"; 860 reg = <0x1e790200 0x20>; 861 reg-shift = <2>; 862 reg-io-width = <4>; 863 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 864 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; 865 no-loopback-test; 866 pinctrl-names = "default"; 867 pinctrl-0 = <&pinctrl_uart8_default>; 868 869 status = "disabled"; 870 }; 871 872 uart9: serial@1e790300 { 873 compatible = "ns16550a"; 874 reg = <0x1e790300 0x20>; 875 reg-shift = <2>; 876 reg-io-width = <4>; 877 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 878 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; 879 no-loopback-test; 880 pinctrl-names = "default"; 881 pinctrl-0 = <&pinctrl_uart9_default>; 882 883 status = "disabled"; 884 }; 885 886 fsim0: fsi@1e79b000 { 887 #interrupt-cells = <1>; 888 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 889 reg = <0x1e79b000 0x94>; 890 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 891 pinctrl-names = "default"; 892 pinctrl-0 = <&pinctrl_fsi1_default>; 893 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 894 interrupt-controller; 895 status = "disabled"; 896 }; 897 898 fsim1: fsi@1e79b100 { 899 #interrupt-cells = <1>; 900 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 901 reg = <0x1e79b100 0x94>; 902 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 903 pinctrl-names = "default"; 904 pinctrl-0 = <&pinctrl_fsi2_default>; 905 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 906 interrupt-controller; 907 status = "disabled"; 908 }; 909 910 udma: dma-controller@1e79e000 { 911 compatible = "aspeed,ast2600-udma"; 912 reg = <0x1e79e000 0x1000>; 913 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 914 dma-channels = <28>; 915 #dma-cells = <1>; 916 status = "disabled"; 917 }; 918 }; 919 }; 920}; 921 922#include "aspeed-g6-pinctrl.dtsi" 923 924&i2c { 925 i2c0: i2c@80 { 926 #address-cells = <1>; 927 #size-cells = <0>; 928 reg = <0x80 0x80>; 929 compatible = "aspeed,ast2600-i2c-bus"; 930 clocks = <&syscon ASPEED_CLK_APB2>; 931 resets = <&syscon ASPEED_RESET_I2C>; 932 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 933 bus-frequency = <100000>; 934 pinctrl-names = "default"; 935 pinctrl-0 = <&pinctrl_i2c1_default>; 936 status = "disabled"; 937 }; 938 939 i2c1: i2c@100 { 940 #address-cells = <1>; 941 #size-cells = <0>; 942 reg = <0x100 0x80>; 943 compatible = "aspeed,ast2600-i2c-bus"; 944 clocks = <&syscon ASPEED_CLK_APB2>; 945 resets = <&syscon ASPEED_RESET_I2C>; 946 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 947 bus-frequency = <100000>; 948 pinctrl-names = "default"; 949 pinctrl-0 = <&pinctrl_i2c2_default>; 950 status = "disabled"; 951 }; 952 953 i2c2: i2c@180 { 954 #address-cells = <1>; 955 #size-cells = <0>; 956 reg = <0x180 0x80>; 957 compatible = "aspeed,ast2600-i2c-bus"; 958 clocks = <&syscon ASPEED_CLK_APB2>; 959 resets = <&syscon ASPEED_RESET_I2C>; 960 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 961 bus-frequency = <100000>; 962 pinctrl-names = "default"; 963 pinctrl-0 = <&pinctrl_i2c3_default>; 964 status = "disabled"; 965 }; 966 967 i2c3: i2c@200 { 968 #address-cells = <1>; 969 #size-cells = <0>; 970 reg = <0x200 0x80>; 971 compatible = "aspeed,ast2600-i2c-bus"; 972 clocks = <&syscon ASPEED_CLK_APB2>; 973 resets = <&syscon ASPEED_RESET_I2C>; 974 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 975 bus-frequency = <100000>; 976 pinctrl-names = "default"; 977 pinctrl-0 = <&pinctrl_i2c4_default>; 978 status = "disabled"; 979 }; 980 981 i2c4: i2c@280 { 982 #address-cells = <1>; 983 #size-cells = <0>; 984 reg = <0x280 0x80>; 985 compatible = "aspeed,ast2600-i2c-bus"; 986 clocks = <&syscon ASPEED_CLK_APB2>; 987 resets = <&syscon ASPEED_RESET_I2C>; 988 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 989 bus-frequency = <100000>; 990 pinctrl-names = "default"; 991 pinctrl-0 = <&pinctrl_i2c5_default>; 992 status = "disabled"; 993 }; 994 995 i2c5: i2c@300 { 996 #address-cells = <1>; 997 #size-cells = <0>; 998 reg = <0x300 0x80>; 999 compatible = "aspeed,ast2600-i2c-bus"; 1000 clocks = <&syscon ASPEED_CLK_APB2>; 1001 resets = <&syscon ASPEED_RESET_I2C>; 1002 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1003 bus-frequency = <100000>; 1004 pinctrl-names = "default"; 1005 pinctrl-0 = <&pinctrl_i2c6_default>; 1006 status = "disabled"; 1007 }; 1008 1009 i2c6: i2c@380 { 1010 #address-cells = <1>; 1011 #size-cells = <0>; 1012 reg = <0x380 0x80>; 1013 compatible = "aspeed,ast2600-i2c-bus"; 1014 clocks = <&syscon ASPEED_CLK_APB2>; 1015 resets = <&syscon ASPEED_RESET_I2C>; 1016 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1017 bus-frequency = <100000>; 1018 pinctrl-names = "default"; 1019 pinctrl-0 = <&pinctrl_i2c7_default>; 1020 status = "disabled"; 1021 }; 1022 1023 i2c7: i2c@400 { 1024 #address-cells = <1>; 1025 #size-cells = <0>; 1026 reg = <0x400 0x80>; 1027 compatible = "aspeed,ast2600-i2c-bus"; 1028 clocks = <&syscon ASPEED_CLK_APB2>; 1029 resets = <&syscon ASPEED_RESET_I2C>; 1030 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 1031 bus-frequency = <100000>; 1032 pinctrl-names = "default"; 1033 pinctrl-0 = <&pinctrl_i2c8_default>; 1034 status = "disabled"; 1035 }; 1036 1037 i2c8: i2c@480 { 1038 #address-cells = <1>; 1039 #size-cells = <0>; 1040 reg = <0x480 0x80>; 1041 compatible = "aspeed,ast2600-i2c-bus"; 1042 clocks = <&syscon ASPEED_CLK_APB2>; 1043 resets = <&syscon ASPEED_RESET_I2C>; 1044 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1045 bus-frequency = <100000>; 1046 pinctrl-names = "default"; 1047 pinctrl-0 = <&pinctrl_i2c9_default>; 1048 status = "disabled"; 1049 }; 1050 1051 i2c9: i2c@500 { 1052 #address-cells = <1>; 1053 #size-cells = <0>; 1054 reg = <0x500 0x80>; 1055 compatible = "aspeed,ast2600-i2c-bus"; 1056 clocks = <&syscon ASPEED_CLK_APB2>; 1057 resets = <&syscon ASPEED_RESET_I2C>; 1058 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1059 bus-frequency = <100000>; 1060 pinctrl-names = "default"; 1061 pinctrl-0 = <&pinctrl_i2c10_default>; 1062 status = "disabled"; 1063 }; 1064 1065 i2c10: i2c@580 { 1066 #address-cells = <1>; 1067 #size-cells = <0>; 1068 reg = <0x580 0x80>; 1069 compatible = "aspeed,ast2600-i2c-bus"; 1070 clocks = <&syscon ASPEED_CLK_APB2>; 1071 resets = <&syscon ASPEED_RESET_I2C>; 1072 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1073 bus-frequency = <100000>; 1074 pinctrl-names = "default"; 1075 pinctrl-0 = <&pinctrl_i2c11_default>; 1076 status = "disabled"; 1077 }; 1078 1079 i2c11: i2c@600 { 1080 #address-cells = <1>; 1081 #size-cells = <0>; 1082 reg = <0x600 0x80>; 1083 compatible = "aspeed,ast2600-i2c-bus"; 1084 clocks = <&syscon ASPEED_CLK_APB2>; 1085 resets = <&syscon ASPEED_RESET_I2C>; 1086 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1087 bus-frequency = <100000>; 1088 pinctrl-names = "default"; 1089 pinctrl-0 = <&pinctrl_i2c12_default>; 1090 status = "disabled"; 1091 }; 1092 1093 i2c12: i2c@680 { 1094 #address-cells = <1>; 1095 #size-cells = <0>; 1096 reg = <0x680 0x80>; 1097 compatible = "aspeed,ast2600-i2c-bus"; 1098 clocks = <&syscon ASPEED_CLK_APB2>; 1099 resets = <&syscon ASPEED_RESET_I2C>; 1100 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 1101 bus-frequency = <100000>; 1102 pinctrl-names = "default"; 1103 pinctrl-0 = <&pinctrl_i2c13_default>; 1104 status = "disabled"; 1105 }; 1106 1107 i2c13: i2c@700 { 1108 #address-cells = <1>; 1109 #size-cells = <0>; 1110 reg = <0x700 0x80>; 1111 compatible = "aspeed,ast2600-i2c-bus"; 1112 clocks = <&syscon ASPEED_CLK_APB2>; 1113 resets = <&syscon ASPEED_RESET_I2C>; 1114 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1115 bus-frequency = <100000>; 1116 pinctrl-names = "default"; 1117 pinctrl-0 = <&pinctrl_i2c14_default>; 1118 status = "disabled"; 1119 }; 1120 1121 i2c14: i2c@780 { 1122 #address-cells = <1>; 1123 #size-cells = <0>; 1124 reg = <0x780 0x80>; 1125 compatible = "aspeed,ast2600-i2c-bus"; 1126 clocks = <&syscon ASPEED_CLK_APB2>; 1127 resets = <&syscon ASPEED_RESET_I2C>; 1128 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1129 bus-frequency = <100000>; 1130 pinctrl-names = "default"; 1131 pinctrl-0 = <&pinctrl_i2c15_default>; 1132 status = "disabled"; 1133 }; 1134 1135 i2c15: i2c@800 { 1136 #address-cells = <1>; 1137 #size-cells = <0>; 1138 reg = <0x800 0x80>; 1139 compatible = "aspeed,ast2600-i2c-bus"; 1140 clocks = <&syscon ASPEED_CLK_APB2>; 1141 resets = <&syscon ASPEED_RESET_I2C>; 1142 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1143 bus-frequency = <100000>; 1144 pinctrl-names = "default"; 1145 pinctrl-0 = <&pinctrl_i2c16_default>; 1146 status = "disabled"; 1147 }; 1148}; 1149