xref: /openbmc/linux/scripts/dtc/include-prefixes/arm/aspeed/aspeed-bmc-facebook-catalina.dts (revision 11c27dad1134737a52d4671b35c293310a89dc55)
1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2021 Facebook Inc.
3/dts-v1/;
4
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/usb/pd.h>
8#include <dt-bindings/leds/leds-pca955x.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/i2c/i2c.h>
11
12/ {
13	model = "Facebook Catalina BMC";
14	compatible = "facebook,catalina-bmc", "aspeed,ast2600";
15
16	aliases {
17		serial0 = &uart1;
18		serial2 = &uart3;
19		serial3 = &uart4;
20		serial4 = &uart5;
21		i2c16 = &i2c1mux0ch0;
22		i2c17 = &i2c1mux0ch1;
23		i2c18 = &i2c1mux0ch2;
24		i2c19 = &i2c1mux0ch3;
25		i2c20 = &i2c1mux0ch4;
26		i2c21 = &i2c1mux0ch5;
27		i2c22 = &i2c1mux0ch6;
28		i2c23 = &i2c1mux0ch7;
29		i2c24 = &i2c0mux0ch0;
30		i2c25 = &i2c0mux0ch1;
31		i2c26 = &i2c0mux0ch2;
32		i2c27 = &i2c0mux0ch3;
33		i2c28 = &i2c0mux1ch0;
34		i2c29 = &i2c0mux1ch1;
35		i2c30 = &i2c0mux1ch2;
36		i2c31 = &i2c0mux1ch3;
37		i2c32 = &i2c0mux2ch0;
38		i2c33 = &i2c0mux2ch1;
39		i2c34 = &i2c0mux2ch2;
40		i2c35 = &i2c0mux2ch3;
41		i2c36 = &i2c0mux3ch0;
42		i2c37 = &i2c0mux3ch1;
43		i2c38 = &i2c0mux3ch2;
44		i2c39 = &i2c0mux3ch3;
45		i2c40 = &i2c0mux4ch0;
46		i2c41 = &i2c0mux4ch1;
47		i2c42 = &i2c0mux4ch2;
48		i2c43 = &i2c0mux4ch3;
49		i2c44 = &i2c0mux5ch0;
50		i2c45 = &i2c0mux5ch1;
51		i2c46 = &i2c0mux5ch2;
52		i2c47 = &i2c0mux5ch3;
53		i2c48 = &i2c5mux0ch0;
54		i2c49 = &i2c5mux0ch1;
55		i2c50 = &i2c5mux0ch2;
56		i2c51 = &i2c5mux0ch3;
57		i2c52 = &i2c5mux0ch4;
58		i2c53 = &i2c5mux0ch5;
59		i2c54 = &i2c5mux0ch6;
60		i2c55 = &i2c5mux0ch7;
61	};
62
63	chosen {
64		stdout-path = "serial4:57600n8";
65	};
66
67	memory@80000000 {
68		device_type = "memory";
69		reg = <0x80000000 0x80000000>;
70	};
71
72	iio-hwmon {
73		compatible = "iio-hwmon";
74		io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
75			      <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
76			      <&adc1 2>;
77	};
78
79	spi1_gpio: spi {
80		compatible = "spi-gpio";
81		#address-cells = <1>;
82		#size-cells = <0>;
83
84		sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
85		mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
86		miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
87		cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
88		num-chipselects = <1>;
89
90		tpm@0 {
91			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
92			spi-max-frequency = <33000000>;
93			reg = <0>;
94		};
95	};
96
97	leds {
98		compatible = "gpio-leds";
99
100		led-0 {
101			label = "bmc_heartbeat_amber";
102			gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
103			linux,default-trigger = "heartbeat";
104		};
105
106		led-1 {
107			label = "fp_id_amber";
108			default-state = "off";
109			gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
110		};
111
112		led-2 {
113			label = "bmc_ready_noled";
114			gpios = <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
115		};
116
117		led-3 {
118			label = "bmc_ready_cpld_noled";
119			gpios = <&gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
120		};
121	};
122
123	p1v8_bmc_aux: regulator-p1v8-bmc-aux {
124		compatible = "regulator-fixed";
125		regulator-name = "p1v8_bmc_aux";
126		regulator-min-microvolt = <1800000>;
127		regulator-max-microvolt = <1800000>;
128		regulator-always-on;
129	};
130
131	p2v5_bmc_aux: regulator-p2v5-bmc-aux {
132		compatible = "regulator-fixed";
133		regulator-name = "p2v5_bmc_aux";
134		regulator-min-microvolt = <2500000>;
135		regulator-max-microvolt = <2500000>;
136		regulator-always-on;
137	};
138};
139
140&uart1 {
141	status = "okay";
142};
143
144&uart3 {
145	status = "okay";
146};
147
148&uart4 {
149	status = "okay";
150};
151
152&uart5 {
153	status = "okay";
154};
155
156&mac2 {
157	status = "okay";
158	pinctrl-names = "default";
159	pinctrl-0 = <&pinctrl_ncsi3_default>;
160	use-ncsi;
161};
162
163&mac3 {
164	status = "okay";
165	pinctrl-names = "default";
166	pinctrl-0 = <&pinctrl_ncsi4_default>;
167	use-ncsi;
168};
169
170&fmc {
171	status = "okay";
172	flash@0 {
173		status = "okay";
174		m25p,fast-read;
175		label = "bmc";
176		spi-max-frequency = <50000000>;
177#include "openbmc-flash-layout-128.dtsi"
178	};
179	flash@1 {
180		status = "okay";
181		m25p,fast-read;
182		label = "alt-bmc";
183		spi-max-frequency = <50000000>;
184	};
185};
186
187&i2c0 {
188	status = "okay";
189
190	i2c-mux@71 {
191		compatible = "nxp,pca9546";
192		reg = <0x71>;
193		#address-cells = <1>;
194		#size-cells = <0>;
195		i2c-mux-idle-disconnect;
196
197		i2c0mux0ch0: i2c@0 {
198			#address-cells = <1>;
199			#size-cells = <0>;
200			reg = <0>;
201		};
202		i2c0mux0ch1: i2c@1 {
203			#address-cells = <1>;
204			#size-cells = <0>;
205			reg = <1>;
206		};
207		i2c0mux0ch2: i2c@2 {
208			#address-cells = <1>;
209			#size-cells = <0>;
210			reg = <2>;
211		};
212		i2c0mux0ch3: i2c@3 {
213			#address-cells = <1>;
214			#size-cells = <0>;
215			reg = <3>;
216		};
217	};
218
219	i2c-mux@72 {
220		compatible = "nxp,pca9546";
221		reg = <0x72>;
222		#address-cells = <1>;
223		#size-cells = <0>;
224		i2c-mux-idle-disconnect;
225
226		i2c0mux1ch0: i2c@0 {
227			#address-cells = <1>;
228			#size-cells = <0>;
229			reg = <0>;
230		};
231		i2c0mux1ch1: i2c@1 {
232			#address-cells = <1>;
233			#size-cells = <0>;
234			reg = <1>;
235
236			// IO Mezz 0 IOEXP
237			io_expander7: gpio@20 {
238				compatible = "nxp,pca9535";
239				reg = <0x20>;
240				gpio-controller;
241				#gpio-cells = <2>;
242			};
243
244			// IO Mezz 0 FRU EEPROM
245			eeprom@50 {
246				compatible = "atmel,24c64";
247				reg = <0x50>;
248			};
249		};
250		i2c0mux1ch2: i2c@2 {
251			#address-cells = <1>;
252			#size-cells = <0>;
253			reg = <2>;
254		};
255		i2c0mux1ch3: i2c@3 {
256			#address-cells = <1>;
257			#size-cells = <0>;
258			reg = <3>;
259		};
260	};
261
262	i2c-mux@73 {
263		compatible = "nxp,pca9546";
264		reg = <0x73>;
265		#address-cells = <1>;
266		#size-cells = <0>;
267		i2c-mux-idle-disconnect;
268
269		i2c0mux2ch0: i2c@0 {
270			#address-cells = <1>;
271			#size-cells = <0>;
272			reg = <0>;
273		};
274		i2c0mux2ch1: i2c@1 {
275			#address-cells = <1>;
276			#size-cells = <0>;
277			reg = <1>;
278		};
279		i2c0mux2ch2: i2c@2 {
280			#address-cells = <1>;
281			#size-cells = <0>;
282			reg = <2>;
283		};
284		i2c0mux2ch3: i2c@3 {
285			#address-cells = <1>;
286			#size-cells = <0>;
287			reg = <3>;
288		};
289	};
290
291	i2c-mux@75 {
292		compatible = "nxp,pca9546";
293		reg = <0x75>;
294		#address-cells = <1>;
295		#size-cells = <0>;
296		i2c-mux-idle-disconnect;
297
298		i2c0mux3ch0: i2c@0 {
299			#address-cells = <1>;
300			#size-cells = <0>;
301			reg = <0>;
302		};
303		i2c0mux3ch1: i2c@1 {
304			#address-cells = <1>;
305			#size-cells = <0>;
306			reg = <1>;
307		};
308		i2c0mux3ch2: i2c@2 {
309			#address-cells = <1>;
310			#size-cells = <0>;
311			reg = <2>;
312		};
313		i2c0mux3ch3: i2c@3 {
314			#address-cells = <1>;
315			#size-cells = <0>;
316			reg = <3>;
317		};
318	};
319
320	i2c-mux@76 {
321		compatible = "nxp,pca9546";
322		reg = <0x76>;
323		#address-cells = <1>;
324		#size-cells = <0>;
325		i2c-mux-idle-disconnect;
326
327		i2c0mux4ch0: i2c@0 {
328			#address-cells = <1>;
329			#size-cells = <0>;
330			reg = <0>;
331		};
332		i2c0mux4ch1: i2c@1 {
333			#address-cells = <1>;
334			#size-cells = <0>;
335			reg = <1>;
336
337			// IO Mezz 1 IOEXP
338			io_expander8: gpio@21 {
339				compatible = "nxp,pca9535";
340				reg = <0x21>;
341				gpio-controller;
342				#gpio-cells = <2>;
343			};
344
345			// IO Mezz 1 FRU EEPROM
346			eeprom@50 {
347				compatible = "atmel,24c64";
348				reg = <0x50>;
349			};
350		};
351		i2c0mux4ch2: i2c@2 {
352			#address-cells = <1>;
353			#size-cells = <0>;
354			reg = <2>;
355		};
356		i2c0mux4ch3: i2c@3 {
357			#address-cells = <1>;
358			#size-cells = <0>;
359			reg = <3>;
360		};
361	};
362
363	i2c-mux@77 {
364		compatible = "nxp,pca9546";
365		reg = <0x77>;
366		#address-cells = <1>;
367		#size-cells = <0>;
368		i2c-mux-idle-disconnect;
369
370		i2c0mux5ch0: i2c@0 {
371			#address-cells = <1>;
372			#size-cells = <0>;
373			reg = <0>;
374		};
375		i2c0mux5ch1: i2c@1 {
376			#address-cells = <1>;
377			#size-cells = <0>;
378			reg = <1>;
379		};
380		i2c0mux5ch2: i2c@2 {
381			#address-cells = <1>;
382			#size-cells = <0>;
383			reg = <2>;
384		};
385		i2c0mux5ch3: i2c@3 {
386			#address-cells = <1>;
387			#size-cells = <0>;
388			reg = <3>;
389		};
390	};
391};
392
393&i2c1 {
394	status = "okay";
395	i2c-mux@70 {
396		compatible = "nxp,pca9548";
397		#address-cells = <1>;
398		#size-cells = <0>;
399		reg = <0x70>;
400		i2c-mux-idle-disconnect;
401
402		i2c1mux0ch0: i2c@0 {
403			#address-cells = <1>;
404			#size-cells = <0>;
405			reg = <0x0>;
406
407			power-sensor@41 {
408				compatible = "ti,ina238";
409				reg = <0x41>;
410				shunt-resistor = <500>;
411			};
412			power-sensor@42 {
413				compatible = "ti,ina238";
414				reg = <0x42>;
415				shunt-resistor = <500>;
416			};
417			power-sensor@44 {
418				compatible = "ti,ina238";
419				reg = <0x44>;
420				shunt-resistor = <500>;
421			};
422		};
423		i2c1mux0ch1: i2c@1 {
424			#address-cells = <1>;
425			#size-cells = <0>;
426			reg = <0x1>;
427
428			power-sensor@41 {
429				compatible = "ti,ina238";
430				reg = <0x41>;
431			};
432			power-sensor@43 {
433				compatible = "ti,ina238";
434				reg = <0x43>;
435			};
436		};
437		i2c1mux0ch2: i2c@2 {
438			#address-cells = <1>;
439			#size-cells = <0>;
440			reg = <0x2>;
441		};
442		i2c1mux0ch3: i2c@3 {
443			#address-cells = <1>;
444			#size-cells = <0>;
445			reg = <0x3>;
446		};
447		i2c1mux0ch4: i2c@4 {
448			#address-cells = <1>;
449			#size-cells = <0>;
450			reg = <0x4>;
451
452			power-monitor@42 {
453				compatible = "lltc,ltc4287";
454				reg = <0x42>;
455				shunt-resistor-micro-ohms = <100>;
456			};
457			power-monitor@43 {
458				compatible = "lltc,ltc4287";
459				reg = <0x43>;
460				shunt-resistor-micro-ohms = <100>;
461			};
462		};
463		i2c1mux0ch5: i2c@5 {
464			#address-cells = <1>;
465			#size-cells = <0>;
466			reg = <0x5>;
467
468			// PDB FRU EEPROM
469			eeprom@54 {
470				compatible = "atmel,24c64";
471				reg = <0x54>;
472			};
473
474			// PDB TEMP SENSOR
475			temperature-sensor@4f {
476				compatible = "ti,tmp75";
477				reg = <0x4f>;
478			};
479		};
480		i2c1mux0ch6: i2c@6 {
481			#address-cells = <1>;
482			#size-cells = <0>;
483			reg = <0x6>;
484
485			// PDB IOEXP
486			io_expander5: gpio@27 {
487				compatible = "nxp,pca9554";
488				reg = <0x27>;
489				gpio-controller;
490				#gpio-cells = <2>;
491			};
492
493			// OSFP IOEXP
494			io_expander6: gpio@25 {
495				compatible = "nxp,pca9555";
496				reg = <0x25>;
497				gpio-controller;
498				#gpio-cells = <2>;
499			};
500
501			// OSFP FRU EEPROM
502			eeprom@51 {
503				compatible = "atmel,24c64";
504				reg = <0x51>;
505			};
506		};
507		i2c1mux0ch7: i2c@7 {
508			#address-cells = <1>;
509			#size-cells = <0>;
510			reg = <0x7>;
511
512			// FIO FRU EEPROM
513			eeprom@53 {
514				compatible = "atmel,24c64";
515				reg = <0x53>;
516			};
517
518			// FIO TEMP SENSOR
519			temperature-sensor@4b {
520				compatible = "ti,tmp75";
521				reg = <0x4b>;
522			};
523		};
524	};
525};
526
527&i2c2 {
528	status = "okay";
529
530	// Module 0 IOEXP
531	io_expander0: gpio@20 {
532		compatible = "nxp,pca9555";
533		reg = <0x20>;
534		gpio-controller;
535		#gpio-cells = <2>;
536	};
537
538	// Module 1 IOEXP
539	io_expander1: gpio@21 {
540		compatible = "nxp,pca9555";
541		reg = <0x21>;
542		gpio-controller;
543		#gpio-cells = <2>;
544	};
545
546	// HMC IOEXP
547	io_expander2: gpio@27 {
548		compatible = "nxp,pca9555";
549		reg = <0x27>;
550		gpio-controller;
551		#gpio-cells = <2>;
552	};
553
554	// Module 0 EEPROM
555	eeprom@50 {
556		compatible = "atmel,24c64";
557		reg = <0x50>;
558	};
559
560	// Module 1 EEPROM
561	eeprom@51 {
562		compatible = "atmel,24c64";
563		reg = <0x51>;
564	};
565};
566
567&i2c3 {
568	status = "okay";
569};
570
571&i2c4 {
572	status = "okay";
573};
574
575&i2c5 {
576	status = "okay";
577
578	i2c-mux@70 {
579		compatible = "nxp,pca9548";
580		reg = <0x70>;
581		#address-cells = <1>;
582		#size-cells = <0>;
583		i2c-mux-idle-disconnect;
584
585		i2c5mux0ch0: i2c@0 {
586			#address-cells = <1>;
587			#size-cells = <0>;
588			reg = <0>;
589		};
590		i2c5mux0ch1: i2c@1 {
591			#address-cells = <1>;
592			#size-cells = <0>;
593			reg = <1>;
594		};
595		i2c5mux0ch2: i2c@2 {
596			#address-cells = <1>;
597			#size-cells = <0>;
598			reg = <2>;
599		};
600		i2c5mux0ch3: i2c@3 {
601			#address-cells = <1>;
602			#size-cells = <0>;
603			reg = <3>;
604		};
605		i2c5mux0ch4: i2c@4 {
606			#address-cells = <1>;
607			#size-cells = <0>;
608			reg = <4>;
609		};
610		i2c5mux0ch5: i2c@5 {
611			#address-cells = <1>;
612			#size-cells = <0>;
613			reg = <5>;
614		};
615		i2c5mux0ch6: i2c@6 {
616			#address-cells = <1>;
617			#size-cells = <0>;
618			reg = <6>;
619			// HDD FRU EEPROM
620			eeprom@52 {
621				compatible = "atmel,24c64";
622				reg = <0x52>;
623			};
624		};
625		i2c5mux0ch7: i2c@7 {
626			#address-cells = <1>;
627			#size-cells = <0>;
628			reg = <7>;
629
630			power-sensor@40 {
631				compatible = "ti,ina230";
632				reg = <0x40>;
633				shunt-resistor = <2000>;
634			};
635			power-sensor@41 {
636				compatible = "ti,ina230";
637				reg = <0x41>;
638				shunt-resistor = <2000>;
639			};
640			power-sensor@44 {
641				compatible = "ti,ina230";
642				reg = <0x44>;
643				shunt-resistor = <2000>;
644			};
645			power-sensor@45 {
646				compatible = "ti,ina230";
647				reg = <0x45>;
648				shunt-resistor = <2000>;
649			};
650		};
651	};
652};
653
654&i2c6 {
655	status = "okay";
656
657	// BMC IOEXP on Module 0
658	io_expander3: gpio@21 {
659		compatible = "nxp,pca9555";
660		reg = <0x21>;
661		gpio-controller;
662		#gpio-cells = <2>;
663	};
664
665	rtc@6f {
666		compatible = "nuvoton,nct3018y";
667		reg = <0x6f>;
668	};
669};
670
671&i2c7 {
672	status = "okay";
673};
674
675&i2c8 {
676	status = "okay";
677};
678
679&i2c9 {
680	status = "okay";
681
682	// SCM CPLD IOEXP
683	io_expander4: gpio@4f {
684		compatible = "nxp,pca9555";
685		reg = <0x4f>;
686		gpio-controller;
687		#gpio-cells = <2>;
688	};
689
690	// SCM TEMP SENSOR
691	temperature-sensor@4b {
692		compatible = "ti,tmp75";
693		reg = <0x4b>;
694	};
695
696	// SCM FRU EEPROM
697	eeprom@50 {
698		compatible = "atmel,24c64";
699		reg = <0x50>;
700	};
701
702	// BSM FRU EEPROM
703	eeprom@56 {
704		compatible = "atmel,24c64";
705		reg = <0x56>;
706	};
707};
708
709&i2c10 {
710	status = "okay";
711
712	// OCP NIC0 TEMP
713	temperature-sensor@1f {
714		compatible = "ti,tmp421";
715		reg = <0x1f>;
716	};
717
718	// OCP NIC0 FRU EEPROM
719	eeprom@50 {
720		compatible = "atmel,24c64";
721		reg = <0x50>;
722	};
723};
724
725&i2c11 {
726	status = "okay";
727
728	ssif-bmc@10 {
729		compatible = "ssif-bmc";
730		reg = <0x10>;
731	};
732};
733
734&i2c12 {
735	status = "okay";
736
737	// Module 1 FRU EEPROM
738	eeprom@50 {
739		compatible = "atmel,24c64";
740		reg = <0x50>;
741	};
742};
743
744&i2c13 {
745	status = "okay";
746
747	// Module 0 FRU EEPROM
748	eeprom@50 {
749		compatible = "atmel,24c64";
750		reg = <0x50>;
751	};
752
753	// Left CBC FRU EEPROM
754	eeprom@54 {
755		compatible = "atmel,24c02";
756		reg = <0x54>;
757	};
758
759	// Right CBC FRU EEPROM
760	eeprom@55 {
761		compatible = "atmel,24c02";
762		reg = <0x55>;
763	};
764
765	// HMC FRU EEPROM
766	eeprom@57 {
767		compatible = "atmel,24c02";
768		reg = <0x57>;
769	};
770};
771
772&i2c14 {
773	status = "okay";
774
775	// PDB CPLD IOEXP 0x10
776	io_expander9: gpio@10 {
777		compatible = "nxp,pca9555";
778		interrupt-parent = <&gpio0>;
779		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
780		reg = <0x10>;
781		gpio-controller;
782		#gpio-cells = <2>;
783	};
784
785	// PDB CPLD IOEXP 0x11
786	io_expander10: gpio@11 {
787		compatible = "nxp,pca9555";
788		interrupt-parent = <&gpio0>;
789		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
790		reg = <0x11>;
791		gpio-controller;
792		#gpio-cells = <2>;
793	};
794
795	// PDB CPLD IOEXP 0x12
796	io_expander11: gpio@12 {
797		compatible = "nxp,pca9555";
798		interrupt-parent = <&gpio0>;
799		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
800		reg = <0x12>;
801		gpio-controller;
802		#gpio-cells = <2>;
803	};
804
805	// PDB CPLD IOEXP 0x13
806	io_expander12: gpio@13 {
807		compatible = "nxp,pca9555";
808		interrupt-parent = <&gpio0>;
809		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
810		reg = <0x13>;
811		gpio-controller;
812		#gpio-cells = <2>;
813	};
814
815	// PDB CPLD IOEXP 0x14
816	io_expander13: gpio@14 {
817		compatible = "nxp,pca9555";
818		interrupt-parent = <&gpio0>;
819		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
820		reg = <0x14>;
821		gpio-controller;
822		#gpio-cells = <2>;
823	};
824
825	// PDB CPLD IOEXP 0x15
826	io_expander14: gpio@15 {
827		compatible = "nxp,pca9555";
828		interrupt-parent = <&gpio0>;
829		interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
830		reg = <0x15>;
831		gpio-controller;
832		#gpio-cells = <2>;
833	};
834};
835
836&i2c15 {
837	status = "okay";
838
839	// OCP NIC1 TEMP
840	temperature-sensor@1f {
841		compatible = "ti,tmp421";
842		reg = <0x1f>;
843	};
844
845	// OCP NIC1 FRU EEPROM
846	eeprom@52 {
847		compatible = "atmel,24c64";
848		reg = <0x52>;
849	};
850};
851
852&adc0 {
853	vref-supply = <&p1v8_bmc_aux>;
854	status = "okay";
855
856	pinctrl-names = "default";
857	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
858		&pinctrl_adc2_default &pinctrl_adc3_default
859		&pinctrl_adc4_default &pinctrl_adc5_default
860		&pinctrl_adc6_default &pinctrl_adc7_default>;
861};
862
863&adc1 {
864	vref-supply = <&p2v5_bmc_aux>;
865	status = "okay";
866
867	pinctrl-names = "default";
868	pinctrl-0 = <&pinctrl_adc10_default>;
869};
870
871&ehci0 {
872	status = "okay";
873};
874
875&wdt1 {
876	status = "okay";
877	pinctrl-names = "default";
878	pinctrl-0 = <&pinctrl_wdtrst1_default>;
879	aspeed,reset-type = "soc";
880	aspeed,external-signal;
881	aspeed,ext-push-pull;
882	aspeed,ext-active-high;
883	aspeed,ext-pulse-duration = <256>;
884};
885
886&pinctrl {
887	pinctrl_ncsi3_default: ncsi3_default {
888		function = "RMII3";
889		groups = "NCSI3";
890	};
891
892	pinctrl_ncsi4_default: ncsi4_default {
893		function = "RMII4";
894		groups = "NCSI4";
895	};
896};
897
898&gpio0 {
899	gpio-line-names =
900	/*A0-A7*/	"","","","","","","","",
901	/*B0-B7*/	"BATTERY_DETECT","PRSNT1_HPM_SCM_N",
902			"BMC_I2C1_FPGA_ALERT_L","BMC_READY",
903			"IOEXP_INT_L","FM_ID_LED",
904			"","",
905	/*C0-C7*/	"","","","",
906			"PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N",
907			"","BMC_I2C_SSIF_ALERT_L",
908	/*D0-D7*/	"","","","","","","","",
909	/*E0-E7*/	"","","","","","","","",
910	/*F0-F7*/	"","","","","","","","",
911	/*G0-G7*/	"","","","","","",
912			"FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N",
913	/*H0-H7*/	"PWR_BRAKE_L","RUN_POWER_EN",
914			"SHDN_FORCE_L","SHDN_REQ_L",
915			"","","","",
916	/*I0-I7*/	"","","","",
917			"","FLASH_WP_STATUS",
918			"FM_PDB_HEALTH_N","RUN_POWER_PG",
919	/*J0-J7*/	"","","","","","","","",
920	/*K0-K7*/	"","","","","","","","",
921	/*L0-L7*/	"","","","","","","","",
922	/*M0-M7*/	"PCIE_EP_RST_EN","BMC_FRU_WP",
923			"SCM_HPM_STBY_RST_N","SCM_HPM_STBY_EN",
924			"STBY_POWER_PG_3V3","TH500_SHDN_OK_L","","",
925	/*N0-N7*/	"LED_POSTCODE_0","LED_POSTCODE_1",
926			"LED_POSTCODE_2","LED_POSTCODE_3",
927			"LED_POSTCODE_4","LED_POSTCODE_5",
928			"LED_POSTCODE_6","LED_POSTCODE_7",
929	/*O0-O7*/	"HMC_I2C3_FPGA_ALERT_L","FPGA_READY_HMC",
930			"CHASSIS_AC_LOSS_L","BSM_PRSNT_R_N",
931			"PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N",
932			"","USBDBG_IPMI_EN_L",
933	/*P0-P7*/	"PWR_BTN_BMC_N","IPEX_CABLE_PRSNT_L",
934			"ID_RST_BTN_BMC_N","RST_BMC_RSTBTN_OUT_N",
935			"host0-ready","BMC_READY_CPLD","","BMC_HEARTBEAT_N",
936	/*Q0-Q7*/	"IRQ_PCH_TPM_SPI_N","USB_OC0_REAR_R_N",
937			"UART_MUX_SEL","I2C_MUX_RESET_L",
938			"RSVD_NV_PLT_DETECT","SPI_TPM_INT_L",
939			"CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L",
940	/*R0-R7*/	"THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L",
941			"CPU_BOOT_DONE","PMBUS_GNT_L",
942			"CHASSIS_PWR_BRK_L","PCIE_WAKE_L",
943			"PDB_THERM_OVERT_L","HMC_I2C2_FPGA_ALERT_L",
944	/*S0-S7*/	"","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N",
945			"FM_BMC_DEBUG_SW_N","UID_LED_N",
946			"SYS_FAULT_LED_N","RUN_POWER_FAULT_L",
947	/*T0-T7*/	"","","","","","","","",
948	/*U0-U7*/	"","","","","","","","",
949	/*V0-V7*/	"L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L",
950			"BMC_ID_BEEP_SEL","BMC_I2C0_FPGA_ALERT_L",
951			"SMB_BMC_TMP_ALERT","PWR_LED_N",
952			"SYS_RST_OUT_L","IRQ_TPM_SPI_N",
953	/*W0-W7*/	"","","","","","","","",
954	/*X0-X7*/	"","","","","","","","",
955	/*Y0-Y7*/	"","RST_BMC_SELF_HW",
956			"FM_FLASH_LATCH_N","BMC_EMMC_RST_N",
957			"","","","",
958	/*Z0-Z7*/	"","","","","","","","";
959};
960
961&io_expander0 {
962	gpio-line-names =
963		"FPGA_THERM_OVERT_L","FPGA_READY_BMC",
964		"HMC_BMC_DETECT","HMC_PGOOD",
965		"","BMC_SELF_PWR_CYCLE",
966		"FPGA_EROT_FATAL_ERROR_L","WP_HW_EXT_CTRL_L",
967		"EROT_FPGA_RST_L","FPGA_EROT_RECOVERY_L",
968		"BMC_EROT_FPGA_SPI_MUX_SEL","USB2_HUB_RESET_L",
969		"NCSI_CS1_SEL","SGPIO_EN_L",
970		"B2B_IOEXP_INT_L","I2C_BUS_MUX_RESET_L";
971};
972
973&io_expander1 {
974	gpio-line-names =
975		"SEC_FPGA_THERM_OVERT_L","SEC_FPGA_READY_BMC",
976		"","",
977		"","",
978		"SEC_FPGA_EROT_FATAL_ERROR_L","SEC_WP_HW_EXT_CTRL_L",
979		"SEC_EROT_FPGA_RST_L","SEC_FPGA_EROT_RECOVERY_L",
980		"SEC_BMC_EROT_FPGA_SPI_MUX_SEL","",
981		"","",
982		"","SEC_I2C_BUS_MUX_RESET_L";
983};
984
985&io_expander2 {
986	gpio-line-names =
987		"HMC_PRSNT_L","HMC_READY",
988		"HMC_EROT_FATAL_ERROR_L","I2C_MUX_SEL",
989		"HMC_EROT_SPI_MUX_SEL","HMC_EROT_RECOVERY_L",
990		"HMC_EROT_RST_L","GLOBAL_WP_HMC",
991		"FPGA_RST_L","USB2_HUB_RST",
992		"CPU_UART_MUX_SEL","",
993		"","","","";
994};
995
996&io_expander3 {
997	gpio-line-names =
998		"RTC_MUX_SEL","PCI_MUX_SEL","TPM_MUX_SEL","FAN_MUX-SEL",
999		"SGMII_MUX_SEL","DP_MUX_SEL","UPHY3_USB_SEL","NCSI_MUX_SEL",
1000		"BMC_PHY_RST","RTC_CLR_L","BMC_12V_CTRL","PS_RUN_IO0_PG",
1001		"","","","";
1002};
1003
1004&io_expander4 {
1005	gpio-line-names =
1006		"stby_power_en_cpld","stby_power_gd_cpld","","",
1007		"","","","",
1008		"","","","",
1009		"","","","";
1010};
1011
1012&io_expander5 {
1013	gpio-line-names =
1014		"JTAG_MUX_SEL","IOX_BMC_RESET","","",
1015		"","","","";
1016};
1017
1018&io_expander6 {
1019	gpio-line-names =
1020		"OSFP_PHASE_ID0","OSFP_PHASE_ID1",
1021		"OSFP_PHASE_ID2","OSFP_PHASE_ID3",
1022		"","","","",
1023		"OSFP_BOARD_ID0","OSFP_BOARD_ID1",
1024		"OSFP_BOARD_ID2","PWRGD_P3V3_N1",
1025		"PWRGD_P3V3_N2","","","";
1026};
1027
1028&io_expander7 {
1029	gpio-line-names =
1030		"RST_CX7_0","RST_CX7_1",
1031		"CX0_SSD0_PRSNT_L","CX1_SSD1_PRSNT_L",
1032		"CX_BOOT_CMPLT_CX0","CX_BOOT_CMPLT_CX1",
1033		"CX_TWARN_CX0_L","CX_TWARN_CX1_L",
1034		"CX_OVT_SHDN_CX0","CX_OVT_SHDN_CX1",
1035		"FNP_L_CX0","FNP_L_CX1",
1036		"","MCU_GPIO","MCU_RST_N","MCU_RECOVERY_N";
1037};
1038
1039&io_expander8 {
1040	gpio-line-names =
1041		"SEC_RST_CX7_0","SEC_RST_CX7_1",
1042		"SEC_CX0_SSD0_PRSNT_L","SEC_CX1_SSD1_PRSNT_L",
1043		"SEC_CX_BOOT_CMPLT_CX0","SEC_CX_BOOT_CMPLT_CX1",
1044		"SEC_CX_TWARN_CX0_L","SEC_CX_TWARN_CX1_L",
1045		"SEC_CX_OVT_SHDN_CX0","SEC_CX_OVT_SHDN_CX1",
1046		"SEC_FNP_L_CX0","SEC_FNP_L_CX1",
1047		"","SEC_MCU_GPIO","SEC_MCU_RST_N","SEC_MCU_RECOVERY_N";
1048};
1049
1050&io_expander9 {
1051	gpio-line-names =
1052		"LEAK3_DETECT_R","LEAK1_DETECT_R",
1053		"LEAK2_DETECT_R","LEAK0_DETECT_R",
1054		"CHASSIS3_LEAK_Q_N_PLD","CHASSIS1_LEAK_Q_N_PLD",
1055		"CHASSIS2_LEAK_Q_N_PLD","CHASSIS0_LEAK_Q_N_PLD",
1056		"P12V_AUX_FAN_ALERT_PLD_N","P12V_AUX_FAN_OC_PLD_N",
1057		"P12V_AUX_FAN_FAULT_PLD_N","LEAK_DETECT_RMC_N_R",
1058		"RSVD_RMC_GPIO3_R","SMB_RJ45_FIO_TMP_ALERT",
1059		"","";
1060};
1061
1062&io_expander10 {
1063	gpio-line-names =
1064		"FM_P12V_NIC1_FLTB_R_N","FM_P3V3_NIC1_FAULT_R_N",
1065		"OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",
1066		"P12V_AUX_NIC1_SENSE_ALERT_R_N",
1067		"FM_P12V_NIC0_FLTB_R_N","FM_P3V3_NIC0_FAULT_R_N",
1068		"OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N",
1069		"P12V_AUX_NIC0_SENSE_ALERT_R_N",
1070		"P12V_AUX_PSU_SMB_ALERT_R_L","P12V_SCM_SENSE_ALERT_R_N",
1071		"NODEB_PSU_SMB_ALERT_R_L","NODEA_PSU_SMB_ALERT_R_L",
1072		"P52V_SENSE_ALERT_PLD_N","P48V_HS2_FAULT_N_PLD",
1073		"P48V_HS1_FAULT_N_PLD","";
1074};
1075
1076&io_expander11 {
1077	gpio-line-names =
1078		"FAN_7_PRESENT_N","FAN_6_PRESENT_N",
1079		"FAN_5_PRESENT_N","FAN_4_PRESENT_N",
1080		"FAN_3_PRESENT_N","FAN_2_PRESENT_N",
1081		"FAN_1_PRESENT_N","FAN_0_PRESENT_N",
1082		"PRSNT_CHASSIS3_LEAK_CABLE_R_N","PRSNT_CHASSIS1_LEAK_CABLE_R_N",
1083		"PRSNT_CHASSIS2_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N",
1084		"PRSNT_RJ45_FIO_N_R","PRSNT_HDDBD_POWER_CABLE_N",
1085		"PRSNT_OSFP_POWER_CABLE_N","";
1086};
1087
1088&io_expander12 {
1089	gpio-line-names =
1090		"RST_OCP_V3_1_R_N","NIC0_PERST_N",
1091		"OCP_SFF_PERST_FROM_HOST_ISO_PLD_N","OCP_SFF_MAIN_PWR_EN",
1092		"FM_OCP_SFF_PWR_GOOD_PLD","OCP_SFF_AUX_PWR_PLD_EN_R",
1093		"HP_LVC3_OCP_V3_1_PWRGD_PLD","HP_OCP_V3_1_HSC_PWRGD_PLD_R",
1094		"RST_OCP_V3_2_R_N","NIC1_PERST_N",
1095		"OCP_V3_2_PERST_FROM_HOST_ISO_PLD_N","OCP_V3_2_MAIN_PWR_EN",
1096		"FM_OCP_V3_2_PWR_GOOD_PLD","OCP_V3_2_AUX_PWR_PLD_EN_R",
1097		"HP_LVC3_OCP_V3_2_PWRGD_PLD","HP_OCP_V3_2_HSC_PWRGD_PLD_R";
1098};
1099
1100&io_expander13 {
1101	gpio-line-names =
1102		"NODEA_NODEB_PWOK_PLD_ISO_R","PWR_EN_NICS",
1103		"PWRGD_P12V_AUX_FAN_PLD","P12V_AUX_FAN_EN_PLD",
1104		"PWRGD_P3V3_AUX_PLD","PWRGD_P12V_AUX_PLD_ISO_R",
1105		"FM_MAIN_PWREN_FROM_RMC_R","FM_MAIN_PWREN_RMC_EN_ISO_R",
1106		"PWRGD_RMC_R","PWRGD_P12V_AUX_FAN_PLD",
1107		"P12V_AUX_FAN_EN_PLD","FM_SYS_THROTTLE_N",
1108		"HP_LVC3_OCP_V3_2_PRSNT2_PLD_N","HP_LVC3_OCP_V3_1_PRSNT2_PLD_N",
1109		"","";
1110};
1111
1112&io_expander14 {
1113	gpio-line-names =
1114		"","","","","","","","",
1115		"FM_BOARD_BMC_SKU_ID3","FM_BOARD_BMC_SKU_ID2",
1116		"FM_BOARD_BMC_SKU_ID1","FM_BOARD_BMC_SKU_ID0",
1117		"FAB_BMC_REV_ID2","FAB_BMC_REV_ID1",
1118		"FAB_BMC_REV_ID0","";
1119};
1120